[TCWG-1424] Profile guided information code size investigation.
- Wrote up initial findings in Jira
- Have written a pass that works with both the new and old pass
manager that I can use to selectively add size optimisation attributes
to functions.
- Spent way too much time trying to work out where to put the pass in
both the old and new pass manager.
-- I now understand why the new pass manager is required to get the
most benefits of profile feedback.
-- I now understand a bit better some of the frustrations of the old
pass manager.
-- I can see why the new pass manager isn't quite ready yet.
- Fixed up, I think, -fprofile-instr-generate in the new pass manager.
I didn't realise that were two separate instrumentation methods as
-fprofile-generate is subtly different.
Misc:
- Updated state of sanitizer tests on Arm and AArch64 to enable a PR
to be closed.
=== Work done during this week ===
* stack-protector failure on GCC ARM: more testing needed
+ rework to introduce new standard pattern including guard's address
computation and make pattern opaque until after register allocation
+ fill in form for new CVE ID and ask feedback on CVE description
* Resume work on extending FileCheck to allow variable with arithmetic
expression
+ created TCWG-1428 to track this work
* Tried to fix LD_LIBRARY_PATH issue with depot build of GNU Arm
Embedded Toolchain
-> need to talk to someone who know better depot module recipes
* Misc:
+ Arm meetings
+ Linaro syncs
+ 1.5 day spent on IT issue (personal investigation to help IT,
blocked on broken system after some IT attempts to solve it)
-> issue finally fully resolved
=== Plan for Linaro week 26 ===
* Do extended testing of stack protector bug fix
* TCWG-1428 (Support arithmetic on FileCheck regex variable): finish patch
Just came across Facebook's announcement of open-sourcing BOLT, a tool
for optimising instruction cache and TLB misses. Looks interesting.
They claim to get 2-15% perf improvement in their services with BOLT
and have a port for aarch64:
https://code.facebook.com/posts/605721433136474/accelerate-large-scale-appl…
Regards,
Prathamesh
The Linaro Binary Toolchain
============================
The Linaro GCC 6.4-2018.05 Release is now available.
The GCC 6 Release series has significant changes from the GCC 5
release series. For an explanation of the changes please see the
following website:
https://gcc.gnu.org/gcc-6/changes.html
For help in porting to GCC 6 please see the following explanation:
https://gcc.gnu.org/gcc-6/porting_to.html
Download release packages from:
(sources) http://releases.linaro.org/components/toolchain/gcc-linaro/6.4-2018.05/
(binaries) http://releases.linaro.org/components/toolchain/binaries/6.4-2018.05/
Previous snapshots and release-candidates are at:
http://snapshots.linaro.org/components/toolchain/binaries/
Previous releases are at:
http://releases.linaro.org/components/toolchain/binaries/
A description of the arm and AArch64 target triples can be found at:
https://collaborate.linaro.org/display/TCWGPUB/ARM+and+AArch64+Target+Tripl…
Host Requirements
==================
Linaro officially supports the current and previous Ubuntu LTS
releases (as of the time of this release). This does not mean that
the toolchain will not work on other/older Linux distributions. See
the following for the life-time of Ubuntu LTS releases.
https://wiki.ubuntu.com/Releases
The host system upon which the cross-compiler will run requires a
minimum of glibc 2.14, because of API changes to glibc's memcpy API.
https://bugs.linaro.org/show_bug.cgi?id=1869
Package Versions
=================
Linaro GCC 6.4-2018.05
http://releases.linaro.org/components/toolchain/gcc-linaro/6.4-2018.05/
Linaro glibc 2.23 (linaro/2.23/master)
https://lists.gnu.org/archive/html/info-gnu/2016-02/msg00009.html
Linaro newlib 2.4-2016.03 (linaro_2.4-branch)
https://sourceware.org/ml/newlib/2016/msg00370.html
Linaro binutils 2.27 (users/linaro/binutils-2_27-branch)
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=blob_plain;f=bin…
Linaro GDB 8.1 (gdb-8.1-branch)
https://lists.gnu.org/archive/html/info-gnu/2018-01/msg00016.html
Linaro toolchain package git branches are hosted at:
http://git.linaro.org/toolchain
NEWS for GCC 6 (as of Linaro GCC 6.4-2018.05)
==============================================
* Runtest and gdbserver are no longer installed in the toolchain bin/
directory. Binary releases no longer include runtest at all, and
gdbserver is a target tool; it is now shipped in the sysroot under
usr/bin/.
LDTS case #2211: gdbserver and runtest in GCC binary release are in
the wrong place or have the wrong name
* Gdbserver is no longer linked statically, because this is currently
unsupported.
Linaro bugzilla #3344: gdbserver broken in Linaro 2017.02
https://bugs.linaro.org/show_bug.cgi?id=3344
* Previous MinGW hosted version of Linaro GCC C preprocessor failed to
convert character set used for string, character constants, etc. This
is fixed in this release.
Linaro bugzilla #3040 : CC1 and cc1plus cannot convert UTF-8.
https://bugs.linaro.org/show_bug.cgi?id=3040
* The Linaro GCC 6.3-2017.05 snapshot added support for -mpure-code
option to ARMv7-M and ARMv8-M targets. This option ensures functions
are put into sections that contain only code and no data.
* The GDB version was upgraded from GDB 8.0 to 8.1.
* Previous versions of the Linaro GCC 6 toolchain, when -static
-E/—dynamic-list are passed to the linker, might create executables
with dynamic sections which aren’t supported by run-time. This was
exhibited in Perf Tools build system and has been fixed upstream and
backported into Linaro Binutils 2.27 branch.
Linaro bugzilla #2926 : Perf tools compiled statically for AArch64
with Linaro release 6.1 and later ones was not statically linked.
https://bugs.linaro.org/show_bug.cgi?id=2926
* The Linaro GCC 6.3-2017.03 snapshot fixed some ILP32 issues (TLS,
exception handling, …) and these have been incorporated into this
release.
* Previous versions of the Linaro GCC 6 toolchain were incorrectly
generating floating-point code for soft-float Linux targets
(arm-linux-gnueabi, and armeb-linux-gnueabi). This escaped detection
until recently because the soft-float targeted toolchains were
configured to use general-purpose registers for passing floating-point
values (which is what you would expect for soft-float toolchains) and
the intra-routine floating-code was not noticed.
The issue would only show up on targets that were run on hardware that
truly didn't have floating-point hardware where the kernel did not
trap and emulate floating-point routines. This has been solved in
Linaro GCC 6.3-2017.02-rc2 by configuring the toolchain (using
--with-float=soft) to generate code without any floating-point
instructions at all (-mfloat-abi=soft).
https://review.linaro.org/#/c/16968/2
This change should not break compatibility between existing binaries
compiled with these toolchains since the float-point parameter passing
ABI is still the same.
* A bug/regression in the compiler has been identified whereby the
target function that is invoked when calling a "weak" function
directly is the "strong" override, whereas when calling the function
via a pointer the "weak" implementation is used. This would be
noticed as inconsistent function invocation when invoking directly vs.
invoking via function pointer. This issue only affected 32-bit arm
targets. This regression has been fixed upstream and backported into
Linaro GCC 6.3-2017.02-rc2.
GCC PR target/78253: [5/6/7 Regression] [ARM] call weak function
instead of strong when called through pointer.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78253
Linaro bugzilla #2562: ARM GCC 5.2 call weak function instead of
strong when called through pointer
https://bugs.linaro.org/show_bug.cgi?id=2562
* MS Windows does not support symlinks and the MS Windows archive
extractor does not properly deep copy the symlink target
files/directories into the symlinked directory structure when
unpacking the toolchain archive. This causes problems with missing
dependencies when using the Linaro mingw toolchains, as identified in
the following bugs:
https://bugs.linaro.org/show_bug.cgi?id=2684https://bugs.linaro.org/show_bug.cgi?id=2192https://bugs.linaro.org/show_bug.cgi?id=2762
This has been solved by copying files rather than using symlinks when
the mingw targetted toolchain archives are created.
https://review.linaro.org/#/c/16415/
* Users of Linaro's toolchain have encountered problems when building
projects with Autotools (specifically libtool):
https://bugs.linaro.org/show_bug.cgi?id=2764
The Linaro binary toolchain release contained files with a .la suffix
as artifacts of the toolchain build process. These .la files are
helper files for libtool, but unlike a gcc install tree, they are not
position independent and contain full paths. Since these artifacts
contain absolute paths they can actually mislead user invocation of
libtool into not finding required libraries (because they reference
the build tree, not the install location) and hence breaking Autotools
builds. These *.la file artifacts have been removed from Linaro
toolchain binaries because they are unnecessary for users.
* The Linaro GCC 6.3-2017.01 snapshot added further enablement for
ARMv8-M and these have been incorporated into this release.
* Compiling and statically linking some SPEC2006int tests against
tcmalloc have been failing due to a problem with glibc's memory
allocator function overrides. This was fixed upstream:
https://sourceware.org/bugzilla/show_bug.cgi?id=20432
Backported into Linaro glibc 2.23:
commit 058b5a41d56b9a8860dede14d97dd443792d064b
Author: Florian Weimer <fweimer(a)redhat.com>
Date: Fri Aug 26 22:40:27 2016 +0200
malloc: Simplify static malloc interposition [BZ #20432]
* Host binaries for x86_64 linux hosts now have symbols and debug
information stripped in order to reduce the size of the toolchain
binary archives. This reduces the archive size from 1.5G to 600M for
aarch64-linux-gnu target with the gcc-6-branch.
* The GDB version was upgraded from GDB 7.11 in the Linaro GCC
6.1-2016.08 release to GDB 7.12 in the Linaro GCC 6.2-2016.11 release.
* The Linaro GCC 6.2-2016.10 snapshot added AArch32 support for ARMv8.2
and ARMv8m, as well as some AArch64 fixes for ARMv8.2, and bug fixes
merged from FSF GCC 6.2. This is available in the binary toolchain as
of Linaro GCC 6.2-2016.11.
* Basic tuning support for the Qualcomm qdf24xx was added to the Linaro
GCC 6.2-2016.10 snapshot and is available in the binary toolchain as
of Linaro GCC 6.2-2016.11.
* IFUNC was disabled for baremetal targets, as it was causing test-suite
failures, and is presently a Linux only feature.
* The gold linker was added to this binary release.
* Backported malloc_lock fix into Linaro newlib 2.4.
commit 2665915cfc46aa6403bb2efd473c523d3167e0cb
Author: Andre Vieira (lists) <Andre.SimoesDiasVieira(a)arm.com>
Date: Thu Jun 16 12:23:51 2016 +0100
Re-enable malloc_lock for newlib-nano
* Backported rawmemchr patch into Linaro newlib 2.4.
commit e7b1ee2ea6aa3ee1da41976407410e6202a098c5
Author: Wilco Dijkstra <Wilco.Dijkstra(a)arm.com>
Date: Thu May 12 16:16:58 2016 +0000
Add rawmemchr
* Backported strlen fix when using Thumb-2 and -Os -marm into Linaro
newlib 2.4.
commit 5c02bcc086a96b174e1b9e1445a4a1770070107a
Author: Thomas Preud'homme <thomas.preudhomme(a)arm.com>
Date: Wed May 11 17:18:48 2016 -0400
Fix strlen using Thumb-2 with -Os -marm
* Backported fix for semihosting ARM when heapinfo not provided by
debugger into Linaro newlib 2.4.
commit 5c9403eaf40951f8a4f55ed65f661b485ff44be7
Author: David Hoover <spm2(a)dangerous.li>
Date: Thu Apr 21 07:12:24 2016 +0200
Fixed semihosting for ARM when heapinfo not provided by debugger.
* Merged latest FSF glibc release/2.23/master into Linaro glibc 2.23.
* Backported __ASSUME_REQUEUE_PI check Linaro glibc 2.23 branch.
commit 2d20c3bf918cd94ebd4106693adb3a5c9272baba
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Tue May 17 10:16:39 2016 -0300
Add runtime check for __ASSUME_REQUEUE_PI (BZ# 18463)
* Backported removal of __ASSUME_SET_ROBUST_LIST from Linaro glibc 2.23
branch.
commit bb8f09d72756186a3d82a1f7b2adcf8bc1fbaed1
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 19:01:10 2016 -0300
Remove __ASSUME_SET_ROBUST_LIST
* Backported removal of __ASSUME_FUTEX_LOCK_PI from Linaro glibc 2.23
branch.
commit e48b4e7fed0de06dd7832ead48bea8ebc813a204
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 10:35:25 2016 -0300
Remove __ASSUME_FUTEX_LOCK_PI
* Merged latest FSF binutils-2_27-branch into
linaro_binutils-2_27-branch.
* The libwinpthread DLL is now copied into the host bin directory to
satisfy mingw package dependencies.
* Backported GNU Linker fix.
commit fbc6c6763e70cb2376e2de990c7fc54c0ee44a59
Author: Nick Clifton <nickc(a)redhat.com>
Date: Tue Aug 23 09:45:11 2016 +0100
Fix seg-fault in ARM linker when trying to parse a binary file.
* Backported GNU Assembler fix for PR 20364
commit 5fe7ebe5ab43750abf8f490b785d99a1e598e7fd
Author: Nick Clifton <nickc(a)redhat.com>
Date: Fri Aug 5 10:37:57 2016 +0100
Fix the generation of alignment frags in code sections for AArch64.
https://sourceware.org/bugzilla/show_bug.cgi?id=20364
* Performance related backports from the following snapshots have been
included: Linaro GCC 6.1-2016.06, Linaro GCC 6.1-2016.07, Linaro GCC
6.1-2016.08, Linaro GCC 6.2-2016.09, Linaro GCC 6.2-2016.10, Linaro
GCC 6.2-2016.11, Linaro GCC 6.2-2016.12, Linaro GCC 6.3-2017.01,
Linaro GCC 6.3-2017.02, Linaro GCC 6.3-2017.03, Linaro GCC
6.3-2017.04, Linaro GCC 6.3-2017.05, Linaro GCC 6.3-2017.06, Linaro
GCC 6.4-2017.07, Linaro GCC 6.4-2017.08, Linaro GCC 6.4-2017.09,
Linaro GCC 6.4-2017.10 and Linaro GCC 6.4-2018.04.
See the following Linaro GCC snapshots:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.06/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.07/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.08/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.09/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.10/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.11/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.12/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.01/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.02/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.03/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.04/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.05/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.06/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2017.07/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2017.08/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2017.09/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2017.10/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2018.04/
Contact Linaro
===============
File bugs at http://bugs.linaro.org
For Linaro member support see http://support.linaro.org
For Linaro community support email linaro-toolchain(a)lists.linaro.org
Mark Murray Staff Software Engineer | Arm
. . . . . . . . . . . . . . . . . . . . . . . . . . .
p: +44 1223 405082
arm.com <http://www.arm.com>
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
I spoke with Ramana about these at HKG18, and I'm finally getting back to
these. I have routines for
-rw-rw-r--. 1 rth rth 2538 May 30 19:12 memchr.S
-rw-rw-r--. 1 rth rth 2405 May 30 20:49 memcmp.S
-rw-rw-r--. 1 rth rth 2385 May 30 19:12 rawmemchr.S
-rw-rw-r--. 1 rth rth 2470 May 30 19:12 strchrnul.S
-rw-rw-r--. 1 rth rth 2588 May 30 19:12 strchr.S
-rw-rw-r--. 1 rth rth 2370 May 30 19:12 strcmp.S
-rw-rw-r--. 1 rth rth 2403 May 30 19:12 strcpy.S
-rw-rw-r--. 1 rth rth 2263 May 30 19:12 strlen.S
-rw-rw-r--. 1 rth rth 2595 May 30 19:12 strncmp.S
-rw-rw-r--. 1 rth rth 2344 May 30 19:12 strnlen.S
-rw-rw-r--. 1 rth rth 3105 May 30 19:12 strrchr.S
The tests pass when run under Foundation Platform 11.3. What is the best way
to submit these for review and upstreaming? There's nothing in the git README
about an upstream mailing list...
FWIW, my code is at
https://github.com/rth7680/cortex-strings/tree/rth/sve
r~
o LLVM
* Some fixes in LLVM patch benchmarking job.
* Some experiments with LLVM (Thin)LTO
* Start to look at Outliner for ARM
o Misc
* Various meetings and discussions.
Progress:
[VIRT-198 # QEMU: SVE Emulation Support ]
Another round of patches merged. About 25 remaing.
Implemented MOVPRFX, for which I had plans but forgot to actually
implement. Discovered that the advance planning that I have added
for this isn't really sufficient. For the purposes of initial
upstreaming, I'll emulate them as plain moves.
With MOVPRFX done, feedback from Ori.Chalak(a)Huawei.com:
> Thank you so much for the quick resolution.
> I have run successfully 466 tests of the OpenBLAS benchmark suite on
> the branch tag of Qemu you sent me, with SVE instructions compiled
> from C using ARM Compiler and Gnu linker.
> All pass without any failure.
> Did not verify functional correctness, just that all instructions
> are run by your Qemu branch in user mode and Qemu completes the job
> without a crash.
[Upstream]
Third iteration on splitting do_syscall.
Patch review; pull request for Cota's tb_lock patch set.
Tracked down a TB offset overflow affecting a softmmu NEON test case.
[GCC]
Sent some patches for MOVPRFX to Richard Sandiford. He offered to
test them over the weekend before posting them to gcc-patches.
* 2 days of training
== Progress ==
* FDPIC
- GCC patch series: received some feedback. Will have to iterate.
- Rebased uclibc patches on top of uclibc-ng. Patch set passes the
GCC testsuite
* GCC upstream validation:
- looking at some random noise in testing
* GCC upstream
- posted a small patch to use ACLE preprocessor defines. Will have
to enhance it
* Infrastructure:
- patch reviews
- cleanup/improvements
* misc (conf-calls, meetings, emails, ....)
== Next ==
* FDPIC: uclibc-ng, GCC
* GCC upstream validation
SVE Support ([VIRT-198])
========================
- spin next version of CNT{VCT|FRQ}_EL0 from user-space Message-Id:
<20180518114424.18054-1-alex.bennee(a)linaro.org> with ID regs :todo
- the HPC guys hit this in their test setups
[VIRT-198] https://projects.linaro.org/browse/VIRT-198
RISU Support for SVE ([VIRT-199])
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- worked on next [iteration of SVE series]
- added variable size reginfo for backwards compatibility
- various unrelated build clean-ups and tweaks
- posted {RISU PATCH v3 00/22} SVE support and various misc fixes
Message-Id: <20180613125601.14371-1-alex.bennee(a)linaro.org>
- Generating full SVE test set from ASL
- coded up some "heuristics" to add RISU constraints in patterns
- left model generating test sequences over the weekend
- handle load/store memory instructions :todo
[VIRT-199] https://projects.linaro.org/browse/VIRT-199
[iteration of SVE series]
https://github.com/stsquad/risu/tree/add-sve-support-v3
SVE Reviews
~~~~~~~~~~~
- start kicking tires of rth's patches with new test suite :todo
Upstream Work ([VIRT-109])
==========================
- started reviewing {PATCH v4 00/19} reverse debugging Message-Id:
<20180528071332.9424.27343.stgit@pasha-VirtualBox>
- ran into some issues, need clearer understanding of snapshots
- posted {RFC PATCH 0/3} Better docker dependency checking Message-Id:
<20180608160432.8734-1-alex.bennee(a)linaro.org>
- posted {PATCH v1 0/3} Current Travis Patches Message-Id:
<20180614125337.24950-1-alex.bennee(a)linaro.org>
- posted {PULL 0/3} Travis updates Message-Id:
<20180615110903.29674-1-alex.bennee(a)linaro.org>
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
Fixing up tests/tcg
~~~~~~~~~~~~~~~~~~~
- finished working on test/tcg series
- posted {PATCH v7 00/54} fix building of tests/tcg - last chance to
review! Message-Id:
<20180615194705.28019-1-alex.bennee(a)linaro.org>
- sending the pull req next week :todo
KVM CI Loop ([VIRT-2])
======================
- need to sync-up on the current state of this work :todo
[VIRT-2] https://projects.linaro.org/browse/VIRT-2
[our wiki] https://wiki.linaro.org/Core/Virtualization
Completed Reviews [1/1]
=======================
{PATCH v2 00/13} iommu: support txattrs, support TCG execution, implement TZ MPC
Message-Id: <20180604152941.20374-10-peter.maydell(a)linaro.org>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
- CLOSING NOTE [2018-06-14 Thu 19:27]
Looks good.
Absences
========
- YVR18 Connect (17th-21st September 2018)
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {Qemu-devel} {PATCH v4b 00/18} target/arm: SVE instructions, part 2
Message-Id: <20180613015641.5667-1-richard.henderson(a)linaro.org>
* {PATCH 0/4} KVM: arm64: FPSIMD/SVE fixes for 4.17
Message-Id: <1528976039-25826-1-git-send-email-Dave.Martin(a)arm.com>
* {PATCH v4 00/14} fp-test + hardfloat
Message-Id: <1528768140-17894-1-git-send-email-cota(a)braap.org>
* {RFC PATCH 00/12} tests/tcg: Add TriCore tests
Message-Id: <20180501142222.19154-1-kbastian(a)mail.uni-paderborn.de>
* {PATCH v4 00/19} reverse debugging
Message-Id: <20180528071332.9424.27343.stgit@pasha-VirtualBox>
* {Qemu-devel} {RFC PATCH v2 0/7} QEMU binary instrumentation prototype
Message-Id: <152819515565.30857.16834004920507717324.stgit@pasha-ThinkPad-T60>
--
Alex Bennée
