== String routines ==
* Gave up on perf on silverbell and redid it on ursa2; now have a
full set of perf figures and have updated the workload report to show
the spec
binaries that use significant time in libc and the routines they spend
it in; a handful of tests spend very significant amounts of time in
libm.
* Have ltrace results from about 75% of spec - some of the others
are fighting a bit
* Optimised the non-neon memcpy; it's now quite respectable except
in one or two cases (2 byte misaligned, and for some odd reason source
offset
by 8 bytes, destination by 12 is way down on any other combination)
(Current result graphs here
https://wiki.linaro.org/Internal/People/DaveGilbert?action=AttachFile&do=ge…
)
Dave
Hi,
* continued looking into ffmpeg/libavcodec:
- dcadsp.c - the inner loop contains reverse accesses which are not
supported on Neon. I think we can handle them using vrev and vswp.
- a lot of loops have unknown memory stride. I am exploring a
possibility of a combination of scalar loads and vmov into a vector
register, but it is probably too expensive.
* looking into telecom/conven
Ira
== Last week ==
* Launchpad #748138: "ICE in redirect_jump, at jump.c:1443". Related to
shrink-wrap, discussed a bit with Bernd off-list. Sent fix today (Mon.)
to gnu-internal; will need to merge to Linaro.
* CoreMark combine canonicalize compares patch set: bootstrapped and
tested with clean results on powerpc, added comments and updated
upstream submission. Machine independent parts okayed by Jeff Law, now
committed upstream. ARM parts still pending review.
* Compiled back-list of upstream patches, and sent to patches(a)linaro.org
* Traveled to Budapest, Hungary for Linaro Developer Summit on Saturday.
== This week ==
* Linaro Developer Summit at Budapest all week.
== GDB ==
* Committed support for NEON registers in core dumps (bug #615972)
to Linaro GDB (not yet in mainline).
* Investigated root cause of bug #615996 (gdb.cp/templates.exp) and
started exploring ways to fix it.
== GCC ==
* Committed fix for bug #759409 (Profiled bootstrap fails in GCC 4.5)
to FSF GCC 4.5 branch and Linaro GCC 4.5.
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk
Wittkopp
Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht
Stuttgart, HRB 243294
Worked on the ARM 16 -> 64-bit multiply-and-accumulate problem. Bernd
kindly provided a prototype patch to help. I've tried to understand what
needs to be done, but I didn't have enough time to get to the bottom of
it. So far, I think I know why the existing code doesn't work, and I
think I have a way forward. It does appear that the real problem ought
to be solved in the tree optimizers, though.
Committed the FSF GCC 4.5.3 merge to the Linaro 4.5 branch. Testing did
not show any trouble.
Matthias requested an additional 4.5 merge to pick up a new bug fix, so
I've done the merge, and submitted the merge request for testing.
Committed Maxim's compound conditionals optimization patch - a merge
from Linaro GCC 4.5.
There was some confusion caused by the lp:gcc-linaro/4.6 branch history
accidentally getting re-written. After some discussion on #bzr I managed
to figure out what happened, posted a warning to linaro-toolchain
mailing list, and changed the branch configuration to prevent it
happening again.
Committed Mark Shinwell's BRANCH_COST patch to Linaro GCC 4.6 - another
merge from GCC 4.5.
Merged from FSF GCC 4.6 to Linaro 4.6 and submitted the patch for testing.
Richard Earnshaw approved my recent Thumb2 constants patch, but only if
I modify it slightly. I've begun work on the changes, but I still need
to test them. I won't be able to commit them until the ADDW/SUBW patch
has been approved.
Ramana has reviewed my EABI half-precision function names patch, and
discovered that the return types are wrong. I have no idea how this
happened - the changes are deliberate so they must have been based on
something, but I no longer have the same documents I had when I did the
work, and it clearly doesn't match my current ones. In any case, the
changes make no practical difference as function return values are
always as wide a register anyway.
* Other
Public holiday on Monday.
* Next week
I will be attending UDS in Budapest from 8th - 14th May. I shall
continue to read my email, but will not be attending any calls.
----
Upstream patched requiring review:
* NEON scheduling patch
http://gcc.gnu.org/ml/gcc-patches/2011-02/msg01431.html
* ARM Thumb2 addw/subw support.
http://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg03783.html
== Bug fighting ==
* Tracked bug 774175 (apt segfault on armel on oneiric) down to the
cortex-a8 branch erratum bug that we found as part of the bug jam a
few weeks
ago (affecting the more obscure vtk package) - Richard's existing
binutils fix should fix this.
== String routines ==
* Struggled to get 'perf' to get sane results from profiling spec;
some of the samples are obviously being associated with the wrong
process somewhere
along the process (e.g. it's showing significant samples in the sh
process but in a library that's used by the actual benchmark.
* latrace on spec still running on ursa2
* Wrote a non-neon memcpy; as expected it's aligned performance is
very similar to libc/kernel - it's a bit faster in some places but
slower
in some odd places (e.g. n*32+1 bytes is a lot slower for some
reason). It's also really bad on mis-aligned cases, I tried to take
advantage
of the v7's ability to do misaligned loads - but they really are quite slow.
Dave
== This week ==
* Committed interleaved load/store vectorisation changes upstream.
* Merged the vldN and vstN intrinsic improvements into Linaro 4.5 and 4.6.
(Thanks for the quick reviews here.)
* Backported the interleaved load/store vectorisation changes to Linaro
4.5 and 4.6. This took a while because the patch series touches
turbulent code. Submitted merge requests.
* Merged Sergey Grechanik's NEON reload improvement into Linaro 4.5
and 4.6.
* Got ready for summit.
Richard
Hi,
* finished libunwind support of detection and handling of signal frames on
ARM Linux. RT and non-RT signal frames are handled for both >=2.6.18 and
<2.6.18 kernels. The *test-resume-sig testcases are passing now.
* briefly looked into what needs to be done in order to add 64bit __sync_*
ops
* prepared for LDS
Regards
Ken
RAG:
Red:
Amber:
Green: GSoC QEMU student project approved
Current Milestones:
| Planned | Estimate | Actual |
qemu-linaro 2011-05 | 2011-05-19 | 2011-05-19 | |
Historical Milestones:
finish qemu-cont-integration | 2011-01-25 | 2011-01-25 | handed off |
first qemu-linaro release | 2011-02-08 | 2011-02-08 | 2011-02-08 |
qemu-linaro 2011-03 | 2011-03-08 | 2011-03-08 | 2011-03-08 |
qemu-linaro 2011-04 | 2011-04-21 | 2011-04-21 | 2011-04-21 |
(short week, following holiday)
== merge-correctness-fixes ==
* some minor patches committed: SPARC build issues, Neon UNDEFs,
restore base reg properly for Thumb LDMs that abort midway
* v2 of configure patch to print list of valid targets
* some work on fixing QEMU FPSCR status flags (last remaining item
in this blueprint); submitted a patchset fixing everything except
the various VCVT instructions (which have trickier softfloat bugs)
* submitted patch fixing NaN behaviour in VMLA/VMLS/VNMLA/VNMLS
== other ==
* the Google Summer of Code QEMU project to work on upstreaming
some of the Android emulator has been approved; I will be mentoring
Patrick Jackson, who is the student who will be doing this work
* qemu-linaro 2011-05 is unlikely to have any code changes since 2011-04;
we might release it anyway just because it's the final one of the cycle
Current qemu patch status is tracked here:
https://wiki.linaro.org/PeterMaydell/QemuPatchStatus
Absences:
13-19 May: UDS, Budapest
(maybe but unlikely) 15-16 August: QEMU/KVM strand at LinuxCon NA,
Vancouver [LinuxCon proper follows on 17-19th]
