Hello list,
Recently, Android team is working on integrating Linaro toolchain for
Android and NDK. According to the initial benchmark results[1],
Linaro GCC is competitive comparing to Google toolchain. In the
meanwhile, we are trying to enable gcc-4.5 specific features such as
Graphite and LTO (Link Time Optimization) in order to make the best
choice for Android build system and NDK usage. However, I encountered
a problem about LTO and would like to ask help from toolchain WG.
Assuming Linaro Toolchain for Android is installed in directory
/tmp/android-toolchain-eabi, you can obtain Google's toolchain
benchmark suite by git:
# git clone git://android.git.kernel.org/toolchain/benchmark.git
You have to apply the attached patch in order to make benchmark suite
work[2]. Then, change directory to skia:
# cd benchmark/skia
And build skia bench with LTO enabled:
# ../scripts/bench.py --action=build
--toolchain=/tmp/android-toolchain-eabi --add_cflags="-flto
-user-linker-plugin"
The build process would be interrupted by gcc:
make -j4 --warn-undefined-variables -f ../scripts/build/main.mk
TOOLCHAIN=/tmp/android-toolchain-eabi ADD_CFLAGS="-flto
-user-linker-plugin" build
CPP ARM obj/src/core/Sk64.o <= src/src/core/Sk64.cpp
CPP ARM obj/src/core/SkAlphaRuns.o <= src/src/core/SkAlphaRuns.cpp
CPP ARM obj/src/core/SkBitmap.o <= src/src/core/SkBitmap.cpp
CPP ARM obj/src/core/SkBitmapProcShader.o <= src/src/core/SkBitmapProcShader.cpp
CPP ARM obj/src/core/SkBitmapProcState.o <= src/src/core/SkBitmapProcState.cpp
CPP ARM obj/src/core/SkBitmapProcState_matrixProcs.o <=
src/src/core/SkBitmapProcState_matrixProcs.cpp
src/src/core/SkBitmapProcShader.cpp: In function
'SkShader::CreateBitmapShader(SkBitmap const&, SkShader::TileMode,
SkShader::TileMode, void*, unsigned int)':
src/src/core/SkBitmapProcShader.cpp:243:13: warning: 'color' may be
used uninitialized in this function
CPP ARM obj/src/core/SkBitmapSampler.o <= src/src/core/SkBitmapSampler.cpp
src/src/core/SkBitmapProcState_matrixProcs.cpp:530:1: sorry,
unimplemented: gimple bytecode streams do not support machine specific
builtin functions on this target
...
However, I can get other bench items passed such as cximage, gcstone,
gnugo, mpeg4, webkit, and python.
Can anyone give me some hints to resolve LTO problem? Thanks in advance.
Sincerely,
-jserv
[1] https://wiki.linaro.org/Platform/Android/Toolchain#Reference%20Benchmark
We use the same toolchain benchmark suite as Google compiler team took.
[2] https://wiki.linaro.org/Platform/Android/UpstreamToolchain
== Last week ==
* CoreMark ARMv6/v7 regressions: posted another combine patch upstream,
which was quickly approved and committed. The XOR simplification one is
now approved too, but needs a little more revising of comments before
committing.
* The above two patches now bring CoreMark under -march=armv7-a to very
close of the performance of -march=armv5te. However, a regression where
uxtb+cmp cannot be combined into 'ands ... #255' still causes v7 to lose
slightly. This should be the final issue to solve...
* Launchpad #736007/GCC Bugzilla PR48183: NEON ICE in
emit-rtl.c:immed_double_const() under -g. Posted patch upstream, but
looks like more discussion is needed before we know if this is the
"right" way to do it.
* Launchpad #736661, armel FTBFS (G++ ICE in expand_expr_real_1()).
Looking at this.
* Pinged a few upstream patch submissions.
== This week ==
* Launchpad #723185/CS issue #9845 now assigned to me, start looking at
this.
* Get the XOR patch committed upstream, and the above described uxtb+cmp
issue solved.
* Work on other GCC issues.
Hi there. I have a custom report on top of the Launchpad tickets that
shows how old they are and if they need attention:
http://ex.seabright.co.nz/helpers/tickets/gcc-linaro?group_by=lint
I check this once a day to see how we're doing. It's useful when
deciding which bug to attack next.
-- Michael
== libunwind ==
* Had few discussions with Uli with regard to unwinding.
* Continued to learn about libunwind internals.
* The .ARM.exidx and .ARM.extbl section parser is functional but the
integration into libunwind needs to be improved. Currently there are two
seperate models that hold the informations of the current frame. Since they
are not synchronized the behavior of libunwind is quite unexpected to the
user.
* I started on eliminating the redundancy by removing the model that was
introduced for the extbl support. My goal is to have the parser operate on the
DWARF model directly. In theory this should also allow to mix DWARF- and
extable-frames.
Regards
Ken
== GCC ==
* Started looking at performance regressions. Setting up builds with
EEMBC Denbench and other benchmarks.
* Looked at PR47719 in some detail this week.
* Set up environment on laptop . Fixed PR46788 in 4.6 branch and trunk.
* Discussions regarding armhf, how to maintain Linaro branches -
upstreaming patches etc.
* Looked at a case of performance improvements with VFP stores. I think
it's because we end up allowing PRE_INC and POST_DEC for floating point
mode values because of which there end up being more transfers to and
from the integer core registers.
* Off sick on Monday 14th March 2011.
== Misc ==
* Sorted out travel arrangements for LDS. Waiting for visa now.
== GDB ==
* Ongoing work on glibc patch to add ARM unwind tables to system
call stubs (bug #684218).
* Implemented initial version of a kernel patch that fixes GDB
inferior calls while stopped in a restartable system call
(bug #615974); started discussion with kernel folks.
* Implemented new version of patch to fix single-stepping over
signal handlers (bug #615978) that addresses review comments;
posted to mailing list.
* Verified Linaro GDB patch set can be applied to Ubuntu package.
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand | Phone: +49-7031/16-3727
STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: Dirk
Wittkopp
Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht
Stuttgart, HRB 243294
(sent early this week since I'll be in the conference all Friday)
RAG:
Red:
Amber:
Green:
Current Milestones:
| Planned | Estimate | Actual |
Historical Milestones: [trimmed the 2010 ones]
finish qemu-cont-integration | 2011-01-25 | 2011-01-25 | handed off |
first qemu-linaro release | 2011-02-08 | 2011-02-08 | 2011-02-08 |
qemu-linaro 2011-03 | 2011-03-08 | 2011-03-08 | 2011-03-08 |
== maintain-beagle-models ==
* wrote most of a patch to properly implement prlimit64 syscall
in usermode -- needs checking/testing
* wrote most of a patch to allow boards to specify their min/max/default
RAM size rather than having a single qemu-wide default; this would
let us specify RAM size on the beagle model (currently hardwired)
* retested the patch I wrote late last year which fixes TCG's locking
problems by having interrupting signals/threads just set a flag which
we check in every TB (rather than trying to mess with the TCG graph
in a totally unsafe and crashprone way). Slowdown: about 3.5% on
"boot Linaro nano on vexpress to rootprompt and shutdown again".
I shall see if I can persuade people that this is a price worth
paying for not randomly crashing in thread-heavy code :-)
== merge-correctness-fixes ==
* Wrote/submitted patchset which fixes VRECPS edge case handling
(mostly NaN related)
* Wrote/submitted patchset which fixes Neon VLD of single
element to all lanes
* Wrote/submitted patch which fixes qemu to work on an ARM host
where the host C code has been built in Thumb mode
== other ==
* attended QEMU Users Forum in Grenoble
* meetings: toolchain, standup, pdsw-tools, arch q&a
Current qemu patch status is tracked here:
https://wiki.linaro.org/PeterMaydell/QemuPatchStatus
Absences:
17/18 March: QEMU Users Forum, Grenoble
Holiday: 22 Apr - 2 May
9-13 May: UDS, Budapest
(maybe) ~17-19 August: QEMU/KVM strand at LinuxCon NA, Vancouver
Short week
* libffi patch accepted upstream
* eglibc integration of string routine changes
- I have something that works but it's more complex than I'd like
(to get it to fall
back to the C code on stuff I haven't optimised for).
* Trying a neon memchr; tried a really simple 8 byte a loop version - it's
quite slow on both A8 and A9; branching on the result of comparisons
done in the neon is not simple.
* Porting jam bug 735877 chromium using d32 float; it was passing
vpfpv3 rather than using the default when configured without neon.
On holiday tomorrow (Friday).
Dave
Hello,
Experiment with aes benchmark from DENbench.
Continue my experiments with SMS which includes re-implementing an old
patch to insert reg-moves in free slots rather than greedily before the
definition as is done in the current implementation.
Thanks,
Revital
Hi,
* submitted store sinking patch to mainline
* started testing auto-detection of vector size patch
* DENBench - some benchmarks are still unstable, I am looking into
stable regressions, adjusting and fixing the cost model for them
Next week:
Sunday and Monday - holidays
Ira
