- linaro-toolchain - lists.linaro.org

by Renato Golin

Hi folks, Attached is the Linpack benchmark, which I ran GCC and Clang with and without vectorization (though most of the loops are not vectorized). Reading the output of LLVM loop vectorizer, it also doesn't do much, but the net gain is due to the basic-block vectorizer. Does GCC has a similar concept? The results are also attached. cheers, --renato

12 years, 4 months

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[ANNOUNCE] Linaro GCC 4.7 2013.02-01 released.

by Yvan Roux

The Linaro Toolchain Working Group announce the 2013.02-01 Linaro GCC 4.7 release. This is a respin of the 2013.02 release because of an issue with multiarch for x32 and kfreebsd builds in the previous one. Please find the original 2013.02 announcement below. The Linaro Toolchain Working Group is pleased to announce the 2013.02 release of both Linaro GCC 4.7 and Linaro GCC 4.6. Linaro GCC 4.7 2013.02 is the eleventh release in the 4.7 series. Based off the latest GCC 4.7.2+svn195745 release, it includes ARM-focused performance improvements and bug fixes. Interesting changes include: * Updates to GCC 4.7.2+svn195745 * Includes arm/aarch64-4.7-branch up to svn revision 195716 * Support for Cortex-A7 backported from trunk Linaro GCC 4.6 2013.02 is the 24th release in the 4.6 series. Based off the latest GCC 4.6.3+svn195744 release, this is the eleventh release after entering maintenance. Interesting changes include: * Updates to 4.6.3+svn195744 The source tarballs are available from: https://launchpad.net/gcc-linaro/+milestone/4.7-2013.02 https://launchpad.net/gcc-linaro/+milestone/4.6-2013.02 Downloads are available from the Linaro GCC page on Launchpad: https://launchpad.net/gcc-linaro More information on the features and issues are available from the release pages: https://launchpad.net/gcc-linaro/4.7/4.7-2013.02 https://launchpad.net/gcc-linaro/4.6/4.6-2013.02 Mailing list: http://lists.linaro.org/mailman/listinfo/linaro-toolchain Bugs: https://bugs.launchpad.net/gcc-linaro/ Questions? https://ask.linaro.org/

12 years, 4 months

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Re: [PATCH] ARM: decompressor: clear SCTLR.A bit for v7 cores

by Michael Hope

On 6 November 2012 02:48, Rob Herring <robherring2(a)gmail.com> wrote: > > On 11/05/2012 05:13 AM, Russell King - ARM Linux wrote: > > On Mon, Nov 05, 2012 at 10:48:50AM +0000, Dave Martin wrote: > >> On Thu, Oct 25, 2012 at 05:08:16PM +0200, Johannes Stezenbach wrote: > >>> On Thu, Oct 25, 2012 at 09:25:06AM -0500, Rob Herring wrote: > >>>> On 10/25/2012 09:16 AM, Johannes Stezenbach wrote: > >>>>> On Thu, Oct 25, 2012 at 07:41:45AM -0500, Rob Herring wrote: > >>>>>> On 10/25/2012 04:34 AM, Johannes Stezenbach wrote: > >>>>>>> On Thu, Oct 11, 2012 at 07:43:22AM -0500, Rob Herring wrote: > >>>>>>> > >>>>>>>> While v6 can support unaligned accesses, it is optional and current > >>>>>>>> compilers won't emit unaligned accesses. So we don't clear the A bit for > >>>>>>>> v6. > >>>>>>> > >>>>>>> not true according to the gcc changes page > >>>>>> > >>>>>> What are you going to believe: documentation or what the compiler > >>>>>> emitted? At least for ubuntu/linaro 4.6.3 which has the unaligned access > >>>>>> support backported and 4.7.2, unaligned accesses are emitted for v7 > >>>>>> only. I guess default here means it is the default unless you change the > >>>>>> default in your build of gcc. > >>>>> > >>>>> Since ARMv6 can handle unaligned access in the same way as ARMv7 > >>>>> it seems a clear bug in gcc which might hopefully get fixed. > >>>>> Thus in this case I think it is reasonable to follow the > >>>>> gcc documentation, otherwise the code would break for ARMv6 > >>>>> when gcc gets fixed. > >>>> > >>>> But the compiler can't assume the state of the U bit. I think it is > >>>> still legal on v6 to not support unaligned accesses, but on v7 it is > >>>> required. All the standard v6 ARM cores support it, but I'm not sure > >>>> about custom cores or if there are SOCs with buses that don't support > >>>> unaligned accesses properly. > >>> > >>> Well, I read the "...since Linux version 2.6.28" comment > >>> in the gcc changes page in the way that they assume the > >>> U-bit is set. (Although I'm not sure it really is???) > >> > >> Actually, the kernel checks the arch version and the U bit on boot, > >> and chooses the appropriate setting for the A bit depending on the > >> result. (See arch/arm/mm/alignment.c:alignment_init().) > > > > That is in the kernel itself, _after_ the decompressor has run. It is > > not relevant to any discussion about the decompressor. > > > >> Currently, we depend on the CPU reset behaviour or firmware/ > >> bootloader to set the U bit for v6, but the behaviour should be > >> correct either way, though unaligned accesses will obviously > >> perform (much) better with U=1. > > > > Will someone _PLEASE_ address my initial comments against this patch > > in light of the fact that it's now been proven _NOT_ to be just a V7 > > issue, rather than everyone seemingly buring their heads in the sand > > over this. > > I tried adding -munaligned-accesses on a v6 build and still get byte > accesses rather than unaligned word accesses. So this does seem to be a > v7 only issue based on what gcc will currently produce. Copying Michael > Hope who can hopefully provide some insight on why v6 unaligned accesses > are not enabled. This looks like a bug. Unaligned access is enabled for armv6 but seems to only take effect for cores with Thumb-2. Here's a test case both with unaligned field access and unaligned block copy: struct foo { char a; int b; struct { int x[3]; } c; } __attribute__((packed)); int get_field(struct foo *p) { return p->b; } int copy_block(struct foo *p, struct foo *q) { p->c = q->c; } With -march=armv7-a you get the correct: bar: ldr r0, [r0, #1] @ unaligned @ 11 unaligned_loadsi/2 [length = 4] bx lr @ 21 *arm_return [length = 12] baz: str r4, [sp, #-4]! @ 25 *push_multi [length = 4] mov r2, r0 @ 2 *arm_movsi_vfp/1 [length = 4] ldr r4, [r1, #5]! @ unaligned @ 9 unaligned_loadsi/2 [length = 4] ldr ip, [r1, #4] @ unaligned @ 10 unaligned_loadsi/2 [length = 4] ldr r1, [r1, #8] @ unaligned @ 11 unaligned_loadsi/2 [length = 4] str r4, [r2, #5] @ unaligned @ 12 unaligned_storesi/2 [length = 4] str ip, [r2, #9] @ unaligned @ 13 unaligned_storesi/2 [length = 4] str r1, [r2, #13] @ unaligned @ 14 unaligned_storesi/2 [length = 4] ldmfd sp!, {r4} bx lr With -march=armv6 you get a byte-by-byte field access and a correct unaligned block copy: bar: ldrb r1, [r0, #2] @ zero_extendqisi2 ldrb r3, [r0, #1] @ zero_extendqisi2 ldrb r2, [r0, #3] @ zero_extendqisi2 ldrb r0, [r0, #4] @ zero_extendqisi2 orr r3, r3, r1, asl #8 orr r3, r3, r2, asl #16 orr r0, r3, r0, asl #24 bx lr baz: str r4, [sp, #-4]! mov r2, r0 ldr r4, [r1, #5]! @ unaligned ldr ip, [r1, #4] @ unaligned ldr r1, [r1, #8] @ unaligned str r4, [r2, #5] @ unaligned str ip, [r2, #9] @ unaligned str r1, [r2, #13] @ unaligned ldmfd sp!, {r4} bx lr readelf -A shows that the compiler planned to use unaligned access in both. My suspicion is that GCC is using the extv pattern to extract the field from memory, and that pattern is only enabled for Thumb-2 capable cores. I've logged PR55218. We'll discuss it at our next meeting. -- Michael

12 years, 4 months

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[ACTIVITY] 11-15 Feb 2013

by Christophe Lyon

== Progress == * smin-umin: spawned build jobs for gcc-trunk with 'coalesce-vars' patch reverted (from A.Oliva), so that I can then run benchmarks to compare its effect with the one observed on gcc-4.7. * libasan: thanks to Peter, I am able to run sample programs under qemu. Ran GCC testsuite, observed some failures, to be investigated. * vectorizer cost model: committed upstream in 4.8. * Released gcc-linaro-4.6-2013.02 and gcc-linaro-4.7-2013.02. * backported 'turnoff 64 bits ops in Neon' from upstream to gcc-linaro-4.7. Waiting for builds to complete to launch benchmark jobs. * internal tasks == Next == * smin-umin: look at benchmarks results if available * libasan: analyse testsuite results * 64bits ops in Neon; look at benchmarks results if available * get more codec samples Christophe.

12 years, 4 months

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[ACTIVITY] 11-15 Feb 2013

by Yvan Roux

== Progress == * February merge 4.6 and 4.7 - Another issue raised by Matthias, fix merged. - The merge request exposed a new failure on i686 (ld seg. fault) which looks like the ones we had on i686 before the release, re-spawned the job to see if we can reproduce. * Boehm GC AArch64 support: - Fixed some defect, identified some cases not implementable by atomic builtins, worked on inline asm versions. - re-installed working environment to be able to test the gcc integration (thanks to Matt) * Aarch64 porting meeting: - No new requirements. == Next == * Review roster. * Boehm GC AArch64 support: - fix libatomic_ops - validate GCC's Boehm gc integration * libunwind aarch64 support: - continue.

12 years, 4 months

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[ACTIVITY] 11th Feb 2013 - 15th Feb 2013

by Omair Javaid

== This Week === * Got the remote Pandaboard RootFS updates, Thanks to Dave again. * Got the SSH tunnels going for remote GDB test suite executions, thougt a single remote run takes eternity to complete. * Analysis of GDB test suite log files separated the failures and other test cases which were not passed as for the analysis. * Preliminary analysis done on GDB logs for remote configuration on ARM in comparison with native configuration. == Next week == * Try to complete log file analysis and post results. * Try to run GDB test suite using QEMU. * Follow up on hong kong visa application -- *** Sorry about spamming I got the subject wrong in the first email.

12 years, 4 months

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[ACTIVITY] 4th Feb 2013 - 8th Feb 2013

by Omair Javaid

== This Week === * Tried running GDB test suite with QEMU linux user-mode with not much success * Configured Pandaboard and ran GDB test suite in native and native-gdbserver configurations. * More of office setup and purchase of some bits and pieces * Gateway set up and Pandaboard access finally worked after some help from Dave and Matt. * Finally purchased Ticket for the Connect and also filled visa application * Attended Weekly toolchain call * Still suffering from a bad run of cough n flu, done with antibiotics now. * Public Holiday on 5th Feburary == Next week == * Continue with Analysis of GDB status on ARM in different configurations possible. * SSH tunnels and port forwarding setup to gateway and lab for smooth access. * Follow up on hong kong visa application

12 years, 4 months

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[ACTIVITY] 11-15 Feb 2013

by Venkataramanan Kumar

== Progress == * Implementing GC sections support in binutils Wrote a patch to update some AARCH64 GOT and PLT symbol ref counts while sweeping sections. During "make ld-check" some tests are not running. Checking the issue. Discussed with Matt and decided to use default gc_mark hook. Most ports care BFD_RELOC_VTABLE_INHERIT and BFD_RELOC_VTABLE_ENTRY relocs during gc section marking. Now these relocs are not supported in AARCH64. * Analysis on jump threading in GCC Switch cases are not lowered in GCC till RTL expand stage. Looking at a patch on lowering switch to GIMPLE and see jump threading behaves. Misc ------ * Attend tool chain weekly meet, and stand up call * Had a look at one x86_64 related GCC build error. == Next week == * Continue Implementing GC sections support in binutils and test the patch. * Continue analysis on jump threading in GCC. Planning to look at Tree VRP as per Andrew pinski suggestion.

12 years, 4 months

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Hard Floating Point Question

by Derek Rollend

Hello, I am currently trying to determine how much I can optimize OpenCV using the ARM's VFP and the Linaro nano image. I have downloaded the arm-linux-gnueabihf-gcc & arm-linux-gnueabihf-g++ compilers, successfully cross-compiled OpenCV using those compilers (with -O3 -mfloat-abi=hard -ftree-vectorize -funroll-loops), and compiled an example OpenCV program with the arm-linux-gnueabihf-g++ compiler (with the same flags). However, when I try and run my executable within Linaro (running on a gumstix overo) I get "/lib/arm-linux-gnueabihf/libm.so.6: version `GLIBC_2.15' not found (required by /usr/lib/libopencv_core.so.2.2). I assume that this is because on my build machine (x86 Ubuntu 10.04) where I cross compiled the OpenCV libraries I am using libc-2.15, and on the target (gumstix) the loader can't find libc-2.15. However, within the gcc-linaro-arm-linux-gnueabihf-4.7 tar ball I downloaded today, there is a libc-2.15.so file in there that I copied into /lib/ on the gumstix. Still no success though when I try running my executable. Any recommendations on things to try? I am hesitant to just put a newer version of glibc in Linaro as it seems like that could screw a lot of things up. Should I attempt to re-build OpenCV somehow with an older version of glibc (namely libc-2.13)? Also, please let me know if this is the wrong forum for this question and where I should post it instead. Thanks, Derek

12 years, 4 months

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[ACTIVITY] 11 - 15 Feb

by Kugan Vivekanandarajah

== Progress == -Spawned CBUILD tasks with and without the patch proposed by Chung-Lin Tang to test current status of "Fix EPILOGUE_USES regression in CoreMark". Job is still in the queue. -Read references listed in gcc/ira.c to understand gcc IRA and went through the source code. -Experimented with simple test cases to analyse IRA debug output. == Plan for next week == - Analyse CoreMark results if ready and work on improvements. - Start with research for Removing unnecessary zero/sign extends when not working on "Fix EPILOGUE_USES regression in CoreMark.

12 years, 4 months

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[ACTIVITY] 11 - 15 Feb

by Renato Golin

== Progress == * Vectorizer - Progressing on the global structure alias analysis (discussions, drafts, failed attempts) - Interesting Linpack results for vectorizer, investigating performance - http://www.systemcall.org/blog/2013/02/llvm-vectorizer/ - http://llvm.org/bugs/show_bug.cgi?id=15247 * Buildbots - Took Chromebook out, since Pandas are fast enough - Creating LNT test-suite buildbot - http://llvm.org/viewvc/llvm-project?view=revision&revision=175081 - http://lab.llvm.org:8011/builders/clang-native-arm-lnt - Still a few rounds until it works properly * Distributed Builds - Distributed compilation works somewhat on Pandas - http://www.systemcall.org/blog/2013/02/distributed-compilation-on-a-pandabo… - It's better, cheaper and easier to use Chromebooks / Arndales, though... * LAVA - Tracking LLVM git repo in git.linaro.org - Trying to build from that repo, LAVA doesn't like it... :/ * EuroLLVM - We're not sponsoring it any more, will still help organize == Plan == * Continue Global Alias Analysis, I seem to be getting close to something worth sending (and learning a lot in the process) * Make sure LNT buildbot is up and running with vectorizer (O3) * Check with Dave Piggot why git.linaro doesn't work with LAVA * Inspect why some (loop+bb) vectorized results are poor on ARM

12 years, 4 months

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[ACTIVITY] report week 7

by Peter Maydell

Progress: * rebased qemu-linaro and sorted out with Serge what he requires in the way of patches for Ubuntu's upcoming code freeze. I plan to set up and test the 2013.03 release a week or two early both so that there is a patchset ready for the Ubuntu freeze and also to avoid clashing with Connect week. * some patches to clean up QEMU's logging functions so they can be used more widely in place of ad-hoc printf * cleanup patchset to get rid of sysbus_add_memory() function * LP:1079080 -- fixed serious bug in QEMU's Thumb-mode srs insn * upstream discussion about what to do about QEMU's disassembler license-clash issues: http://lists.gnu.org/archive/html/qemu-devel/2013-02/msg02122.html * NB: I now work a 4 day week, excluding Wednesdays -- PMM

12 years, 4 months

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[ANNOUNCE] Linaro GCC 4.7 and 4.6 2013.02 released

by Christophe Lyon

The Linaro Toolchain Working Group is pleased to announce the 2013.02 release of both Linaro GCC 4.7 and Linaro GCC 4.6. Linaro GCC 4.7 2013.02 is the eleventh release in the 4.7 series. Based off the latest GCC 4.7.2+svn195745 release, it includes ARM-focused performance improvements and bug fixes. Interesting changes include: * Updates to GCC 4.7.2+svn195745 * Includes arm/aarch64-4.7-branch up to svn revision 195716 * Support for Cortex-A7 backported from trunk Linaro GCC 4.6 2013.02 is the 24th release in the 4.6 series. Based off the latest GCC 4.6.3+svn195744 release, this is the eleventh release after entering maintenance. Interesting changes include: * Updates to 4.6.3+svn195744 The source tarballs are available from: https://launchpad.net/gcc-linaro/+milestone/4.7-2013.02 https://launchpad.net/gcc-linaro/+milestone/4.6-2013.02 Downloads are available from the Linaro GCC page on Launchpad: https://launchpad.net/gcc-linaro More information on the features and issues are available from the release pages: https://launchpad.net/gcc-linaro/4.7/4.7-2013.02 https://launchpad.net/gcc-linaro/4.6/4.6-2013.02 Mailing list: http://lists.linaro.org/mailman/listinfo/linaro-toolchain Bugs: https://bugs.launchpad.net/gcc-linaro/ Questions? https://ask.linaro.org/ Interested in commercial support? Inquire at support(a)linaro.org

12 years, 4 months

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aarch64 does not run

by Wink Saville

I downloaded the aarch64 binaries to a ubuntu machine: wink@ssi-primary:~$ uname -a Linux ssi-primary 3.5.0-21-generic #32-Ubuntu SMP Tue Dec 11 18:51:59 UTC 2012 x86_64 x86_64 x86_64 GNU/Linux And when I try to run gcc-4.7.3: wink@ssi-primary:~$ ls -al ~/aarch64-toolchain/gcc-linaro-aarch64-linux-gnu-4.7+bzr115029-20121015+bzr2506_linux/bin/aarch64-linux-gnu-gcc-4.7.3 -rwxr-xr-x 1 wink wink 553068 Oct 18 14:21 /home/wink/aarch64-toolchain/gcc-linaro-aarch64-linux-gnu-4.7+bzr115029-20121015+bzr2506_linux/bin/aarch64-linux-gnu-gcc-4.7.3 I get a file not found: wink@ssi-primary:~$ strace /home/wink/aarch64-toolchain/gcc-linaro-aarch64-linux-gnu-4.7+bzr115029-20121015+bzr2506_linux/bin/aarch64-linux-gnu-gcc-4.7.3 -v execve("/home/wink/aarch64-toolchain/gcc-linaro-aarch64-linux-gnu-4.7+bzr115029-20121015+bzr2506_linux/bin/aarch64-linux-gnu-gcc-4.7.3", ["/home/wink/aarch64-toolchain/gcc"..., "-v"], [/* 19 vars */]) = -1 ENOENT (No such file or directory) dup(2) = 3 fcntl(3, F_GETFL) = 0x8002 (flags O_RDWR|O_LARGEFILE) fstat(3, {st_mode=S_IFCHR|0620, st_rdev=makedev(136, 0), ...}) = 0 mmap(NULL, 4096, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0) = 0x7fa688be5000 lseek(3, 0, SEEK_CUR) = -1 ESPIPE (Illegal seek) write(3, "strace: exec: No such file or di"..., 40strace: exec: No such file or directory ) = 40 close(3) = 0 munmap(0x7fa688be5000, 4096) = 0 exit_group(1) = ? I must have done something real stupid, any help appreciated. -- Wink

12 years, 4 months

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[ACTIVITY] 11-12 February 2013

by Matthew Gretton-Dann

== Progress == * Very short working week. * Discussions about next steps in Lava integration. * Followed up on Arndale/GCC build issues. == Next week == * Review pending Backports * Investigate bootstrap ICE PR56184 further == Future == * Run HOT/COLD partitioning benchmarks * Analyse ARM results * On x86_64 to see what the actual benefit we could get * fix-gcc-multiarch-testing * Come up with strawman proposal for updating testsuite to handle testing with varying command-line options. -- Matthew Gretton-Dann Linaro Toolchain Working Group matthew.gretton-dann(a)linaro.org

12 years, 4 months

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[ACTIVITY] 4-8 Feb 2013

by Christophe Lyon

== Progress == * 64-bits ops in Neon: upstream accepted the patch for gcc-4.9-stage1 * smin-umin: several benchmarks runs necessary to confirm that the generic patch I suspected actually caused the regression. However, it also brings improvements in other benches (office-type). * looked at libasan: very little configuration seems necessary, but running a sample program under qemu leads to asan runtime complains. * internal tasks == Next == * smin-umin: run benchmarks on trunk to confirm the regression is also present. * vectorizer cost model: handle Richard's feedback. * get more codecs sample codes. * libasan: understand error messages Christophe.

12 years, 4 months

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[ACTIVITY] 4-8 Feb 2013

by Yvan Roux

== Progress == * February merge 4.6 and 4.7 - backport a patch from upstream to resolve conflicts - this backport introduced some merge issues - fix pushed and merge request ongoing * Boehm GC AArch64 support: - libatomic_ops maintainer rework the patch to make the usage of gcc atomic builtins available on the other targets - test exhibit some failures * libunwind aarch64 support - bug status moved to critical - configuration and machine description done - implementation ongoing * Aarch64 porting meeting: - Cancelled this week == Next == * February merge 4.6 and 4.7 - log new testsuite failures in launchpad * Boehm GC AArch64 support: - fix libatomic_ops - validate GCC's Boehm gc integration * libunwind aarch64 support - conitnue.

12 years, 4 months

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gcc-4.7 fsf merge has some issues

by Matthias Klose

looking at http://bazaar.launchpad.net/~linaro-toolchain-dev/gcc-linaro/4.7/revision/1… the first chunk of gcc/Makefile.in was wrongly merged. The first "# Multiarch support" should be removed. Same for gcc/configure.ac. gcc/configure needs to be regenerated. Thanks, Matthias

12 years, 4 months

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[ACTIVITY] 4-8 Feb 2013

by Venkataramanan Kumar

== Progress == * Implementing GC sections support in bintuils Looking at aarch64 relocations to consider while sweeping. * Cbuild experiments to test gcc svn aarch64 4.7 branch. Connection problems to the cbuild machines are solved now. Thanks to Matt. Spawned the build. Misc ------ * Attend tool chain weekly meet, and stand up call * Had a look at one x86_64 related patch that gone into GCC trunk. == Next week == * Continue Implementing GC sections support in binutils. * Start analysis on jump threading in GCC.

12 years, 4 months

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[ACTIVITY] 4-8 Feb 2013

by Kugan Vivekanandarajah

== Progress == -Attended 1:1 and other team meetings -Read linaro wiki and on boarding instructions -Backported Cortex A7 pipeline description to Linaro 4.7 gcc from fsf trunk and got it reviewed == Plan for next week == - Look into CoreMark regresses in Thumb-2 mode when using the LR regnum. - Start with research for Removing unnecessary zero/sign extends

12 years, 4 months

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[ACTIVITY] report week 6

by Peter Maydell

Progress: * Linaro's KVM/QEMU mini-summit, aimed at summarising current status, identifying what needs to be done and what Linaro should be doing: https://wiki.linaro.org/LEG/Engineering/Virtualization/201302MiniSummit * implemented support for variable-length qdev array properties in QEMU and sent out patch for this plus vexpress fixes which use it * investigated how to run the Linux Test Project syscall tests under QEMU to improve the quality of our linux-user mode testing (wrote up a howto for the QEMU wiki: http://wiki.qemu.org/Testing/LTP many thanks to fabo for whipping up a Jenkins job to run these nightly) * couple of trivial linux-user patches as example low-hanging fruit revealed by the LTP test results -- PMM

12 years, 4 months

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[ACTIVITY] 4-8 Feb 2013

by Renato Golin

== Progress == * Buildbots - Setting up Chromebook with a buildbot - http://llvm.org/viewvc/llvm-project?view=revision&revision=174421 - http://lab.llvm.org:8011/builders/clang-native-arm-cortex-a15 - 1h25min builds (3x faster than Pandas) * LAVA - Trying LLVM builds on Arndale - GCC segfaults: - "The bug is not reproducible, so it is likely a hardware or OS problem." * Distributed Panda - Setting up the boards, getting distcc on them - Speedup is squat (1.9%) because of too many parallel linking - Need to add LD to a group with less resources on Ninja * Vectorization - Reviewing some patches, discussing implementation details - Vectorization vs. O3 speedup: 2.5x ~ 3.0x (on both ARM and x86_64) - Working on global structure alias analysis * LLVM - Campaigning for integrates-as to be turned on by defaultfor ARM - ARM seems interested in fixing the eventual bugs - Adding 'armv7l' triple to default to 'cortex-a8' - http://llvm.org/viewvc/llvm-project?view=revision&revision=174466 - Campaining for buildbots to use CMAke/Ninja * EuroLLVM - Followup meeting, securing funding == Plan == * Change buildbots to not "make clean", try cmake * Try to reduce parallel linking flood, try one more panda * Continue with global structure alias analysis * Try to setup a test-suite buildbot

12 years, 4 months

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[ACTIVITY] 4-8 Feb 2013

by Matthew Gretton-Dann

== Progress == * Welcomed Kugan to the team working on GCC * Welcomed James Elliott to the team as project manager * Found Cortex-A9 bootstrapping issue raised as PR56184 * Fixed build issues in GCC and GDB. * Patch reviews. == Next week == * Investigate PR56184 further. == Future == * Run HOT/COLD partitioning benchmarks * Analyse ARM results * On x86_64 to see what the actual benefit we could get * fix-gcc-multiarch-testing * Come up with strawman proposal for updating testsuite to handle testing with varying command-line options. -- Matthew Gretton-Dann Toolchain Working Group, Linaro

12 years, 4 months

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using linaro toolcahin to cross compile simple .c file

by Swati Deshmukh

hi, i am using linaro toolcahin binaries to execute simple .c file , so that it creates ARM executable output file i can run on Linaro installed on Hackberry board. this are the all steps i follwed from beginnng.. please let me know if i am missing something here.. 1. i have downloaded gcc for ubuntu from this link https://launchpad.net/linaro-toolchain-binaries/+milestone/2012.04 2. on ubuntu, i did tar xjf gcc-linaro-arm-linux-gnueabi-2012.04-20120426_linux.tar.bz2 export ARM_CROSS_TOOLS=pwd/gcc-linaro-arm-linux-gnueabi-2012.04-20120426_linux/bin/arm-linux-gnueabi- export ARMCC=${ARMEL_CROSS_TOOLS}gcc & then $ARMCC hello.c it created a.out (which is simple executable file and not ARM executable) What i am doing wrong here? i am not getting how do i need to configure gcc . please revert back ASAP! Thanks & regards, Swati The contents of this e-mail and any attachment(s) may contain confidential or privileged information for the intended recipient(s). Unintended recipients are prohibited from taking action on the basis of information in this e-mail and using or disseminating the information, and must notify the sender and delete it from their system. L&T Infotech will not accept responsibility or liability for the accuracy or completeness of, or the presence of any virus or disabling code in this e-mail"

12 years, 4 months

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Multiarch

by Christopher Covington

Hi, It seems to me that your current toolchain releases [1] don't default to a multiarch layout. Am I looking in the right place? Do you anticipate enabling multiarch in the future? Is doing this currently blocked by limitations in tools such as crosstool-ng? 1. http://releases.linaro.org/13.01/components/toolchain/binaries Thanks, Christopher -- Employee of Qualcomm Innovation Center, Inc. Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by the Linux Foundation

12 years, 4 months

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AArch64 built by default in LLVM

by Renato Golin

As of revision 174322, AArch64 back-end is compiled by default on all architectures. This means it'll be built and tested on all platforms and it'll get heavy bombardment of the changes in the front- and middle-end without breaking for too long. Thanks Tim for the hard work! cheers, --renato

12 years, 4 months

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[ACTIVITY] 28 January - 1 February 2013

by Yvan Roux

== Progress == * Boehm GC AArch64 support: - Added information to the libatomic_ops patch, stiil under review - backported AArch64 support to the GCC boehm-gc, test on-going * Libunwind AArch64 support: - started. * Aarch64 porting meeting: - request to move to eglibc 2.17 (done by Zhenqiang) * LCA13: - hotel and plane booked == Next == * Validate boehm-gc GCC integration * Libunwind AArch64 support

12 years, 4 months

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[ACTIVITY] 28th Jan 2013 - 1st Feb 2013

by Omair Javaid

== This Week === * Joined Linaro, had welcome meeting with Matt * Set up my office at home * Laptop purchased and had it ready for development * Exchanged emails with various people for getting started and read a lot of administrative material on the wiki pages. * Registered for the connect, figured out visa process and sent request to Arwen for required documents. * Attended Weekly toolchain call, stand-up call and 1:1 with Matt. * Started work on GDB Testing in various configurations for analysis of current GDB status on ARM. * Build GDB on x86_64 machine and had test suite run in local and remote configuration. * Suffered from a bad run of cough n fever. == Next week == * Continue with Analysis of GDB status on ARM, hopefully get to access a pandaboard remotely and setup QEMU as well. * Apply for Hong Kong Visa for the connect. * Visit local market to resolve pending office setup and hardware requirements. * More Wiki reading and getting to know different processes at Linaro. * 5th February public holiday in Pakistan.

12 years, 4 months

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[Activity] Week 05

by Zhenqiang Chen

Summary: * Linaro toolchain binary 2013.01 release * Move to using EGLIBC 2.17 in aarch64 build Details: 1. Linaro toolchain binary. * Document on how to do release test. * Help Bero on 2013.01 release. * Investigate lp:1107659. Crosstool-ng upstream has a workaround fix. 2. Move to using EGLIBC 2.17 in aarch64 build. * Update Linux version to 3.7.0 since eglibc 2.17 configure "checking for kernel header at least 3.7.0". * Migrate local patches for eglibc 2.16 to 2.17 and update the config to 2.17 * Package build is OK. Test on simulation is ongoing. 3. Collect SPEC performance for different branch costs. * The total results wave less than 0.5%. * Three cases have 1-2% regression for smaller branch cost. Will analyze the detail impact for the three cases. Plan: * Investigate coremark performance impact for different branch costs. * Commit EGLIBC 2.17 changes Planed leaves: * Feb. 9 - 15: Chinese Spring Festival. Best Regards! -Zhenqiang

12 years, 4 months

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[ACTIVITY] 28 January - 1 February 2013

by Venkataramanan Kumar

== Progress == * Backport Tested and backported patch written to CSE optmize compares. http://gcc.gnu.org/ml/gcc-patches/2013-02/msg00015.html Ran GCC regression suite with ARMV8 foundation model for aarch64-none-elf * Implementing GC sections support in bintuils Had a quick look at changes need to be added. Reading about relocations that needed to considered for elf_backend_gc_sweep_hook * Tried using Cbuild for buildign and testing gcc4.7 aarch64 branch. ssh keys are not in sync. I am getting permission denied. Cheking with David and Andy in valdation team. Misc * Attend tool chain weekly meet, and stand up call * Attend usual AMD meetings * Performed one x86_64 AMD task * Booked tickets, hotel and got invite letter for Linaro connect. == Next week == * Complete Cbuild experiments to test gcc svn aarch64 4.7 branch. * Continue gc section support. Implement elf_backend_gc_sweep_hook

12 years, 5 months

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[ACTIVITY] 28 January - 1 February 2013

by Christophe Lyon

== Progress == * 64-bits ops in Neon: No news from upstream. * vectorizer cost model: added possibility to tune the problem by processor type. * smin-umin: regression actually caused by a previous patch brought when merging bswap16 support. Investigation on-going. * managed to run spec2k on local board. Need to upload tools compiled for hf platform. * tcpanda heat problems: GCC testsuite passed. * hot-cold partitioning: posted a follow-up to google patches on gcc-patches. * looked at some codecs needing improvements (Neon intrinsics usage) * feedback on lava/cbuild integration * hotel/plane booked for Connect. == Next == * handle 64-bits bitops in Neon feedback from upstream if any * smin-umin: check bench results with probable culprit patch reverted. Will need investigation on trunk too. * vectorizer cost model: check bench results * get more codecs sample codes.

12 years, 5 months

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[ACTIVITY] report week 5

by Peter Maydell

Activity: * calls and meetings * last bits and pieces of ARM QEMU patches sent prior to upstream 1.4 hardfreeze * continuing fixes for running a 3.8-rc4 vexpress kernel on QEMU: * refactored the way we handle SYS_CFG vexpress registers so it's possible to reasonably add support for more of them * put together a basic implementation of the various regs we're missing (oscillator, voltage, and some misc) * ideally this would be done via variable-length qdev array properties; started looking at how hard those would be to implement * investigated linux-user bug where an edge case in use of get_user_u32() had accidentally been broken; sent patch * all travel/hotels now booked for Connect -- PMM

12 years, 5 months

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[ACTIVITY] 31 Jan - 1 Feb

by Matthew Gretton-Dann

== Progress == * Welcomed Omair to the team working on GDB * Starting investigating cortex-a9 bootstrap failure * Blueprints updating * Preparing for two new starters next week == Next week == * Welcome two new members to the team. * Finish cortex-a9 bootstrapping investigations == Future == * Run HOT/COLD partitioning benchmarks * Analyse ARM results * On x86_64 to see what the actual benefit we could get * fix-gcc-multiarch-testing * Come up with strawman proposal for updating testsuite to handle testing with varying command-line options. -- Matthew Gretton-Dann Toolchain Working Group, Linaro

12 years, 5 months

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[ACTIVITY] 28-31 Jan

by Renato Golin

== Progress == * Maintenance - Fixing ARM buildbots, poking people to fix bugs, keeping them green - http://llvm.org/viewvc/llvm-project?view=rev&revision=173510 * Cost Model - Fixing some bugs on the generic code - http://llvm.org/viewvc/llvm-project?view=rev&revision=173691 - Adding some simple free cast (plus some infrastructure) - http://llvm.org/viewvc/llvm-project?view=rev&revision=173849 * LLVM - Investigating APFloat issue on Chromebook (bad libraries?) - Clang miscompiles and show same synthoms, will play with options next week - AArch64 back-end in, to be built by default * LAVA - Got three last errors due to include path ('bits/predefs.h' file not found) - libc6-dev + libstdc++-dev have no effect, problem doesn't show on buildbots - Testing heating problem with multiple images (only 12.02 is good) - Testing other boards, other images (with Dave) * Friday Holiday == Plan == * Try a bit more on the APFloat issue in Chromebook, but I think that's just bad distro (ChrUbuntu), since no one else has this problem. Has anyone put any Linaro image on a Chromebook? * Continue working on getting faster builds on LAVA (quad-core origen, Arndale, etc) with Dave Pigot. * Continue micro-benchmarking the vectorization and updating the cost-model. Start discussing the side-effects that are not modelled at all.

12 years, 5 months

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[ANNOUNCE] Linaro Toolchain Binaries 2013.01 released

by Bernhard Rosenkränzer

The Linaro Toolchain Working Group and Platform Team are pleased to announce the 2013.01 release of the Linaro Toolchain Binaries, a pre-built version of Linaro GCC and Linaro GDB that runs on generic Linux or Windows and targets the glibc Linaro Evaluation Build. Uses include: * Cross compiling ARM applications from your laptop * Remote debugging * Build the Linux kernel for your board What's included: * Linaro GCC 4.7 2013.01 * Linaro GDB 7.5 2012.12 * A statically linked gdbserver * A system root * Manuals under share/doc/ The system root contains the basic header files and libraries to link your programs against. The Linux version is supported on Ubuntu 10.04.3 and 12.04, Debian 6.0.2, Fedora 16, openSUSE 12.1, Red Hat Enterprise Linux Workstation 5.7 and later, and should run on any Linux Standard Base 3.0 compatible distribution. Please see the README about running on x86_64 hosts. The Windows version is supported on Windows XP Pro SP3, Windows Vista Business SP2, and Windows 7 Pro SP1. The binaries and build scripts are available from: https://launchpad.net/linaro-toolchain-binaries/trunk/2013.01 Need help? Ask a question on https://ask.linaro.org/ Already on Launchpad? Submit a bug at https://bugs.launchpad.net/linaro-toolchain-binaries On IRC? See us on #linaro on Freenode. Other ways that you can contact us or get involved are listed at https://wiki.linaro.org/GettingInvolved.

12 years, 5 months

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Newbie question

by Kalai Narayanan-SSI

Hi, I have a few armv7 assembly tests. I'm trying to compile these using the linaro aarch64 toolchain and I'm getting errors. Is there any specific flag that I have to pass to enable backward compatibility to allow v7 assembly to be compiled for a v8 model? reset.s: Assembler messages: reset.s:32: Error: operand 1 should be an integer register -- `mov r0,#0' reset.s:33: Error: unknown mnemonic `mcr' -- `mcr p15,0,R0,C13,c0,1' reset.s:36: Error: unknown mnemonic `mrc' -- `mrc p15,0,r0,c1,c0,0' reset.s:40: Error: operand 1 should be a SIMD vector register -- `orr r0,r0,#0x00001000' .... Relevant assembly code: .... _reset: // init Context ID Register MOV r0, #0 MCR p15, 0, R0, C13, c0, 1 // Enable Instruction cache mrc p15, 0, r0, c1, c0, 0 /* set bits: 12 = I i-cache */ orr r0, r0, #0x00001000 mcr p15, 0, r0, c1, c0, 0 ..... This is my assembler command: aarch64-linux-gnu-as -march=armv8-a+fp --keep-locals -o "reset.o" "reset.s" Thanks, Kalai

12 years, 5 months

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[ACTIVITY] 21-25 January 2013

by Christophe Lyon

== Progress == * 64-bits ops in Neon: waiting for upstream. * vectorizer cost model: initial activation with unaligned load/store cost equal to aligned ones; benchmarking shows no significant difference. * smin-umin: a few benchmarks show a few unexpected regressions (10-15%). * setting up spec2k on local board * tcpanda heat problems: GCC built OK. Don't know how hot it became. == Next == * handle 64-bits bitops in Neon feedback from upstream if any. * analyze regressions in smin-umin * check if more tuning of the vectorizer cost model is desirable. * finish local board setup * tcpanda: run gcc testsuite to check heat

12 years, 5 months

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[ACTIVITY] 21-25 January 2013

by Yvan Roux

== Progress == * Boehm GC AArch64 support: - Tested on Foundation model - Patches sent to mailing list - Boehm GC has been accepted and merged into mainline - Libatomic_ops under review, some improvements are needed. == Next == * Boehm GC AArch64 support: - Fix libatomic_ops for mainline merge * Start gc sections support for AArch64 binutils * Review roster

12 years, 5 months

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[Activity] Week 04

by Zhenqiang Chen

Summary: * Investigate Automotive benchmark performance on different branch cost. Details: 1. Automotive benchmark performance analysis for different branch cost on Pardaboard ES. * Design small test cases to simulate bitmnp01 to compare the performance between ITTT and conditional branch. Test results show - If branch prediction does not work (put the codes in a function), ITTT is always better than conditional branch. - If branch prediction works (inline the codes t in the loop body), for most cases, conditional branch is better than ITTT. * Code alignment has big impact for tblook01. By default IT block has better performance. When adding __attribute__((aligned (16))) for function t_run_test, performance of conditional branch is better than IT block. 2. Prepare Linaro toolchain binary release. * Update Linaro crosstool-ng local patches due to the fix of lp:1067766 in source package. * Spawn all builds and smoke tests. Plan: * Investigate SPEC2k performance for different branch costs. * Work with Bero for 2013.01 toolchain binary release . Planed leaves: * Feb. 9 - 15: Chinese Spring Festival. Best Regards! -Zhenqiang

12 years, 5 months

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[ACTIVITY] 21-25 Jan

by Renato Golin

== Progress == * Buildbot - Taking buildbot to Linaro - Had wireless/GPU overheating, disabled kernel modules - Running smooth again (most of the time) - Debugging errors that only appear on ARM. * Building and Testing LLVM - Compiling on Intel with only the ARM backend helps a lot - Sent a call for Action to people clean up cross-compilation failures * LAVA - Progress on LAVA LLVM job - Got it checking out, configuring and building - Got PASS/FAIL/SKIP patterns working - https://validation.linaro.org/lava-server/scheduler/job/46027 - Need to get a patch from a specific place to apply * Cost Model - Re-wrote table lookup patch a few times, finally in for good - http://llvm.org/viewvc/llvm-project?rev=173382&view=rev - Studying costs of instructions, all seem good enough - Better approach now is to change the target description (less code, more gain) * EuroLLVM - 136 people so far == Plan == * Test distcc (or similar) on Pandas * Get a buildbot running with cross-compilation * Internal git repository for LAVA LLVM job * Confirm Linaro's sponsorship for EuroLLVM * Continue cost model changes in between == Background == * Monitor list for ARM changes * Monitor buildbot for failures

12 years, 5 months

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[ACTIVITY] report week 04

by Peter Maydell

Activity: * calls and meetings (about 20% of my working week this week ;-)) * finished rebasing and testing the KVM QEMU patches (thanks to Pawel for getting me an updated RTSM device tree), sent out updated version to go with -v17 kernel * minor qemu maintenance patches (including a minor cfi01 flash model bugfix) * trying to track down issues running a 3.8-rc4 vexpress kernel on QEMU. Among other things: * looks like we need to emulate some more of the oscillator and voltage config registers now (if only to make the kernel a bit quieter) * the kernel doesn't like the way qemu's boot loader puts the DTB blob after the initrd but beginning in the same page as the initrd ends [free_initrd_mem will trash memory outside the initrd proper but inside that last page] * a15 reports the wrong board model number -- PMM

12 years, 5 months

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AArch64 cross compile

by naveen yadav

Dear All, Is it possible to compile ARCH "AArch64 " for 32 mode, like if I have x86 64 bit machine and I install 32 bit OS on it, and machine is compatible with 32 bit binary. So is it possible to use AARCH64 (Cortex-V8) with installation of kernel 32 bit and use 32 bit tool chain. If answer is yes, can I build tool chain or is there option available in linaro cross-compile available from https://launchpad.net/linaro-toolchain-binaries/+milestone/2012.12 Thanks

12 years, 5 months

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[ACTIVITY] report week 03

by Peter Maydell

Activity: * usual set of calls and meetings (and there is another KVM related weekly meeting in the pipeline...) * reviewed virtio patches * rebased qemu-linaro on upstream * rebased KVM patches; couldn't get updated kernel to run on RTSM (probably a device tree or config issue; need to attack problem again this week) NB: I'm currently working a reduced set of hours due to RSI, though I am trying to remain responsive to email etc. -- PMM

12 years, 5 months

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[ACTIVITY] 14-18 January 2013

by Yvan Roux

== Progress == * Prepared Venkat on-boarding. * Aarch64 porting meeting: - libunwind is in the pipe * Boehm GC AArch64 support: - basic port done, test on-going == Next == * Boehm GC AArch64 support: - test and ask for up stream review.

12 years, 5 months

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[Activity] Week 03

by Zhenqiang Chen

Summary: * Investigate automotive benchmark. * Linaro gcc 4.6 release Details: 1. Automotive benchmark performance analysis for different branch cost for Cortex-A9. * Debug function WriteOut, which is called 12 times on average, leads common performance issue since the IF-THEN in the function is converted to IT block, which TRUE probability is less than 4%. * Identify the root cause of performance regression with IT block for bitmnp01, rspeed01, pntrch01 and ttsprk01. Overall, - The performance of a taken bpl is better than an ITTT. If this is a common sense, for IF-THEN, we'd set branch-cost to 1. - For IF-THEN-ELSE, we'd take branch probability into account when converting it to IT block. - ifcvt might generate useless IT block. 2. Try to do Linaro GCC release. But meet several issues: * Can not branch a clean lp:gcc-linaro/4.7. As a workaround, I had downloaded a clean bzr tree from other site. For next release, I can use the local tree to create the release tarball. * All a9hf-builder ubutests fail due to test environment issue. Plan: * Investigate more benchmarks for different branch costs. Planed leaves: * Feb. 9 - 15: Chinese Spring Festival. Best Regards! -Zhenqiang

12 years, 5 months

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[ACTIVITY] 14-18 January 2013

by Christophe Lyon

== Progress == * 64-bits ops in Neon: pinged patch proposal. * vectorizer cost model: received results from spec2k. Prepared initial tuning to submit to benchmarking again. * smin-umin: tests OK, benchmarks ran, but did not generate the diff over a valid ancestor. I didn't make the manual comparison yet. * updated board for local benchmarking * tcpanda heat problems: built a new kernel with the thermal driver; need to reboot the board with it == Next == * handle 64-bits bitops in Neon feedback from upstream if any * analyze results of benchmarking with vectorizer cost model * analyze results of benchmarking with smin-umin idiom patch * continue board setup/update; I will probably try to cross-build the benchmarks to avoid having the build GCC itself on the board and save time. * followup on tcpanda heat problems

12 years, 5 months

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[ACTIVITY] 14-18 Jan

by Renato Golin Linaro

== Progress == * Buildbots - Added a Panda ES buildbot on clang-native-arm-cortex-a9 group - Reporting and helping fix bot bugs on ARM - ARM buildbots are green again! - Each ARM buildbot takes 4h15min to complete, versus 15min on Intel - We're still testing up to 12-15 patches on each build, on peak times (PST) * LAVA - Created a test run for llvm check-all, infrastructure is there - Need to make it actually do some work * Vectorization - Refactored cost model's temp tables - http://llvm.org/viewvc/llvm-project?view=rev&revision=172658 - Studying NEON costs, changing ARM target lowering * test-suite A15 - Building LLVM on Chromebook, check-all (1h, 181 failures) - Self-hosting LLVM on Chromebook, check-all (50min, many more) - Found some floating point type errors, only on Chromebook (libs?) * AArch64 back-end - Reviewed patches, look ok, some comments - Should be all in by next week * LLVM cross-compilation woes - Had to define include path for c, c++ and arm locations - It calls the wrong assembler, even defining the right gnu toolchain - Someone needs to fix these cross-compilation bugs!! :) == Plan == * Finish basic NEON costs for vectorization * Finish LAVA bot compiling clang + check-all * Install Panda buildbot on rack * Continue investigating Chromebook failures * Continue thinking about the long term plan for LLVM

12 years, 5 months

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[ANNOUNCE] Linaro GCC 4.7 and 4.6 2013.01 released

by Zhenqiang Chen

The Linaro Toolchain Working Group is pleased to announce the 2013.01 release of both Linaro GCC 4.7 and Linaro GCC 4.6. Linaro GCC 4.7 2013.01 is the tenth release in the 4.7 series. Based off the latest GCC 4.7.2+svn194772 release, it includes ARM-focused performance improvements and bug fixes. Interesting changes include: * Updates to GCC 4.7.2+svn194772 * Includes arm/aarch64-4.7-branch up to svn revision 194808 * Support for the rev16 and revsh instructions * A15 Neon pipeline backported from trunk * FMA intrinsic backported from trunk * Better extending core to NEON transfers * Fused multiply-add support Fixes: * LP #1088898 regression of x86 gcc bootstrap with Linaro sourcebase * LP #1067766 Backport support for arm-linux-gnueabihf to GCC Linaro * LP #1084010 __atomic_load doesn't match ACQUIRE memory model Linaro GCC 4.6 2013.01 is the 23st release in the 4.6 series. Based off the latest GCC 4.6.3+svn194771 release, this is the tenth release after entering maintenance. Interesting changes include: * Updates to 4.6.3+svn194771 The source tarballs are available from: https://launchpad.net/gcc-linaro/+milestone/4.7-2013.01 https://launchpad.net/gcc-linaro/+milestone/4.6-2013.01 Downloads are available from the Linaro GCC page on Launchpad: https://launchpad.net/gcc-linaro More information on the features and issues are available from the release pages: https://launchpad.net/gcc-linaro/4.7/4.7-2013.01 https://launchpad.net/gcc-linaro/4.6/4.6-2013.01 Mailing list: http://lists.linaro.org/mailman/listinfo/linaro-toolchain Bugs: https://bugs.launchpad.net/gcc-linaro/ Questions? https://ask.linaro.org/ Interested in commercial support? Inquire at support(a)linaro.org

12 years, 5 months

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Thursday 17th January 2013 1600 UTC Performance Call cancelled

by Matthew Gretton-Dann

All, Due to items in the performance call being covered in other meetings, travel and other issues I have decided to cancel today's 1600 UTC call. Thanks, Matt -- Matthew Gretton-Dann Toolchain Working Group, Linaro

12 years, 5 months

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[PATCH] Cortex Strings AArch64 strnlen.S fix

by Marcus Shawcroft

This patch fixes an issue in the AArch64 strncmp implementation which occurs if ULONG_MAX-15 <= n <= ULONG_MAX. Matt, this is the last of my outstanding patches for cortex-strings. /Marcus

12 years, 5 months

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[PATCH] Cortex Strings AArch64 fix for strncmp.S

by Marcus Shawcroft

This patch fixes an issue in the AArch64 strncmp implementation which occurs if ULONG_MAX-15 <= n <= ULONG_MAX. /Marcus

12 years, 5 months

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AArch64 NEON polynomial types

by Renato Golin Linaro

Hi folks, On the LLVM list, Tim (ARM) is trying to push a patch to update the polynomial types on NEON to unsigned, on both 32-bits and 64-bits, since AArch32 says nothing and AArch64 specifies unsigned (char and short). Is there any such movement on the GCC end? The LLVM folks would rather this be a common move (or GCC first), than going solo and risk losing ABI compatibility. Any comments? cheers, --renato

12 years, 5 months

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Linking error - VFP register arguments

by Anup Kini

Hi All, I am trying to build OpenNI drivers and stuck with the following linker error. /usr/bin/ld: error: ../../Bin/Arm-Release/libOpenNI.so uses VFP register arguments, ./Arm-Release/XnBaseNode.o does not /usr/bin/ld: failed to merge target specific data of file ./Arm-Release/XnBaseNode.o /usr/bin/ld: error: ../../Bin/Arm-Release/libOpenNI.so uses VFP register arguments, ./Arm-Release/XnDump.o does not /usr/bin/ld: failed to merge target specific data of file ./Arm-Release/XnDump.o and many more of similar errors with VFP. System : ZYNC ZC702 board with ARM Cortex A9 dual core. OS: Linaro 12.04 LTS GCC - 4.6.3 Is there some flag i have to set in the Makefile to correct the Hard/Soft float type ? How do i figure out the correct one ? -- *Anup Kini *Systems Engineer**** * ------------------------------ * *Synapticon** * | Cyber-Physical System Solutions **** Direct:**** +49 7335 / 186 999 17**** Fax:**** +49 7335 / 186 999 1 **** **** synapticon.com <http://www.synapticon.com/> | @synapticon_co<https://twitter.com/#!/synapticon_co> **** Synapticon GmbH | Hohlbachweg 2 | 73344 Gruibingen, DE Secretary +49 7335 / 186 999 0 | General Manager: Nikolai Ensslen Registry Court Ulm HRB 725114 | USt-ID DE271647127**** This message and any files transmitted with it are confidential and intended solely for the use of the individual or entity to whom they are addressed. Please notify the sender immediately if you have received this e-mail by mistake and delete it from your system.

12 years, 5 months

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Possible toolchain bug with handling return value of read()

by Riku Voipio

Hi, The testcase at https://launchpadlibrarian.net/128616769/compare-test.c With aarch64: aarch64-oe-linux-gcc -o a-test ./compare-test.c ./a-test: fail ret: -1: Bad address With X86_64: gcc -o test ./compare-test.c ./test correct. ret: -1: Bad address setting -D_FILE_OFFSET_BITS=64 doesn't make a difference. This is with: gcc version 4.7.3 20121205 (prerelease) (Linaro GCC 4.7-2012.12) This was found while debugging: https://bugs.launchpad.net/linaro-aarch64/+bug/1099896 Riku

12 years, 5 months

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[MINUTES] Toolchain Working Group Weekly Meeting 14/Jan/2013

by Matthew Gretton-Dann

All, The minutes for today's calls are here: https://wiki.linaro.org/WorkingGroups/ToolChain/Meetings/2013-01-14 Action items are: TODO: Matt to investigate EEMBC Office gs8 failures ONGOING: Matt to talk to Dave Pigott about HF builders TODO: Matt blueprint backport of binutils 2.23.1 - backport just needs merging TODO: Matt to blueprint options for reducing QEMU based cross test noise TODO: Matt to unreserve Michael Hope's reservations TODO: Matt to look at why Cortex-A9 softfloat bootstraps fail in Stage2. TODO: Zhenqiang to do GCC Release: https://wiki.linaro.org/WorkingGroups/ToolChain/GCC/ReleaseProcess TODO: Matt to do Cortex Strings release. TODO: Matt chase up EEMBC Networking License TODO: Matt chase up with morvek who is leading KVM Virtual team. TODO: All to think of proposals for GNU Tools Caudron The agenda for next week's call is here: https://wiki.linaro.org/WorkingGroups/ToolChain/Meetings/2013-01-21 Please feel free to add your own agenda items before hand. Thanks, Matt -- Matthew Gretton-Dann Toolchain Working Group, Linaro

12 years, 5 months

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[Activity] Week 02

by Zhenqiang Chen

Summary: * Rebase and test the shrink-wrap patches. * Learn how branch cost impact on code generation. Details: 1. Rebase and test the shrink-wrap patches. * For pretend arguments, it is hard to generate correct dwarf info for case: * Add dwarf info for ldrd_pop. Testing is ongoing. * Expose an interface from regcpprog and do copy propagation for the entry block. Benchmark logs show there are much more functions can be shrink-wrapped. 2. Read codes and enhance ifcvt.c. * For IF-THEN-ELSE, if the last insn of then_bb or else_bb is ANY_RETURN_P, we can save one JUMP. In this, we'd keep max MAX_CONDITIONAL_EXECUTE, not "max *= 2". A patch is sent out for review. * Take the branch probability into account. Test is ongoing. 3. R/M toolchain related work. Plan: * Follow up the shrink-wrap dwarf info issue. * Investigate benchmarks which is impacted by different branch cost. Planed leaves: * Feb. 9 - 15: Chinese Spring Festival. Best Regards! -Zhenqiang

12 years, 5 months

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[ACTIVITY] 7-11 January 2013

by Yvan Roux

== Progress == * Short week again (leading compilation courses) * Merge request review - finished 4.6 and 4.7 requests. * Boehm GC AArch64 support - Back on this topic == Next == * Continue Boehm GC activity

12 years, 5 months

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[ACTIVITY] 7-11 Jan 2013

by Renato Golin Linaro

== This Week == * Livermore Loops - Test was badly adapted, failures were due to undefined behaviour - Removed from test-suite until a propper adaptation can be done - LTO and Static Analysis issues raised - http://llvm.org/bugs/show_bug.cgi?id=14851 - http://llvm.org/bugs/show_bug.cgi?id=14852 * LLVM Builds - Builds fine on Chromebook, same check-all failures as other ARM targets - test-suite fails, haven't had time to properly investigate - Getting a pandaboard to act as a buildbot - Creating a LAVA job to run often and on-demand internally * AArch64 in LLVM - reviewing lots of patches from ARM (Tim Northover) - full back-end just sent, will review over the weekend * Loop Vectorize - Some discussions with Tao Wang about cost models - Got some ideas on what are the best changes for LLVM's cost model - Not much on this front * EuroLLVM 2013 - Trying to define the level of sponsorship Linaro can provide - CFP will go out next week, committee created, conference confirmed * Commits http://llvm.org/viewvc/llvm-project?view=rev&revision=171642 http://llvm.org/viewvc/llvm-project?view=rev&revision=171859 == Next Week == * Get the LAVA job running - need account at people.linaro.org, RT created * Get at least one buildbot in sync with LLVM's lab * Get some traction on the cost model * Cambridge LLVM Social, liaise with ARM == Future == * Try to draft an LLVM story for Linaro (and understand why I'm here in the first place) ;) * Have builds with vectorization turned on

12 years, 5 months

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[ACTIVITY] 7-11 January 2013

by Brice Dobry

== Blueprints == gcc-investigate-lra-for-arm == Progress == * Built "lra" gcc branch of gcc for x86 * Collected and compared SPEC benchmark results with and without LRA enabled * Bootstrapped ARM toolchain with last reported working revision from lra branch * Tracked down and resolved ICE * Bootstrapped ARM toolchain with head revision from lra branch * Tracked down and resolved another ICE * Verified two patches (from above ICEs) have no regressions on trunk * Began investigation into target hooks for LRA for ARM to improve performance * Admin * Connect registration and trip preparations == Next week == * Collect benchmark results from SPEC for LRA on ARM * Complete target hooks and benchmark again * Review roster

12 years, 5 months

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[ACTIVITY] 7-11 January 2013

by Christophe Lyon

== Progress == * 64-bits ops in Neon: pinged patch proposal. * disable peeling/vectorzer cost model: initial benchmarking done wth cost-model on (now default). Received some results with cost model off, waiting for spec2k. * started looking at smin-umin idiom patch from Ramana. Rebased and launched build to make some benchmarking. * restarted working on local board setup for benchmarking * discussed bug reports on ARM-Neon instrinsics testsuite == Next == * handle 64-bits bitops in Neon feedback from upstream if any * analyze results of benchmarking with vectorizer cost model * analyze results of benchmarking with smin-umin idiom patch * continue board setup/update

12 years, 5 months

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[ACTIVITY] 7-11 January 2013

by Matthew Gretton-Dann

== Blueprints == Initial Current Actual fix-gcc-multiarch-testing 31 Dec 2012 31 Jan 2013 == Progress == * Infrastructure * Investigations of why Cortex-A9 HF boards are failing * Admin * Booked tickets to Connect * 'Onboarding' prep for new starters and assignees * Cortex Strings * Applied patches == Next week == * Prepare Cortex Strings release * Ensure GCC backports are up to date. * Release week. * Catch up on outstanding cards. == Future == * Run HOT/COLD partitioning benchmarks * Analyse ARM results * On x86_64 to see what the actual benefit we could get * fix-gcc-multiarch-testing * Come up with strawman proposal for updating testsuite to handle testing with varying command-line options. -- Matthew Gretton-Dann Toolchain Working Group, Linaro

12 years, 5 months

1
0
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Help on epilogue dwarf info

by Zhenqiang Chen

Hi, Would you please help on how to generate correct epilogue dwarf info? Without correct dwarf info, when shrink-wrap is enabled, it tends to ICE at dwarf2cfi.c: function maybe_record_trace_start. /* We ought to have the same state incoming to a given trace no matter how we arrive at the trace. Anything else means we've got some kind of optimization error. */ gcc_checking_assert (cfi_row_equal_p (cur_row, ti->beg_row)); Issues: 1) pretend_args The attached pretend_arg.c shows an example about pretend_args dwarf info push {r2, r3} .cfi_def_cfa_offset 8 .cfi_offset 2, -8 .cfi_offset 3, -4 use r3 push {r4, r5, lr} ... pop {r4, r5, lr} add sp, sp, #8 //No instruction here to restore r2 and r3 Can we RESTORE r2 and r3? * If we notes to RESTORE r2 and r3, it might lead to wrong info for GDB since no instruction restores them. * If we do not RESTORE them, the reg_save dwarf info will not be cleared. Then the dwarf check will fail when the function is shrink-wrapped. 2) frame_pointer_needed In prologue, we set fp like fp = sp + INT After this instruction, cfi_def_cfa_register is set to fp In epilogue. we have fp += INT sp = fp Can we reset cfi_def_cfa_register back to sp? * If we set it back to sp, how to handle it in arm_unwind_emit_set, which assumes sp can not be set from other register? /* A stack increment. */ if (GET_CODE (e1) != PLUS || !REG_P (XEXP (e1, 0)) || REGNO (XEXP (e1, 0)) != SP_REGNUM || !CONST_INT_P (XEXP (e1, 1))) abort (); * If we do not set it back, to get correct dwarf info for POP after "sp = fp", we have to add notes " sp = fp + INT" for dwarf-info while we have "sp = sp + INT" in the insn. Here is the workaround POP RTL example for the attached alloca,c: (insn/f 62 61 66 3 (parallel [ (set/f (reg/f:SI 13 sp) // sp = sp + 8 (plus:SI (reg/f:SI 13 sp) (const_int 8 [0x8]))) (set/f (reg:SI 3 r3) (mem/c:SI (reg/f:SI 13 sp) [3 S4 A32])) (set/f (reg/f:SI 7 r7) (mem/c:SI (plus:SI (reg/f:SI 13 sp) (const_int 4 [0x4])) [3 S4 A32])) ]) alloca.c:8 329 {*load_multiple_with_writeback} (expr_list:REG_UNUSED (reg:SI 3 r3) (expr_list:REG_CFA_ADJUST_CFA (set (reg/f:SI 13 sp) (plus:SI (reg/f:SI 7 r7) // sp = fp + 8 (const_int 8 [0x8]))) (expr_list:REG_CFA_RESTORE (reg/f:SI 7 r7) (expr_list:REG_CFA_RESTORE (reg:SI 3 r3) (nil)))))) (3) No idea for if (crtl->calls_eh_return) emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, gen_rtx_REG (SImode, ARM_EH_STACKADJ_REGNUM))); Currently I have no shrink-wrapped test case which crtl->calls_eh_return is true. Thanks! -Zhenqiang

12 years, 5 months

1
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Instruction costs for ARM/NEON

by Renato Golin

Hi all, I'm helping the loop vectorization in LLVM and for that we need first to build the instruction cost model so we can decide whether the vectorization is worth or not. I was looking at some papers, but most of them concern with energy consumption, which is not the issue (at least not for now). The "cost" model should take the point of view of latency, stalls and pipeline cost. I know there are sporadic comments on this on the ARM ARM, but would be good to have a definite resource where to get the data from (and hope it's a public document). Does anyone know of a good place to start looking for that? Even if the document is private, we can certainly hide the information enough to make it to the LLVM code base. cheers, --renato

12 years, 5 months

2
4
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compiler crash while building c++ libs

by Anup Kini

Hi All, I am using linaro-precise-ubuntu-desktop-20120626 on my ZYNQ ZC702 board which has an ARM Cortex-A9 dual core processor. I am trying to compile Point Cloud Library and its dependent libraries like FLANN, VTK, EIGEN etc.. which are basically c++ libraries. The compiler crashes with the following error msg and i am unable to figure out where the problem is. linaro@linaro-ubuntu-desktop:~/flann/flann-1.8.3-src/build$ make install [ 33%] Building CXX object src/cpp/CMakeFiles/flann_s.dir/flann/flann.cpp.o In file included from /home/linaro/flann/flann-1.8.3-src/src/cpp/flann/algorithms/kmeans_index.h:51:0, from /home/linaro/flann/flann-1.8.3-src/src/cpp/flann/algorithms/all_indices.h:38, from /home/linaro/flann/flann-1.8.3-src/src/cpp/flann/flann.hpp:45, from /home/linaro/flann/flann-1.8.3-src/src/cpp/flann/flann.h:466, from /home/linaro/flann/flann-1.8.3-src/src/cpp/flann/flann.cpp:31: /home/linaro/flann/flann-1.8.3-src/src/cpp/flann/util/logger.h:73:9: note: the mangling of ‘va_list’ has changed in GCC 4.4 c++: internal compiler error: Killed (program cc1plus) Please submit a full bug report, with preprocessed source if appropriate. See file:///usr/share/doc/gcc-4.6/README.Bugs for instructions. make[2]: *** [src/cpp/CMakeFiles/flann_s.dir/flann/flann.cpp.o] Error 4 make[1]: *** [src/cpp/CMakeFiles/flann_s.dir/all] Error 2 make: *** [all] Error 2 linaro@linaro-ubuntu-desktop:~/flann/flann-1.8.3-src/build$ Let me know if someone has faced similar issue or has any solution for this. -- *Anup Kini *Systems Engineer**** * ------------------------------ * *Synapticon** * | Cyber-Physical System Solutions **** Direct:**** +49 7335 / 186 999 17**** Fax:**** +49 7335 / 186 999 1 **** **** synapticon.com <http://www.synapticon.com/> | @synapticon_co<https://twitter.com/#!/synapticon_co> **** Synapticon GmbH | Hohlbachweg 2 | 73344 Gruibingen, DE Secretary +49 7335 / 186 999 0 | General Manager: Nikolai Ensslen Registry Court Ulm HRB 725114 | USt-ID DE271647127**** This message and any files transmitted with it are confidential and intended solely for the use of the individual or entity to whom they are addressed. Please notify the sender immediately if you have received this e-mail by mistake and delete it from your system.

12 years, 5 months

2
6
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[PATCH] cortex strings adding aarch64 specific memcmp

by Marcus Shawcroft

/Marcus

12 years, 5 months

2
1
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[PATCH] Adding test-strnlen to cortex strings.

by Marcus Shawcroft

This patch adds the strnlen test from glibc in preparation for an AArch64 specific strnlen implementation... /Marcus

12 years, 5 months

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[PATCH] cortex strings adding aarch64 specific strnlen

by Marcus Shawcroft

/Marcus

12 years, 5 months

2
1
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[Minutes] Minutes of Weekly Team meeting 7 Jan 2013

by Matthew Gretton-Dann

All, The minutes from today's meeting are online at: https://wiki.linaro.org/WorkingGroups/ToolChain/Meetings/2013-01-07 The Action items are: TODO: Matt to investigate EEMBC Office gs8 failures TODO: Matt to talk to Dave Pigott about HF builders TODO: Matt blueprint backport of binutils 2.23.1 TODO: Matt to blueprint options for reducing QEMU based cross test noise ACTION: Matt to unreserve Michael Hope's reservations ACTION: Matt to look at why Cortex-A9 softfloat bootstraps fail in Stage2. Thanks, Matt -- Matthew Gretton-Dann Toolchain Working Group, Linaro

12 years, 5 months

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[PATCH] Cortex Strings AArch64 optimized implementations of memmove, strlen and strncmp

by Marcus Shawcroft

Folks, This series of patches adds aarch64 specific implementations of memmove, strlen, strncmp to the cortex strings library and the corresponding test cases lifted directly from glibc. Enjoy /Marcus

12 years, 5 months

2
1
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libstdc++6 built from gcc-4.7 missing some symbols for arm-linux-gnueabi

by Matthias Klose

asking for some help about debian #697521 and lp: #1096619. looking at the config.log files for armel/armhf I don't see any differences. I assume it's a difference in the cpu configuration (armv4/v5 vs. armv7) not soft/hard-float. any pointers?

12 years, 5 months

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[ACTIVITY] 3-4 January 2013

by Yvan Roux

== Progress == * Short week (2 working days) * Merge request review - Merged approved branches * Boehm GC AArch64 support - Back on this topic == Next == * Course leading most of the week * Review roster

12 years, 5 months

1
0
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--no-gnu-unique option to disable STB_GNU_UNIQUE

by naveen yadav

Dear All, Is it possible to disable STB_GNU_UNIQUE(http://cygwin.com/ml/binutils/2011-10/msg00276.html) We need to rebuild the toolchain/ or is there any option at compile time to fix. Kind regards

12 years, 5 months

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[ACTIVITY] 2-4 Jan 2013

by Renato Golin

== This Week == * Setting up laptop, desk, mailing lists, SSH keys, Launchpad, etc * Livermore Loops Benchmark * It fails on some types of builds but not others * Failure is due to LTO, problem identified, trying to get a reduced case * Getting LLVM building nightly and running the test-suite * Got where we are with ARM and others regarding buildbots * LLVM compiles and checks on pandaboard, need test-suite * Got a Chromebook to run the test-suite * LLVM web presence (pages, svn repositories, etc) dead == Next Week == * Reduce the LTO bug on Livermore kernels * Report it once I have more information and a reduced case * Try to fix it * Checkout Zorg (LLVM's build system integrator) * Force builds to use LNT (new test harness, which passes) * Someone else is looking into setting up consistent LTO tests to the rest already * Get Ubuntu on Chromebook and build LLVM on it + test-suite * Understand the CBuild infrastructure and setup a board to do it automatically * Revise the current LLVM build to be continuous and check-all * Help Nadav Rotem (Apple) with the cost model for vectorization on ARM VFP/NEON * Meeting with ARM and "le French" to finalize the EuroLLVM 2013 and send the CFP == Future == * Validate vectorization for ARM after cost model is reasonably accurate * Vectorization will be turned on by default as of 3.3 on -O2 or higher * Reduced strength with -Os, but still on * Make Livermore Loops vectorize * Allow vectorization to detect global structures as safe * Allow floating point vectorization if using -unsafe-math * Plan a workflow to report / fix bugs that our internal CBuild finds on ARM * Liaise with ARM on what processes can be shared / commoned-up * Try to be less verbose on activity reports...

12 years, 5 months

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[ACTIVITY] 2-4 January 2013

by Matthew Gretton-Dann

== Blueprints == Initial Current Actual fix-gcc-multiarch-testing 31 Dec 2012 31 Jan 2013 == Progress == * Short week, working Weds-Fri * Admin * Welcomed Renato to the team, and discussions with him about LLVM * Initial project setup for llvm-linaro. * Finished putting current set of card drafts into Jira * Did GCC merges * Backport of Thumb literal pool issues to 4.7. == Next week == * Prepare Cortex Strings release * Ensure GCC backports are up to date. * Merge reviewing week. * Catch up on outstanding cards. == Future == * Run HOT/COLD partitioning benchmarks * Analyse ARM results * On x86_64 to see what the actual benefit we could get * fix-gcc-multiarch-testing * Come up with strawman proposal for updating testsuite to handle testing with varying command-line options. -- Matthew Gretton-Dann Toolchain Working Group, Linaro

12 years, 5 months

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Recompile linaro-toolchain for windows failured

by ljc

Hi all! I use the arm-linux-gnueabihf-ct-ng.config in gcc-linaro-arm-linux-gnueabihf-4.7-2012.12-20121214_win32.zip to rebuild linaro-toolchain,but failured with the fellow messages: [INFO ] Performing some trivial sanity checks [INFO ] Build started 20130104.110952 [INFO ] Building environment variables [WARN ] Directory '/home/ljc/ct-ng/crosstool-ng-linaro-1.13.1-4.7-2012.12-20121214/mybuild/tarballs' does not exist. [WARN ] Will not save downloaded tarballs to local storage. [EXTRA] Preparing working directories [EXTRA] Installing user-supplied crosstool-NG configuration [EXTRA] ================================================================= [EXTRA] Dumping internal crosstool-NG configuration [EXTRA] Building a toolchain for: [EXTRA] build = i686-pc-linux-gnu [EXTRA] host = i586-mingw32msvc [EXTRA] target = arm-linux-gnueabihf [EXTRA] Dumping internal crosstool-NG configuration: done in 0.26s (at 00:04) ........ [EXTRA] Saving state to restart at step 'binutils'... [INFO ] ================================================================= [INFO ] Installing binutils [EXTRA] Configuring binutils [EXTRA] Building binutils [ERROR] /home/ljc/ct-ng/crosstool-ng-linaro-1.13.1-4.7-2012.12-20121214/mybuild/.build/src/binutils-2.22/gold/arm.cc:2173: internal compiler error: in make_rtl_for_nonlocal_decl, at cp/decl.c:4971 [ERROR] make[5]: *** [arm.o] Error 1 [ERROR] make[4]: *** [all-recursive] Error 1 [ERROR] make[3]: *** [all] Error 2 [ERROR] make[2]: *** [all-gold] Error 2 [ERROR] make[1]: *** [all] Error 2 [ERROR] [ERROR] >> [ERROR] >> Error happened in: main[scripts/crosstool-NG.sh] [ERROR] >> [ERROR] >> For more info on this error, look at the file: 'build.log' [ERROR] >> There is a list of known issues, some with workarounds, in: [ERROR] >> 'share/doc/ct-ng-linaro-1.13.1-4.7-2012.12-20121214/B - Known issues.txt' [ERROR] [ERROR] Build failed in step 'Extracting and patching toolchain components' [ERROR] [ERROR] (elapsed: 57:51.80) make: *** [build] 错误 2 And in build.log: .......... [ALL ] /home/ljc/ct-ng/crosstool-ng-linaro-1.13.1-4.7-2012.12-20121214/mybuild/.build/src/binutils-2.22/gold/arm.cc:11999: instantiated from here [ERROR] /home/ljc/ct-ng/crosstool-ng-linaro-1.13.1-4.7-2012.12-20121214/mybuild/.build/src/binutils-2.22/gold/arm.cc:2173: internal compiler error: in make_rtl_for_nonlocal_decl, at cp/decl.c:4971 [ALL ] Please submit a full bug report, [ALL ] with preprocessed source if appropriate. [ALL ] See <URL:http://www.mingw.org/bugs.shtml> for instructions. [ERROR] make[5]: *** [arm.o] Error 1 [ALL ] make[5]: *** Waiting for unfinished jobs.... [ALL ] mv -f .deps/powerpc.Tpo .deps/powerpc.Po [ALL ] make[5]: Leaving directory `/home/ljc/ct-ng/crosstool-ng-linaro-1.13.1-4.7-2012.12-20121214/mybuild/.build/arm-linux-gnueabihf/build/build-binutils/gold' [ERROR] make[4]: *** [all-recursive] Error 1 [ALL ] make[4]: Leaving directory `/home/ljc/ct-ng/crosstool-ng-linaro-1.13.1-4.7-2012.12-20121214/mybuild/.build/arm-linux-gnueabihf/build/build-binutils/gold' [ERROR] make[3]: *** [all] Error 2 [ALL ] make[3]: Leaving directory `/home/ljc/ct-ng/crosstool-ng-linaro-1.13.1-4.7-2012.12-20121214/mybuild/.build/arm-linux-gnueabihf/build/build-binutils/gold' [ERROR] make[2]: *** [all-gold] Error 2 [ALL ] make[2]: Leaving directory `/home/ljc/ct-ng/crosstool-ng-linaro-1.13.1-4.7-2012.12-20121214/mybuild/.build/arm-linux-gnueabihf/build/build-binutils' [ERROR] make[1]: *** [all] Error 2 [ALL ] make[1]: Leaving directory `/home/ljc/ct-ng/crosstool-ng-linaro-1.13.1-4.7-2012.12-20121214/mybuild/.build/arm-linux-gnueabihf/build/build-binutils' [ERROR] [ERROR] >> [ERROR] >> Error happened in: main[scripts/crosstool-NG.sh] [ERROR] >> [ERROR] >> For more info on this error, look at the file: 'build.log' [ERROR] >> There is a list of known issues, some with workarounds, in: [ERROR] >> 'share/doc/ct-ng-linaro-1.13.1-4.7-2012.12-20121214/B - Known issues.txt' [ERROR] [ERROR] Build failed in step 'Extracting and patching toolchain components' [ERROR] [ERROR] (elapsed: 57:51.80) Has anybody met this problem too?

12 years, 5 months

2
1
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R_ARM_TLS_DTPMOD32 Relocation

by naveen yadav

Dear All, When doing prelink I got following error. /a.out /a.out: R_ARM_TLS_DTPMOD32 reloc in executable? Gcc version 4.6 I have following question: 1. What this relocation do. ? 2. Is it problem in tool chain ? 3. Are we need to fix this in Prelink utils Thanks

12 years, 5 months

2
2
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int64_t definition conflict on Aarch64

by Riku Voipio

Hi, The following code fails to build with OE Aarch64 toolchain with current kernel headers. While ugly, the code is a reduced testcase from fuse build failure ( https://bugs.launchpad.net/linaro-oe/+bug/1087757 ) and the same fuse code compiles on all other architectures. Before I send a workaround for upstream, I'd like to know how we can end up with different definitions for int64_t when that happens on no other architectures - something wrong with the generic kernel headers? Testcase: #include <sys/types.h> #define __s64 int64_t #include <signal.h> int main(int argc, char **argv) { int64_t x=4; return x; } Failure: /data/oe/build/tmp-eglibc/sysroots/x86_64-linux/usr/bin/aarch64-oe-linux/aarch64-oe-linux-gcc -save-temps --sysroot=/data/oe/build/tmp-eglibc/sysroots/genericarmv8 -o test test.c In file included from /data/oe/build/tmp-eglibc/sysroots/genericarmv8/usr/include/asm-generic/types.h:7:0, from /data/oe/build/tmp-eglibc/sysroots/genericarmv8/usr/include/asm/types.h:1, from /data/oe/build/tmp-eglibc/sysroots/genericarmv8/usr/include/linux/types.h:4, from /data/oe/build/tmp-eglibc/sysroots/genericarmv8/usr/include/asm/sigcontext.h:19, from /data/oe/build/tmp-eglibc/sysroots/genericarmv8/usr/include/bits/sigcontext.h:27, from /data/oe/build/tmp-eglibc/sysroots/genericarmv8/usr/include/signal.h:338, from test.c:4: /data/oe/build/tmp-eglibc/sysroots/genericarmv8/usr/include/asm-generic/int-ll64.h:29:44: error: conflicting types for 'int64_t' In file included from test.c:2:0: /data/oe/build/tmp-eglibc/sysroots/genericarmv8/usr/include/sys/types.h:197:13: note: previous declaration of 'int64_t' was here

12 years, 6 months

2
5
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[Activity] Week 52

by Zhenqiang Chen

Summary: * Follow-up shrink-up and branch cost related work. * Investigate "MSR FPEXC, r2" assemble fail issues. Details: 1. RM toolchain related work. 2. Investigate "MSR FPEXC, r2" assemble fail issues. * According to Reference Manual, should use VMSR/VMRS to access FPEXC register other than MSR/MRS. * Binutils 2.23.1 or later had enhanced VMRS/VMSR to accept FPEXC register. 3. Rebase and test the shrink-wrap patches. 4. Read codes about impact of branch-cost. Plan: * Follow up the shrink-wrap and branch cost related work. Planed leaves: * Jan. 1-3, 2013 Best Regards! -Zhenqiang

12 years, 6 months

1
0
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Cant't read arm-linux-gnueabihf-ct-ng.config

by ljc

Hi all! I'm rebuildding linaro-toolchain with ct-ng,I expect use the configure file in linaro-toolchain-binaries ,but I can't read the options in it's arm-linux-gnueabihf-ct-ng.config. How I can do? Thanks!

12 years, 6 months

2
1
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[ACTIVITY] 17-21 December 2012

by Christophe Lyon

== Progress == * 64-bits ops in Neon: re-posted patch after a bit of cleanup requested by upstream. Investigated Fortran regression: confirmed unrelated to this patched, and fixed upstream. * disable-peeling: launched jobs under cbuild to perform initial benchmarking * builtin_bswap16 backport to linaro-4.7: almost OK, missing some pending validation results. * cbuild: investigated some reporting problems which were slowing down the branch review process. == Next == * handle 64-bits bitops in Neon feedback from upstream if any * finish builtin_bswap16 backport * benchmark with vectorizer cost model enabled with its default configuration == Future == Back on January 7th, after the end of the world.

12 years, 6 months

1
0
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[ACTIVITY] 17-21 December 2012

by Matthew Gretton-Dann

== Blueprints == Initial Current Actual initial-aarch64-backport 31 Oct 2012 31 Dec 2012 21 Dec 2012 aarch64-baremetal-testing 31 Oct 2012 31 Dec 2012 21 Dec 2012 backport-fma-intrinsic 31 Dec 2012 Brice fused-multiply-add-support 31 Dec 2012 Brice gcc-investigate-lra-for-arm 31 Dec 2012 Brice fix-gcc-multiarch-testing 31 Dec 2012 31 Jan 2013 == Progress == * Admin * Interviewing * Welcomed Brice Dobry to the working group * Started inputting cards into cards.linaro.org * Discussions about KVM * Discussions about Toolchain/Platform interactions * initial-aarch64-backport and aarch64-baremetal-testing * Finished documentation == Next (working) week == * Admin * Finish loading card drafts into Jira. * Welcome Renato to working group. * Do monthly GCC merges * Prepare Cortex Strings release * Ensure GCC backports are up to date. == Future == * Run HOT/COLD partitioning benchmarks * Analyse ARM results * On x86_64 to see what the actual benefit we could get * fix-gcc-multiarch-testing * Come up with strawman proposal for updating testsuite to handle testing with varying command-line options. -- Matthew Gretton-Dann Linaro Toolchain Working Group matthew.gretton-dann(a)linaro.org

12 years, 6 months

1
0
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Re: [Merge] lp:~brice-dobry/gcc-linaro/fma into lp:gcc-linaro

by Matthew Gretton-Dann

On 21 December 2012 09:54, Yvan Roux <yvan.roux(a)linaro.org> wrote: > Matt, do you have something particular in mind to put in a shared and versioned .bzrignore file ? > My understanding of its usage is that it is more a user side configuration of the archive. > (Maybe we could chat about this topic on another channel) Yes this conversation should probably be conducted elsewhere :-) - moved to linaro-toolchain. If you look at upstream SVN GCC and do svn propget svn:ignore you get a long list of files that SVN is set up to ignore. And whilst there isn't a .gitignore other upstream projects which have git mirrors do put a .gitignore in place (see GDB for instance). I think having a .bzrignore which is a copy of the svn:ignore set up (and the defaults that SVN ignores but aren't on bzr's list) would be valid in the repo. Although as I said in the original thread - let's do this when we branch 4.8 and not to the historic branches. Thanks, Matt -- Matthew Gretton-Dann Linaro Toolchain Working Group matthew.gretton-dann(a)linaro.org

12 years, 6 months

1
0
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[ANNOUNCE] Linaro Toolchain Binaries 2012.12 released

by Zhenqiang Chen

The Linaro Toolchain Working Group is pleased to announce the 2012.12 release of the Linaro Toolchain Binaries, a pre-built version of Linaro GCC and Linaro GDB that runs on generic Linux or Windows and targets the glibc Linaro Evaluation Build. Uses include: * Cross compiling ARM applications from your laptop * Remote debugging * Build the Linux kernel for your board What's included: * Linaro GCC 4.7 2012.12 * Linaro GDB 7.5 2012.12 * A statically linked gdbserver * A system root * Manuals under share/doc/ The system root contains the basic header files and libraries to link your programs against. The Linux version is supported on Ubuntu 10.04.3 and 12.04, Debian 6.0.2, Fedora 16, openSUSE 12.1, Red Hat Enterprise Linux Workstation 5.7 and later, and should run on any Linux Standard Base 3.0 compatible distribution. Please see the README about running on x86_64 hosts. The Windows version is supported on Windows XP Pro SP3, Windows Vista Business SP2, and Windows 7 Pro SP1. The binaries and build scripts are available from: https://launchpad.net/linaro-toolchain-binaries/trunk/2012.12 Need help? Ask a question on https://ask.linaro.org/ Already on Launchpad? Submit a bug at https://bugs.launchpad.net/linaro-toolchain-binaries On IRC? See us on #linaro on Freenode. Other ways that you can contact us or get involved are listed at https://wiki.linaro.org/GettingInvolved.

12 years, 6 months

1
0
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[ACTIVITY] 10 - 14 December 2012

by Yvan Roux

== Progress == * Release week: - Made 2012.12 release of gcc-linaro 4.6 and 4.7. - took lot of time (infrastructure, right acess, Lava lab migration) * GCC atomic builtins: - my load acquire patch was applied up-stream (trunk and 4.7). - some cleaning in optabs.c (patch applied up-stream too). == Next == * Resume Boehm GC AArch64 support. * Review roster.

12 years, 6 months

1
0
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[ACTIVITY] 10 - 14 December 2012

by Christophe Lyon

== Progress == * gdb-linaro-7.5-2012.12 release - Updated wikis about gdb sources import from upstream and about gdb-linaro release - still some trouble with infrastructure to achieve the release * 64-bits ops in Neon: no news from upstream * disable-peeling: upstream advice is to enable & tune the vectorizer cost model first, but there seems to be an agreement that if unaligned accesses have no penalty, peeling should not be considered. Updated the vectorizer-cost-model blueprint * builtin_bswap16 backport to linaro-4.7: the i686 regression was caused by the build process. Re-spawned the jobs after fixing the remaining arm issue * cbuild: briefly looked at some scripts to better understand the whole system, while tracking a problem in the gdb validation reports == Next == * handle 64-bits bitops in Neon and disable-peeling feedback from upstream if any * finish builtin_bswap16 backport == Future == * on holidays for 2 weeks (Dec 22th-Jan 6th)

12 years, 6 months

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[ACTIVITY] 10 - 14 December

by Matthew Gretton-Dann

== Blueprints == Initial Current Actual initial-aarch64-backport 31 Oct 2012 31 Dec 2012 aarch64-baremetal-testing 31 Oct 2012 31 Dec 2012 backport-fma-intrinsic 31 Dec 2012 Brice fused-multiply-add-support 31 Dec 2012 Brice gcc-investigate-lra-for-arm 31 Dec 2012 31 Dec 2012 fix-gcc-multiarch-testing 31 Dec 2012 31 Jan 2013 == Progress == * Admin * Interviewing * Took over from Michael * New Starter prep * Updated card drafts * Discussions about LEG/TCWG interactions * Discussions about KVM * Discussions about Toolchain/Platform interactions == Next Week == * Upload card drafts into Jira. * initial-aarch64-backport and aarch64-baremetal-testing * Complete documentation == Future == * gcc-investigate-lra-for-arm * Analyse benchmarks * Run HOT/COLD partitioning benchmarks * Analyse ARM results * On x86_64 to see what the actual benefit we could get * fix-gcc-multiarch-testing * Come up with strawman proposal for updating testsuite to handle testing with varying command-line options. -- Matthew Gretton-Dann Linaro Toolchain Working Group matthew.gretton-dann(a)linaro.org

12 years, 6 months

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[ACTIVITY] report week 50

by Peter Maydell

* qemu-linaro 2012.12 release * arm-devs pullreq sent * wrote a patch for some minor TCG leaks * more virtio patch review * various other upstream arm devs review * discussion re KVM planning, etc * usual collection of meetings and calls KVM blueprint progress tracker (note new url): http://cbuild.validation.linaro.org/helpers/backlog?group_by=topic&colour_b… -- PMM

12 years, 6 months

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Clearing out past branches

by Michael Hope

Hi Ramana. You have the following branches remaining on Launchpad: * lp:~ramana/gcc-linaro/47-lower-subreg-experiments * lp:~ramana/gcc-linaro/47-improve-neon-intrinsics * lp:~ramana/gcc-linaro/47-nobble-promote-mode * lp:~ramana/gcc-linaro/47-smin-umin-idiom Which are obsolete, which should be spun out into backlog blueprints, and which should be taken over by someone? -- Michael

12 years, 6 months

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[Activity] Week 50

by Zhenqiang Chen

Summary: * Validate RM toolchain * Prepare Linaro Toolchain Binaries 2012.12 release. * Collect performance data for different branch cost. Details: 1. Validate RM toolchain release. 2. Collect denbench and spec2000int performance data for branch cost tuning. 3. Fix README issue (lp:1068402) by dynamically create README.txt: * The hard coded README.txt is removed. * Update build scripts to generate the README.txt, which depends on - README.texi, which is the common template for all TARGETS. - config.texi, which sets the default configuration for the TARGET. Each TARGET has a config.texi. - version.texi, created during build, includes GCC_VERSION, GDB_VERSION and TOOLCHAIN_VERSION. 4. Update Linaro GCC and GDB to 2012.12 in Linaro crosstool-ng, workaround gdb mingw32 link fail issue (due to mbsrtowcs is redefined in gdb/gnulib), finish the smoke test and spawn release builds. Plans: * Investigate how branch cost impacts on code generation. * Release Linaro Toolchain Binaries 2012.12. Best regards! -Zhenqiang

12 years, 6 months

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[ANNOUNCE] Linaro GCC 4.7 and 4.6 2012.12 released

by Yvan Roux

The Linaro Toolchain Working Group is pleased to announce the 2012.12 release of both Linaro GCC 4.7 and Linaro GCC 4.6. Linaro GCC 4.7 2012.12 is the ninth release in the 4.7 series. Based off the latest GCC 4.7.2+svn194184 release, it includes ARM-focused performance improvements and bug fixes. Interesting changes include: * Updates to GCC 4.7.2+svn19184 * Better 64 bit shifts in NEON * Also includes arm/aarch64-4.7-branch up to svn revision 194154. Fixes: * LP #1060221 Linaro GCC 4.6 2012.12 is the 22st release in the 4.6 series. Based off the latest GCC 4.6.3+svn194340 release, this is the ninth release after entering maintenance. Interesting changes include: * Updates to 4.6.3+svn194340 The source tarballs are available from: https://launchpad.net/gcc-linaro/+milestone/4.7-2012.12 https://launchpad.net/gcc-linaro/+milestone/4.6-2012.12 Downloads are available from the Linaro GCC page on Launchpad: https://launchpad.net/gcc-linaro More information on the features and issues are available from the release pages: https://launchpad.net/gcc-linaro/4.7/4.7-2012.12 https://launchpad.net/gcc-linaro/4.6/4.6-2012.12 Mailing list: http://lists.linaro.org/mailman/listinfo/linaro-toolchain Bugs: https://bugs.launchpad.net/gcc-linaro/ Questions? https://ask.linaro.org/ Interested in commercial support? Inquire at support(a)linaro.org -- Yvan Roux Linaro Toolchain Working Group yvan.roux(a)linaro.org

12 years, 6 months

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[ANNOUNCE] Linaro GDB 7.5 2012.12 released

by Christophe Lyon

The Linaro Toolchain Working Group is pleased to announce the release of Linaro GDB 7.5. Linaro GDB 7.5 2012.12 is the second release in the 7.5 series. ***NOTE*** Linaro GDB 7.5 2012.12 is identical to the FSF GDB 7.5.1 release, except for the change in version number and Linaro branding, since all Linaro GDB features were already accepted upstream and are included in the FSF release as-is. Future releases in the Linaro GDB 7.5 series may include additional ARM-focused bug fixes and enhancements. The source tarball is available at: https://launchpad.net/gdb-linaro/+milestone/7.5-2012.12 More information on Linaro GDB is available at: https://launchpad.net/gdb-linaro Christophe Lyon

12 years, 6 months

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[ANNOUNCE] Linaro QEMU 2012.12 released

by Peter Maydell

The Linaro Toolchain Working Group is pleased to announce the release of Linaro QEMU 2012.12. Linaro QEMU 2012.12 is the latest release of qemu-linaro. Based off upstream (trunk) QEMU, it includes a number of ARM-focused bug fixes and enhancements. There are no major changes in this month's release, but it has been updated to be based on upstream's recent 1.3.0 release. The source tarball is available at: https://launchpad.net/qemu-linaro/+milestone/2012.12 More information on Linaro QEMU is available at: https://launchpad.net/qemu-linaro -- PMM

12 years, 6 months

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[PATCH] Cortex Strings AArch64 implementations of memcpy, memset, strcmp

by Marcus Shawcroft

This patch adds aarch64 implementations of memcpy, memset and strcmp to cortex strings. /Marcus

12 years, 6 months

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FPU error with arm-linux-gnueabihf-gcc 3.7.3

by Zhangfei Gao

We met build error when using arm-linux-gnueabihf-gcc 3.7.3 for Huawei s40v200 kernel, which is 3.0.8, log is below. HAVE issue: gcc-linaro-arm-linux-gnueabihf-4.7-2012.11-20121123_linux.tar.bz2 gcc-linaro-arm-linux-gnueabihf-4.7-2012.10-20121022_linux.tar.bz2 gcc-linaro-arm-linux-gnueabi-2012.03-20120326_linux.tar.bz2, with build flag *--with-float=softfp* NO issue: arm-eabi-gcc 4.4.0, which comes from android package. Any suggestion? Thanks make[1]: `include/generated/mach-types.h' is up to date. CALL scripts/checksyscalls.sh CHK include/generated/compile.h AS arch/arm/mach-godbox/hi_pm_sleep.o arch/arm/mach-godbox/hi_pm_sleep.S: Assembler messages: arch/arm/mach-godbox/hi_pm_sleep.S:456: Error: selected processor does not support requested special purpose register -- `mrs r10,FPEXC' arch/arm/mach-godbox/hi_pm_sleep.S:456: Error: selected processor does not support requested special purpose register -- `msr FPEXC,r2' arch/arm/mach-godbox/hi_pm_sleep.S:456: Error: selected processor does not support requested special purpose register -- `mrs r2,FPSCR' arch/arm/mach-godbox/hi_pm_sleep.S:546: Error: selected processor does not support requested special purpose register -- `msr FPEXC,r2' arch/arm/mach-godbox/hi_pm_sleep.S:546: Error: selected processor does not support requested special purpose register -- `msr FPSCR,r10' arch/arm/mach-godbox/hi_pm_sleep.S:546: Error: selected processor does not support requested special purpose register -- `msr FPEXC,r9' make[1]: *** [arch/arm/mach-godbox/hi_pm_sleep.o] Error 1 make: *** [arch/arm/mach-godbox] Error 2 make: *** Waiting for unfinished jobs....

12 years, 6 months

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[PATCH] Cortex Strings and configury for AArch64

by Marcus Shawcroft

Following this mornings set of patches, this patch adds configury for aarch64 support. /Marcus

12 years, 6 months

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[PATCH 5/5] cortex strings preparation for aarch64

by Marcus Shawcroft

This patch adds --std=gnu99 to CFLAGS for the tests. This is necessary because some of the test code use the following c99 idiom: for (int x=....) /Marcus

12 years, 6 months

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[PATCH 4/5] cortex strings preparation for aarch64

by Marcus Shawcroft

Adding definitions for LDADD and CFLAGS when building strchr and memchr tests. /Marcus

12 years, 6 months

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[PATCH 2/5] cortex strings preparation for aarch64

by Marcus Shawcroft

This patch adds support for --host=TRIPLE to configure which is convenient for cross building. /Marcus

12 years, 6 months

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[PATCH 1/5] cortex strings preparation for aarch64

by Marcus Shawcroft

This patch is just a minor whitespace cleanup. /Marcus

12 years, 6 months

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[MINUTES] Toolchain main Call 2012-12-10

by Michael Hope

The minutes of the main call held on 10 December 2012 can be found at: https://wiki.linaro.org/WorkingGroups/ToolChain/Meetings/2012-12-10 In summary the actions from the meeting are: * ACTION: Yvan to post mail to linaro-toolchain(a)lists.linaro.org re: 4.6 armv5 sync failures * ACTION: Matt review 4.7 AArch64 merge * ACTION: Michael to check that the GDB snapshots claiming to be 7.7 are actually 7.6 * ACTION: everyone update the Linaro Leaves calendar for Christmas * ACTION: Matt to look inside ARM re: EEMBC Office gs8 failures * ACTION: Matt will send Ilias the KVM person names * ACTION: re: left over branches: Michael to send an email and Ramana follow up Thanks, -- Michael

12 years, 6 months

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