Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
- The patches were already reviewed by 3 maintainers, so started addressing
their review comments and answering questions.
- Committed first two patches in the series, which were self-contained code
improvements.
--
Thiago
Project Stratos
===============
- posted [PATCH v2] backends/vhost-user: remove the ioeventfd check
Message-Id: <20230130124728.175610-1-alex.bennee(a)linaro.org>
- bunch of sync and planning for Project Orko
- see Project Orko requirements from TRS Message-Id:
<87sffmke2i.fsf(a)linaro.org>
- also debugging some TRS <-> QEMU interactions
- posted [RFC PATCH] target/arm: disable FEAT_SME if we turn off SVE
Message-Id: <20230203100551.2445547-1-alex.bennee(a)linaro.org>
[proposal for Unprivilaged VirtIO API]
<https://docs.google.com/document/d/18ijlX2Lguejyo3BV8Tri5Y_d1SmozocBIk2ajgq…>
QEMU Upstream Work ([UM-2])
===========================
- posted [PULL v2 00/36] Testing, docs, semihosting and plugin updates
Message-Id: <20230202160109.2061994-1-alex.bennee(a)linaro.org>
- posted [RFC PATCH] tests/avocado: retire the Aarch64 TCG tests from
boot_linux.py Message-Id:
<20230203181632.2919715-1-alex.bennee(a)linaro.org>
Other
=====
- Did some investigation into LKFT regressions
- posted Initial investigation of slowness kselftest job Message-Id:
<1ba91912e18492c7dafedc5fbd5aef817f109d53fdc95554870edf077a6e21dc(a)mu.id>
- posted Candidate patches for Debian's 7.2 release (and backports)
Message-Id: <87edr8kqqq.fsf(a)linaro.org>
Completed Reviews [4/4]
=======================
[PATCH v6 00/36] tcg: Support for Int128 with helpers
Message-Id: <20230130214844.1158612-1-richard.henderson(a)linaro.org>
[PATCH] vhost-user-gpio: Configure vhost_dev when connecting
Message-Id: <20230130140320.77999-1-akihiko.odaki(a)daynix.com>
[PATCH] configure: Bump minimum Clang version to 10.0
Message-Id: <20230131180239.1582302-1-thuth(a)redhat.com>
[PATCH v3 0/9] virtio-gpu: Support Venus Vulkan driver
Message-Id: <20220926142422.22325-1-antonio.caggiano(a)collabora.com>
Current Review Queue
====================
TODO [PATCH 0/4] Fix deadlock when dying because of a signal
Message-Id: <20230201004609.3005029-1-iii(a)linux.ibm.com>
====================================================================================================================
TODO [RFC PATCH v1 0/8] Look Ma! We made a XenStore
Message-Id: <20230201144358.1744876-1-dwmw2(a)infradead.org>
=============================================================================================================
TODO [QEMU][PATCH v5 00/10] Introduce xenpvh machine for arm architecture
Message-Id: <20230131225149.14764-1-vikram.garhwal(a)amd.com>
====================================================================================================================================
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
Progress:
* UM-2 [QEMU upstream maintainership]
- usual upstream maintenance tasks
- the CI/tests have got rather flaky of late: trying to
find out why...
* QEMU-471 [QEMU ARM v9.0 Baseline CPU for TCG]
- FEAT_FGT: is now upstream
-- PMM
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
- Continued preparing patches for upstream submission. Did some final
code and testcase cleanups, updated/rewrote patch descriptions, wrote
the cover letter and the list of changes from v2.
- Posted the patches upstream¹.
--
Thiago
¹ https://inbox.sourceware.org/gdb-patches/20230130044518.3322695-1-thiago.ba…
Project Stratos
===============
- reading up on the linux-mm subsystem
- learning about struct vma_area
[proposal for Unprivilaged VirtIO API]
<https://docs.google.com/document/d/18ijlX2Lguejyo3BV8Tri5Y_d1SmozocBIk2ajgq…>
FEAT_RME, CCA Realms ([QEMU-466])
=================================
- more review of [PATCH v5 00/36] tcg: Support for Int128 with helpers
Message-Id: <20230126043824.54819-1-richard.henderson(a)linaro.org>
[QEMU-466] <https://linaro.atlassian.net/browse/QEMU-466>
QEMU Upstream Work ([UM-2])
===========================
- updated maintainer trees, running [CI over weekend]
- posted [PULL 00/35] Testing, docs, semihosting and plugin updates
Message-Id: <20230126112250.2584701-1-alex.bennee(a)linaro.org>
[UM-2] <https://linaro.atlassian.net/browse/UM-2>
[CI over weekend]
<https://gitlab.com/stsquad/qemu/-/pipelines/753447926>
Current Review Queue
====================
TODO [RFC PATCH 00/16] arm: Run Arm CCA VMs with KVM
Message-Id: <20230127150727.612594-1-jean-philippe(a)linaro.org>
==================================================================================================================
TODO [QEMU][PATCH v4 00/10] Introduce xenpvh machine for arm architecture
Message-Id: <20230125085407.7144-1-vikram.garhwal(a)amd.com>
===================================================================================================================================
TODO [PATCH v3 0/3] tcg: add perfmap and jitdump
Message-Id: <20230111014705.2275040-1-iii(a)linux.ibm.com>
========================================================================================================
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
Progress:
* UM-2 [QEMU upstream maintainership]
- usual upstream maintenance tasks
* QEMU-471 [QEMU ARM v9.0 Baseline CPU for TCG]
- FEAT_FGT: finished coding, did some testing, sent patches for review
-- PMM
After gdb-13-branchpoint-527-g46758593515 commit 4675859351582f017b495ff13fb2ea72a99834af
Author: Tom Tromey <tom(a)tromey.com>
Rename to allow_ifunc_tests
the following benchmarks slowed down by more than 3%:
- 465.tonto failed to build
Below reproducer instructions can be used to re-build both "first_bad" and "last_good" cross-toolchains used in this bisection. Naturally, the scripts will fail when triggerring benchmarking jobs if you don\'t have access to Linaro TCWG CI.
Configuration:
- Benchmark: SPEC CPU2006
- Toolchain: GCC + Glibc + GNU Linker
- Version: all components were built from their tip of trunk
- Target: aarch64-linux-gnu
- Compiler flags: -O3
- Hardware:
This benchmarking CI is work-in-progress, and we welcome feedback and suggestions at linaro-toolchain(a)lists.linaro.org . In our improvement plans is to add support for SPEC CPU2017 benchmarks and provide "perf report/annotate" data behind these reports.
THIS IS THE END OF INTERESTING STUFF. BELOW ARE LINKS TO BUILDS, REPRODUCTION INSTRUCTIONS, AND THE RAW COMMIT.
For latest status see comments in https://linaro.atlassian.net/browse/GNU-692 .
Status of gdb-13-branchpoint-527-g46758593515 commit for tcwg_bmk-code_speed-spec2k6:
commit 4675859351582f017b495ff13fb2ea72a99834af
Author: Tom Tromey <tom(a)tromey.com>
Date: Sun Jan 8 11:41:19 2023 -0700
Rename to allow_ifunc_tests
This changes skip_ifunc_tests to invert the sense, and renames it to
allow_ifunc_tests.
* gnu-aarch64-master-O3
** After gdb-13-branchpoint-527-g46758593515 commit 4675859351582f017b495ff13fb2ea72a99834af
** Author: Tom Tromey <tom(a)tromey.com>
**
** Rename to allow_ifunc_tests
**
** the following benchmarks slowed down by more than 3%:
** - 465.tonto failed to build
** https://ci.linaro.org/job/tcwg_bmk-code_speed-spec2k6-gnu-aarch64-master-O3…
Bad build: https://ci.linaro.org/job/tcwg_bmk-code_speed-spec2k6-gnu-aarch64-master-O3…
Good build: https://ci.linaro.org/job/tcwg_bmk-code_speed-spec2k6-gnu-aarch64-master-O3…
Reproduce current build:
<cut>
mkdir -p investigate-binutils-4675859351582f017b495ff13fb2ea72a99834af
cd investigate-binutils-4675859351582f017b495ff13fb2ea72a99834af
# Fetch scripts
git clone https://git.linaro.org/toolchain/jenkins-scripts
# Fetch manifests for bad and good builds
mkdir -p bad/artifacts good/artifacts
curl -o bad/artifacts/manifest.sh https://ci.linaro.org/job/tcwg_bmk-code_speed-spec2k6-gnu-aarch64-master-O3… --fail
curl -o good/artifacts/manifest.sh https://ci.linaro.org/job/tcwg_bmk-code_speed-spec2k6-gnu-aarch64-master-O3… --fail
# Reproduce bad build
(cd bad; ../jenkins-scripts/tcwg_bmk-build.sh ^^ true %%rr[top_artifacts] artifacts)
# Reproduce good build
(cd good; ../jenkins-scripts/tcwg_bmk-build.sh ^^ true %%rr[top_artifacts] artifacts)
</cut>
Full commit (up to 1000 lines):
<cut>
commit 4675859351582f017b495ff13fb2ea72a99834af
Author: Tom Tromey <tom(a)tromey.com>
Date: Sun Jan 8 11:41:19 2023 -0700
Rename to allow_ifunc_tests
This changes skip_ifunc_tests to invert the sense, and renames it to
allow_ifunc_tests.
---
gdb/testsuite/gdb.base/gnu-ifunc.exp | 2 +-
gdb/testsuite/gdb.compile/compile-ifunc.exp | 2 +-
gdb/testsuite/lib/gdb.exp | 8 ++++----
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/gdb/testsuite/gdb.base/gnu-ifunc.exp b/gdb/testsuite/gdb.base/gnu-ifunc.exp
index 967d1e053e7..81119f764b8 100644
--- a/gdb/testsuite/gdb.base/gnu-ifunc.exp
+++ b/gdb/testsuite/gdb.base/gnu-ifunc.exp
@@ -13,7 +13,7 @@
# You should have received a copy of the GNU General Public License
# along with this program. If not, see <http://www.gnu.org/licenses/>.
-require !skip_shlib_tests !skip_ifunc_tests
+require !skip_shlib_tests allow_ifunc_tests
standard_testfile .c
set staticexecutable ${testfile}-static
diff --git a/gdb/testsuite/gdb.compile/compile-ifunc.exp b/gdb/testsuite/gdb.compile/compile-ifunc.exp
index bfbe65a503b..990d35a53f6 100644
--- a/gdb/testsuite/gdb.compile/compile-ifunc.exp
+++ b/gdb/testsuite/gdb.compile/compile-ifunc.exp
@@ -15,7 +15,7 @@
load_lib compile-support.exp
-require !skip_ifunc_tests
+require allow_ifunc_tests
standard_testfile
diff --git a/gdb/testsuite/lib/gdb.exp b/gdb/testsuite/lib/gdb.exp
index 7143908bbc2..3a1936ffc82 100644
--- a/gdb/testsuite/lib/gdb.exp
+++ b/gdb/testsuite/lib/gdb.exp
@@ -3972,17 +3972,17 @@ gdb_caching_proc has_int128_cxx {
return [gdb_int128_helper c++]
}
-# Return true if the IFUNC feature is unsupported.
-gdb_caching_proc skip_ifunc_tests {
+# Return true if the IFUNC feature is supported.
+gdb_caching_proc allow_ifunc_tests {
if [gdb_can_simple_compile ifunc {
extern void f_ ();
typedef void F (void);
F* g (void) { return &f_; }
void f () __attribute__ ((ifunc ("g")));
} object] {
- return 0
- } else {
return 1
+ } else {
+ return 0
}
}
</cut>
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
- Continued preparing patches for upstream submission. Realised I had to
document my changes to the remote protocol in the GDB manual, so did
that. Also making small code cleanups and updating/rewriting patch
descriptions.
- Noticed I could to a small optimisation in one patch, but it would
involve a lot of refactoring to move GDB-specific code so that it could
also be used by gdbserver, so saved the WIP branch for later.
# TCWG CI
- Investigated failure report from yesterday's email. Reproduced on
tcwg-jade-03 with a slightly different build failure, but wasn't able to
make much progress¹.
--
Thiago
¹ https://lists.linaro.org/archives/list/linaro-toolchain@lists.linaro.org/th…
Progress:
* UM-2 [QEMU upstream maintainership]
- usual upstream maintenance tasks
* QEMU-471 [QEMU ARM v9.0 Baseline CPU for TCG]
- FEAT_FGT getting closer towards being done: I just have
to mark up the ARMCPRegInfo structs for HDFGRTR traps, and
write the code to handle traps on ERET and SVC
-- PMM
After gdb-13-branchpoint-388-g71fa8692930 commit 71fa8692930cd5fc3f332415cf642d3aa5f55fc6
Author: Mike Frysinger <vapier(a)gentoo.org>
sim: cris: move arch-specific file compilation to top-level
the following benchmarks slowed down by more than 3%:
- 481.wrf failed to build
- 416.gamess failed to build
Below reproducer instructions can be used to re-build both "first_bad" and "last_good" cross-toolchains used in this bisection. Naturally, the scripts will fail when triggerring benchmarking jobs if you don\'t have access to Linaro TCWG CI.
Configuration:
- Benchmark: SPEC CPU2006
- Toolchain: GCC + Glibc + GNU Linker
- Version: all components were built from their tip of trunk
- Target: arm-linux-gnueabihf
- Compiler flags: -O3 -flto -marm
- Hardware:
This benchmarking CI is work-in-progress, and we welcome feedback and suggestions at linaro-toolchain(a)lists.linaro.org . In our improvement plans is to add support for SPEC CPU2017 benchmarks and provide "perf report/annotate" data behind these reports.
THIS IS THE END OF INTERESTING STUFF. BELOW ARE LINKS TO BUILDS, REPRODUCTION INSTRUCTIONS, AND THE RAW COMMIT.
For latest status see comments in https://linaro.atlassian.net/browse/GNU-692 .
Status of gdb-13-branchpoint-388-g71fa8692930 commit for tcwg_bmk-code_speed-spec2k6:
commit 71fa8692930cd5fc3f332415cf642d3aa5f55fc6
Author: Mike Frysinger <vapier(a)gentoo.org>
Date: Sun Jan 1 13:40:11 2023 -0500
sim: cris: move arch-specific file compilation to top-level
* gnu-arm-master-O3_LTO
** After gdb-13-branchpoint-388-g71fa8692930 commit 71fa8692930cd5fc3f332415cf642d3aa5f55fc6
** Author: Mike Frysinger <vapier(a)gentoo.org>
**
** sim: cris: move arch-specific file compilation to top-level
**
** the following benchmarks slowed down by more than 3%:
** - 481.wrf failed to build
** - 416.gamess failed to build
** https://ci.linaro.org/job/tcwg_bmk-code_speed-spec2k6-gnu-arm-master-O3_LTO…
Bad build: https://ci.linaro.org/job/tcwg_bmk-code_speed-spec2k6-gnu-arm-master-O3_LTO…
Good build: https://ci.linaro.org/job/tcwg_bmk-code_speed-spec2k6-gnu-arm-master-O3_LTO…
Reproduce current build:
<cut>
mkdir -p investigate-binutils-71fa8692930cd5fc3f332415cf642d3aa5f55fc6
cd investigate-binutils-71fa8692930cd5fc3f332415cf642d3aa5f55fc6
# Fetch scripts
git clone https://git.linaro.org/toolchain/jenkins-scripts
# Fetch manifests for bad and good builds
mkdir -p bad/artifacts good/artifacts
curl -o bad/artifacts/manifest.sh https://ci.linaro.org/job/tcwg_bmk-code_speed-spec2k6-gnu-arm-master-O3_LTO… --fail
curl -o good/artifacts/manifest.sh https://ci.linaro.org/job/tcwg_bmk-code_speed-spec2k6-gnu-arm-master-O3_LTO… --fail
# Reproduce bad build
(cd bad; ../jenkins-scripts/tcwg_bmk-build.sh ^^ true %%rr[top_artifacts] artifacts)
# Reproduce good build
(cd good; ../jenkins-scripts/tcwg_bmk-build.sh ^^ true %%rr[top_artifacts] artifacts)
</cut>
Full commit (up to 1000 lines):
<cut>
commit 71fa8692930cd5fc3f332415cf642d3aa5f55fc6
Author: Mike Frysinger <vapier(a)gentoo.org>
Date: Sun Jan 1 13:40:11 2023 -0500
sim: cris: move arch-specific file compilation to top-level
---
sim/Makefile.in | 3 ---
sim/cris/local.mk | 3 ---
2 files changed, 6 deletions(-)
diff --git a/sim/Makefile.in b/sim/Makefile.in
index 435c36b2b83..0ad692126e7 100644
--- a/sim/Makefile.in
+++ b/sim/Makefile.in
@@ -4801,9 +4801,6 @@ testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/commo
@SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_GEN)$< >$@
@SIM_ENABLE_ARCH_cris_TRUE@$(cris_libsim_a_OBJECTS) $(cris_libsim_a_LIBADD): cris/hw-config.h
-@SIM_ENABLE_ARCH_cris_TRUE@cris/%.o: cris/%.c
-@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
-
@SIM_ENABLE_ARCH_cris_TRUE@cris/%.o: common/%.c
@SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
@SIM_ENABLE_ARCH_cris_TRUE@cris/modules.c: | $(cris_BUILD_OUTPUTS)
diff --git a/sim/cris/local.mk b/sim/cris/local.mk
index 912ca12a32f..3950baed7a1 100644
--- a/sim/cris/local.mk
+++ b/sim/cris/local.mk
@@ -47,9 +47,6 @@ $(%C%_libsim_a_OBJECTS) $(%C%_libsim_a_LIBADD): %D%/hw-config.h
noinst_LIBRARIES += %D%/libsim.a
-%D%/%.o: %D%/%.c
- $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
-
%D%/%.o: common/%.c
$(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
</cut>
After glibc-2.36.9000-435-g569cfcc6bf commit 569cfcc6bf35c28112ca8d7112e9eb4a22bed5b8
Author: Samuel Thibault <samuel.thibault(a)ens-lyon.org>
hurd: Fix _NOFLSH value
the following benchmarks slowed down by more than 3%:
- 459.GemsFDTD failed to build
- 436.cactusADM failed to build
Below reproducer instructions can be used to re-build both "first_bad" and "last_good" cross-toolchains used in this bisection. Naturally, the scripts will fail when triggerring benchmarking jobs if you don\'t have access to Linaro TCWG CI.
For your convenience, we have uploaded tarballs with pre-processed source and assembly files at:
- First_bad save-temps: $FIRST_BAD_ARTIFACTS/save-temps/
- Last_good save-temps: $LAST_GOOD_ARTIFACTS/save-temps/
- Baseline save-temps: $BASELINE_ARTIFACTS/save-temps/
Configuration:
- Benchmark: SPEC CPU2006
- Toolchain: GCC + Glibc + GNU Linker
- Version: all components were built from their tip of trunk
- Target: aarch64-linux-gnu
- Compiler flags: -O3 -flto
- Hardware:
This benchmarking CI is work-in-progress, and we welcome feedback and suggestions at linaro-toolchain(a)lists.linaro.org . In our improvement plans is to add support for SPEC CPU2017 benchmarks and provide "perf report/annotate" data behind these reports.
THIS IS THE END OF INTERESTING STUFF. BELOW ARE LINKS TO BUILDS, REPRODUCTION INSTRUCTIONS, AND THE RAW COMMIT.
For latest status see comments in https://linaro.atlassian.net/browse/GNU-692 .
Status of glibc-2.36.9000-435-g569cfcc6bf commit for tcwg_bmk-code_speed-spec2k6:
commit 569cfcc6bf35c28112ca8d7112e9eb4a22bed5b8
Author: Samuel Thibault <samuel.thibault(a)ens-lyon.org>
Date: Sun Jan 15 20:54:42 2023 +0100
hurd: Fix _NOFLSH value
shifting 1 (thus an integer) left 31 bit is undefined behavior. We have to
make it an unsigned integer to properly get 0x80000000 (like done in other
places).
* gnu-aarch64-master-O3_LTO
** After glibc-2.36.9000-435-g569cfcc6bf commit 569cfcc6bf35c28112ca8d7112e9eb4a22bed5b8
** Author: Samuel Thibault <samuel.thibault(a)ens-lyon.org>
**
** hurd: Fix _NOFLSH value
**
** the following benchmarks slowed down by more than 3%:
** - 459.GemsFDTD failed to build
** - 436.cactusADM failed to build
** https://ci.linaro.org/job/tcwg_bmk-code_speed-spec2k6-gnu-aarch64-master-O3…
Bad build: https://ci.linaro.org/job/tcwg_bmk-code_speed-spec2k6-gnu-aarch64-master-O3…
Good build: https://ci.linaro.org/job/tcwg_bmk-code_speed-spec2k6-gnu-aarch64-master-O3…
Reproduce current build:
<cut>
mkdir -p investigate-glibc-569cfcc6bf35c28112ca8d7112e9eb4a22bed5b8
cd investigate-glibc-569cfcc6bf35c28112ca8d7112e9eb4a22bed5b8
# Fetch scripts
git clone https://git.linaro.org/toolchain/jenkins-scripts
# Fetch manifests for bad and good builds
mkdir -p bad/artifacts good/artifacts
curl -o bad/artifacts/manifest.sh https://ci.linaro.org/job/tcwg_bmk-code_speed-spec2k6-gnu-aarch64-master-O3… --fail
curl -o good/artifacts/manifest.sh https://ci.linaro.org/job/tcwg_bmk-code_speed-spec2k6-gnu-aarch64-master-O3… --fail
# Reproduce bad build
(cd bad; ../jenkins-scripts/tcwg_bmk-build.sh ^^ true %%rr[top_artifacts] artifacts)
# Reproduce good build
(cd good; ../jenkins-scripts/tcwg_bmk-build.sh ^^ true %%rr[top_artifacts] artifacts)
</cut>
Full commit (up to 1000 lines):
<cut>
commit 569cfcc6bf35c28112ca8d7112e9eb4a22bed5b8
Author: Samuel Thibault <samuel.thibault(a)ens-lyon.org>
Date: Sun Jan 15 20:54:42 2023 +0100
hurd: Fix _NOFLSH value
shifting 1 (thus an integer) left 31 bit is undefined behavior. We have to
make it an unsigned integer to properly get 0x80000000 (like done in other
places).
---
bits/termios.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/bits/termios.h b/bits/termios.h
index ae62d00853..4439c2f14e 100644
--- a/bits/termios.h
+++ b/bits/termios.h
@@ -246,7 +246,7 @@ struct termios
# define NOKERNINFO (1 << 25) /* Disable VSTATUS. */
# define PENDIN (1 << 29) /* Retype pending input (state). */
#endif
-#define _NOFLSH (1 << 31) /* Disable flush after interrupt. */
+#define _NOFLSH (1U << 31) /* Disable flush after interrupt. */
#define NOFLSH _NOFLSH
/* Control characters. */
</cut>
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
- Fixed a regression found when preparing the new patches. Rebased on the
current mainline branch and continued preparing patches for upstream
submission.
# Misc
- Found a minor problem with a script in upstream GDB. Submitted and
committed a quick patch¹ to fix it.
--
Thiago
¹ https://inbox.sourceware.org/gdb-patches/20230111174501.3699871-1-thiago.ba…
Progress:
* UM-2 [QEMU upstream maintainership]
- another round of patch review and a pull request
* QEMU-471 [QEMU ARM v9.0 Baseline CPU for TCG]
- Made some useful progress with the FEAT_FGT implementation
-- PMM
* A couple of attempts at minimizing arm per-cpu init work.
I've posted a short/medium-term solution for the lookup issue,
so that we can re-apply Alex's CPUState unrealize patch.
* TCG patch queue flushed, including call abi reorg.
- Rebase TCGv_i128 patch set
- Rebase goto_tb race condition patch set
r~
Project Stratos
===============
vhost-device maintainer effort ([UM-196])
- a few version bump reviews
Plugin register access ([QEMU-495])
===================================
- posted [PATCH v2 00/21] gdbstub: re-organise to for better
compilation behaviour Message-Id:
<20230105164320.2164095-1-alex.bennee(a)linaro.org>
[QEMU-495] <https://linaro.atlassian.net/browse/QEMU-495>
QEMU Upstream Work ([UM-2])
===========================
- posted [RFC PATCH] docs: add some details about compilation units to
coding style Message-Id:
<20230103104758.767266-1-alex.bennee(a)linaro.org>
- posted [RFC PATCH] target/arm: fix handling of HLT semihosting in
system mode Message-Id:
<20230105114304.2017493-1-alex.bennee(a)linaro.org>
- posted [RFC PATCH] testing: probe gdb for supported architectures
ahead of time Message-Id:
<20230105181533.2235792-1-alex.bennee(a)linaro.org>
- posted [PATCH v2] scripts/ci: update gitlab-runner playbook to use
latest runner Message-Id:
<20230106152338.2599827-1-alex.bennee(a)linaro.org>
[UM-2] <https://linaro.atlassian.net/browse/UM-2>
Completed Reviews [5/5]
=======================
[PATCH] semihosting: Write back semihosting data before completion callback
Message-Id: <20221012014822.1242170-1-keithp(a)keithp.com>
[PATCH] semihosting: Write back semihosting data before completion callback
Message-Id: <20221012014822.1242170-1-keithp(a)keithp.com>
[PATCH v2] semihosting: add O_BINARY flag in host_open for NT compatibility
Message-Id: <20230106102018.20520-1-eiakovlev(a)linux.microsoft.com>
[PATCH] linux-user: fix bug about incorrect base addresss of idt and gdt on i386 and x86_64
Message-Id: <75da8346.1fd34.1856e0d08ef.Coremail.fanwj(a)mail.ustc.edu.cn>
[PATCH v2 0/1] tcg: add perfmap and jitdump
Message-Id: <20221114161321.3364875-1-iii(a)linux.ibm.com>
Other
=====
- bit of travel forecasting
Current Review Queue
====================
TODO [RFC PATCH 00/40] Toward class init of cpu features
Message-Id: <20230103181646.55711-1-richard.henderson(a)linaro.org>
=========================================================================================================================
TODO [RFC PATCH v6] virtio-video: Add virtio video device specification
Message-Id: <20221208072325.2259940-1-acourbot(a)chromium.org>
===================================================================================================================================
TODO [RFC PATCH kvmtool v1 00/32] Add support for restricted guest memory in kvmtool
Message-Id: <20221202174417.1310826-1-tabba(a)google.com>
===========================================================================================================================================
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
Progress (short week, 2 days):
* UM-2 [QEMU upstream maintainership]
- Pretty much entirely trying to catch up with the code review
backlog that had built up over the holidays. Got it down from
35 items to 7...
Absences:
* NB: I work a 4 day week, excluding Wednesdays
* Apr 26 -- 28 : Linaro Connect (London)
In office (provisional; let me know if you have preferences!):
* week of the 9 Jan
-- PMM
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
- Identified a regression on systems that do not support SVE. Debugged it
and now working on a fix.
--
Thiago
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
- Finished implementing the new approach of sending new XML target
descriptions through the wire.
- Fixed a couple of minor regressions I introduced and rebased the code
on the current main branch.
- Now preparing the patches for submitting upstream.
# Community participation
- Reviewed mailing list patch “[PATCH] [AArch64] Enable pointer
authentication support for aarch64 bare metal/kernel mode addresses”.
--
Thiago
Project Stratos
===============
- started reviewing [PATCH v9 0/8] KVM: mm: fd-based approach for
supporting KVM Message-Id:
<20221025151344.3784230-1-chao.p.peng(a)linux.intel.com>
- trying to assess if user-space facing solution for memory sharing
- writing up a [proposal for an API]
[proposal for an API]
<https://docs.google.com/document/d/18ijlX2Lguejyo3BV8Tri5Y_d1SmozocBIk2ajgq…>
vhost-device maintainer effort ([UM-196])
- debugged regression in virtio-vsock and QEMU
- should have some error message patches to post
- QEMU 7.2 shipped with stubs for virtio-gpio and virtio-i2c
[UM-196] <https://linaro.atlassian.net/browse/UM-196>
Single Binary ([QEMU-487])
==========================
- posted [PATCH for 8.0 v5 00/20] use MemTxAttrs to avoid current_cpu
in hw/ Message-Id: <20221111182535.64844-1-alex.bennee(a)linaro.org>
[QEMU-487] <https://linaro.atlassian.net/browse/QEMU-487>
Plugin register access ([QEMU-495])
===================================
- While experimenting with [the register API] ran into issues
integrating to gdbstub
- started a [re-factor] to make the process less painful
- posted [PATCH v1 00/10] split user and system code in gdbstub
Message-Id: <20221216112206.3171578-1-alex.bennee(a)linaro.org>
[QEMU-495] <https://linaro.atlassian.net/browse/QEMU-495>
[the register API]
<https://github.com/stsquad/qemu/tree/introspection/registers>
[re-factor] <https://github.com/stsquad/qemu/tree/gdbstub/next>
QEMU Upstream Work ([UM-2])
===========================
- posted [PULL 0/6] testing updates Message-Id:
<20221221144019.2149905-1-alex.bennee(a)linaro.org>
- posted [PATCH 00/11] gitdm metadata updates Message-Id:
<20221219121914.851488-1-alex.bennee(a)linaro.org>
[UM-2] <https://linaro.atlassian.net/browse/UM-2>
Completed Reviews [5/5]
=======================
[QEMU][PATCH v2 00/11] Introduce xenpv machine for arm architecture
Message-Id: <20221202030003.11441-1-vikram.garhwal(a)amd.com>
[PATCH] configure: Fix check-tcg not executing any tests
Message-Id: <20221207082309.9966-1-quic_mthiyaga(a)quicinc.com>
[PATCH v4 00/27] tcg misc patches
Message-Id: <20221213212541.1820840-1-richard.henderson(a)linaro.org>
[PATCH v3 0/8] accel/tcg: Rewrite user-only vma tracking
Message-Id: <20221209051914.398215-1-richard.henderson(a)linaro.org>
[PATCH-for-8.0 0/5] accel/tcg: Restrict page_collection structure to system TB maintainance
Message-Id: <20221209093649.43738-1-philmd(a)linaro.org>
Absences
========
Christmas holidays - merry Christmas!
Current Review Queue
====================
TODO [RFC PATCH v6] virtio-video: Add virtio video device specification
Message-Id: <20221208072325.2259940-1-acourbot(a)chromium.org>
===================================================================================================================================
TODO [RFC PATCH kvmtool v1 00/32] Add support for restricted guest memory in kvmtool
Message-Id: <20221202174417.1310826-1-tabba(a)google.com>
===========================================================================================================================================
TODO [PATCH v10 0/9] KVM: mm: fd-based approach for supporting KVM
Message-Id: <20221202061347.1070246-1-chao.p.peng(a)linux.intel.com>
====================================================================================================================================
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
Progress:
* UM-2 [QEMU upstream maintainership]
- I'm now back on merging duty for the 8.0 release cycle, so some
time spent on pull request processing
- Sent pull requests with accumulated arm and reset-refactoring
patches from the freeze period
- Trying to cut down my code review backlog before the holidays
-- PMM
# [GNU-767] Support changing SVE vector length in remote debugging
- Patches to gdbserver to support changing the SVE vector length: About
halfway through implementing the new approach of sending new XML
target descriptions through the wire.
# Misc
- Experimented with using a GDB wrapper to run the testsuite. Came up
with a small patch that fixes the tests that fail when using the
wrapper.
--
Thiago
Failure after basepoints/gcc-13-4618-g17ae956c0fa: AArch64: Support new tbranch optab.:
Results changed to
-10
# build_abe binutils:
-9
# build_abe stage1:
-5
# build_abe qemu:
-2
# linux_n_obj:
7572
# First few build errors in logs:
# 00:10:43 drivers/gpu/drm/v3d/v3d_perfmon.c:57:1: internal compiler error: in decompose, at rtl.h:2288
# 00:10:44 make[5]: *** [scripts/Makefile.build:250: drivers/gpu/drm/v3d/v3d_perfmon.o] Error 1
# 00:10:53 make[4]: *** [scripts/Makefile.build:502: drivers/gpu/drm/v3d] Error 2
# 00:13:52 drivers/media/mc/mc-device.c:198:1: internal compiler error: in decompose, at rtl.h:2288
# 00:13:53 make[4]: *** [scripts/Makefile.build:250: drivers/media/mc/mc-device.o] Error 1
# 00:13:57 make[3]: *** [scripts/Makefile.build:502: drivers/media/mc] Error 2
# 00:15:27 make[2]: *** [scripts/Makefile.build:502: drivers/media] Error 2
# 00:17:50 make[3]: *** [scripts/Makefile.build:502: drivers/gpu/drm] Error 2
# 00:17:50 make[2]: *** [scripts/Makefile.build:502: drivers/gpu] Error 2
# 00:17:50 make[1]: *** [scripts/Makefile.build:502: drivers] Error 2
from
-10
# build_abe binutils:
-9
# build_abe stage1:
-5
# build_abe qemu:
-2
# linux_n_obj:
8625
# linux build successful:
all
# linux boot successful:
boot
THIS IS THE END OF INTERESTING STUFF. BELOW ARE LINKS TO BUILDS, REPRODUCTION INSTRUCTIONS, AND THE RAW COMMIT.
For latest status see comments in https://linaro.atlassian.net/browse/GNU-680 .
Status of basepoints/gcc-13-4618-g17ae956c0fa commit for tcwg_kernel:
commit 17ae956c0fa6baac3d22764019d5dd5ebf5c2b11
Author: Tamar Christina <tamar.christina(a)arm.com>
Date: Mon Dec 12 15:18:56 2022 +0000
AArch64: Support new tbranch optab.
This implements the new tbranch optab for AArch64.
we cannot emit one big RTL for the final instruction immediately.
The reason that all comparisons in the AArch64 backend expand to separate CC
compares, and separate testing of the operands is for ifcvt.
The separate CC compare is needed so ifcvt can produce csel, cset etc from the
compares. Unlike say combine, ifcvt can not do recog on a parallel with a
clobber. Should we emit the instruction directly then ifcvt will not be able
to say, make a csel, because we have no patterns which handle zero_extract and
compare. (unlike combine ifcvt cannot transform the extract into an AND).
While you could provide various patterns for this (and I did try) you end up
with broken patterns because you can't add the clobber to the CC register. If
you do, ifcvt recog fails.
i.e.
int
f1 (int x)
{
if (x & 1)
return 1;
return x;
}
We lose csel here.
Secondly the reason the compare with an explicit CC mode is needed is so that
ifcvt can transform the operation into a version that doesn't require the flags
to be set. But it only does so if it know the explicit usage of the CC reg.
For instance
int
foo (int a, int b)
{
return ((a & (1 << 25)) ? 5 : 4);
}
Doesn't require a comparison, the optimal form is:
foo(int, int):
ubfx x0, x0, 25, 1
add w0, w0, 4
ret
and no compare is actually needed. If you represent the instruction using an
ANDS instead of a zero_extract then you get close, but you end up with an ands
followed by an add, which is a slower operation.
gcc/ChangeLog:
* config/aarch64/aarch64.md (*tb<optab><mode>1): Rename to...
(*tb<optab><ALLI:mode><GPI:mode>1): ... this.
(tbranch_<code><mode>4): New.
* config/aarch64/iterators.md(ZEROM, zerom): New.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/tbz_1.c: New test.
* gnu-master-aarch64-mainline-defconfig
** Failure after basepoints/gcc-13-4618-g17ae956c0fa: AArch64: Support new tbranch optab.:
** https://ci.linaro.org/job/tcwg_kernel-gnu-build-gnu-master-aarch64-mainline…
Bad build: https://ci.linaro.org/job/tcwg_kernel-gnu-build-gnu-master-aarch64-mainline…
Good build: https://ci.linaro.org/job/tcwg_kernel-gnu-build-gnu-master-aarch64-mainline…
Reproduce current build:
<cut>
mkdir -p investigate-gcc-17ae956c0fa6baac3d22764019d5dd5ebf5c2b11
cd investigate-gcc-17ae956c0fa6baac3d22764019d5dd5ebf5c2b11
# Fetch scripts
git clone https://git.linaro.org/toolchain/jenkins-scripts
# Fetch manifests for bad and good builds
mkdir -p bad/artifacts good/artifacts
curl -o bad/artifacts/manifest.sh https://ci.linaro.org/job/tcwg_kernel-gnu-build-gnu-master-aarch64-mainline… --fail
curl -o good/artifacts/manifest.sh https://ci.linaro.org/job/tcwg_kernel-gnu-build-gnu-master-aarch64-mainline… --fail
# Reproduce bad build
(cd bad; ../jenkins-scripts/tcwg_kernel-build.sh ^^ true %%rr[top_artifacts] artifacts)
# Reproduce good build
(cd good; ../jenkins-scripts/tcwg_kernel-build.sh ^^ true %%rr[top_artifacts] artifacts)
</cut>
Full commit (up to 1000 lines):
<cut>
commit 17ae956c0fa6baac3d22764019d5dd5ebf5c2b11
Author: Tamar Christina <tamar.christina(a)arm.com>
Date: Mon Dec 12 15:18:56 2022 +0000
AArch64: Support new tbranch optab.
This implements the new tbranch optab for AArch64.
we cannot emit one big RTL for the final instruction immediately.
The reason that all comparisons in the AArch64 backend expand to separate CC
compares, and separate testing of the operands is for ifcvt.
The separate CC compare is needed so ifcvt can produce csel, cset etc from the
compares. Unlike say combine, ifcvt can not do recog on a parallel with a
clobber. Should we emit the instruction directly then ifcvt will not be able
to say, make a csel, because we have no patterns which handle zero_extract and
compare. (unlike combine ifcvt cannot transform the extract into an AND).
While you could provide various patterns for this (and I did try) you end up
with broken patterns because you can't add the clobber to the CC register. If
you do, ifcvt recog fails.
i.e.
int
f1 (int x)
{
if (x & 1)
return 1;
return x;
}
We lose csel here.
Secondly the reason the compare with an explicit CC mode is needed is so that
ifcvt can transform the operation into a version that doesn't require the flags
to be set. But it only does so if it know the explicit usage of the CC reg.
For instance
int
foo (int a, int b)
{
return ((a & (1 << 25)) ? 5 : 4);
}
Doesn't require a comparison, the optimal form is:
foo(int, int):
ubfx x0, x0, 25, 1
add w0, w0, 4
ret
and no compare is actually needed. If you represent the instruction using an
ANDS instead of a zero_extract then you get close, but you end up with an ands
followed by an add, which is a slower operation.
gcc/ChangeLog:
* config/aarch64/aarch64.md (*tb<optab><mode>1): Rename to...
(*tb<optab><ALLI:mode><GPI:mode>1): ... this.
(tbranch_<code><mode>4): New.
* config/aarch64/iterators.md(ZEROM, zerom): New.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/tbz_1.c: New test.
---
gcc/config/aarch64/aarch64.md | 33 ++++++++---
gcc/config/aarch64/iterators.md | 2 +
gcc/testsuite/gcc.target/aarch64/tbz_1.c | 95 ++++++++++++++++++++++++++++++++
3 files changed, 122 insertions(+), 8 deletions(-)
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 896b6a8ac79..d749c98eef6 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -947,12 +947,29 @@
(const_int 1)))]
)
-(define_insn "*tb<optab><mode>1"
+(define_expand "tbranch_<code><mode>3"
[(set (pc) (if_then_else
- (EQL (zero_extract:DI (match_operand:GPI 0 "register_operand" "r")
- (const_int 1)
- (match_operand 1
- "aarch64_simd_shift_imm_<mode>" "n"))
+ (EQL (match_operand:ALLI 0 "register_operand")
+ (match_operand 1 "aarch64_simd_shift_imm_<mode>"))
+ (label_ref (match_operand 2 ""))
+ (pc)))]
+ ""
+{
+ rtx bitvalue = gen_reg_rtx (<ZEROM>mode);
+ rtx reg = gen_lowpart (<ZEROM>mode, operands[0]);
+ rtx val = GEN_INT (1UL << UINTVAL (operands[1]));
+ emit_insn (gen_and<zerom>3 (bitvalue, reg, val));
+ operands[1] = const0_rtx;
+ operands[0] = aarch64_gen_compare_reg (<CODE>, bitvalue,
+ operands[1]);
+})
+
+(define_insn "*tb<optab><ALLI:mode><GPI:mode>1"
+ [(set (pc) (if_then_else
+ (EQL (zero_extract:GPI (match_operand:ALLI 0 "register_operand" "r")
+ (const_int 1)
+ (match_operand 1
+ "aarch64_simd_shift_imm_<ALLI:mode>" "n"))
(const_int 0))
(label_ref (match_operand 2 "" ""))
(pc)))
@@ -963,15 +980,15 @@
{
if (get_attr_far_branch (insn) == 1)
return aarch64_gen_far_branch (operands, 2, "Ltb",
- "<inv_tb>\\t%<w>0, %1, ");
+ "<inv_tb>\\t%<ALLI:w>0, %1, ");
else
{
operands[1] = GEN_INT (HOST_WIDE_INT_1U << UINTVAL (operands[1]));
- return "tst\t%<w>0, %1\;<bcond>\t%l2";
+ return "tst\t%<ALLI:w>0, %1\;<bcond>\t%l2";
}
}
else
- return "<tbz>\t%<w>0, %1, %l2";
+ return "<tbz>\t%<ALLI:w>0, %1, %l2";
}
[(set_attr "type" "branch")
(set (attr "length")
diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md
index d10cf93572e..a521dbde1ec 100644
--- a/gcc/config/aarch64/iterators.md
+++ b/gcc/config/aarch64/iterators.md
@@ -1107,6 +1107,8 @@
;; Give the number of bits in the mode
(define_mode_attr sizen [(QI "8") (HI "16") (SI "32") (DI "64")])
+(define_mode_attr ZEROM [(QI "SI") (HI "SI") (SI "SI") (DI "DI")])
+(define_mode_attr zerom [(QI "si") (HI "si") (SI "si") (DI "di")])
;; Give the ordinal of the MSB in the mode
(define_mode_attr sizem1 [(QI "#7") (HI "#15") (SI "#31") (DI "#63")
diff --git a/gcc/testsuite/gcc.target/aarch64/tbz_1.c b/gcc/testsuite/gcc.target/aarch64/tbz_1.c
new file mode 100644
index 00000000000..39deb58e278
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/tbz_1.c
@@ -0,0 +1,95 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-O2 -std=c99 -fno-unwind-tables -fno-asynchronous-unwind-tables" } */
+/* { dg-final { check-function-bodies "**" "" "" { target { le } } } } */
+
+#include <stdbool.h>
+
+void h(void);
+
+/*
+** g1:
+** tbnz w[0-9]+, #?0, .L([0-9]+)
+** ret
+** ...
+*/
+void g1(bool x)
+{
+ if (__builtin_expect (x, 0))
+ h ();
+}
+
+/*
+** g2:
+** tbz w[0-9]+, #?0, .L([0-9]+)
+** b h
+** ...
+*/
+void g2(bool x)
+{
+ if (__builtin_expect (x, 1))
+ h ();
+}
+
+/*
+** g3_ge:
+** tbnz w[0-9]+, #?31, .L[0-9]+
+** b h
+** ...
+*/
+void g3_ge(int x)
+{
+ if (__builtin_expect (x >= 0, 1))
+ h ();
+}
+
+/*
+** g3_gt:
+** cmp w[0-9]+, 0
+** ble .L[0-9]+
+** b h
+** ...
+*/
+void g3_gt(int x)
+{
+ if (__builtin_expect (x > 0, 1))
+ h ();
+}
+
+/*
+** g3_lt:
+** tbz w[0-9]+, #?31, .L[0-9]+
+** b h
+** ...
+*/
+void g3_lt(int x)
+{
+ if (__builtin_expect (x < 0, 1))
+ h ();
+}
+
+/*
+** g3_le:
+** cmp w[0-9]+, 0
+** bgt .L[0-9]+
+** b h
+** ...
+*/
+void g3_le(int x)
+{
+ if (__builtin_expect (x <= 0, 1))
+ h ();
+}
+
+/*
+** g5:
+** mov w[0-9]+, 65279
+** tst w[0-9]+, w[0-9]+
+** beq .L[0-9]+
+** b h
+** ...
+*/
+void g5(int x)
+{
+ if (__builtin_expect (x & 0xfeff, 1))
+ h ();
+}
</cut>
# [GNU-767] Support changing SVE vector length in remote debugging
- Patches to gdbserver to support changing the SVE vector length: There
was an upstream discussion about whether changing the implementation
from relying on expedited registers to relying on sending target
descriptions over the wire was a better approach. Simon Marchi
detailed his idea on how to do that and it does seem better.
- Started implementing Simon's approach of sending target descriptions
over the wire for each thread.
# Misc
- Sent and later committed a couple of patches¹ fixing whitespace issues
in a Python script that generates a GDB source file.
--
Thiago
¹ https://inbox.sourceware.org/gdb-patches/20221202192200.405379-1-thiago.bau…
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
- v2 of the gdbserver patches to support changing the SVE vector length
was quickly reviewed by both Luis and Simon Marchi. I applied their
review suggestions and I'm now working on fixing a bug with
multi-threaded programs that they spotted.
- Submitted a couple of small patches¹ fixing tab vs spaces issues in
the gdbarch.py script that generates some source code in GDB.
# Misc
- Fixed problem in the tcwg-dev/start.sh script where asking docker to
expose /dev/kvm to a dev container on a host which doesn't have KVM
support causes docker to error out (reported by David Spickett). Sent
Gerrit change request “42669: tcwg-dev: Add heuristic to check for KVM
support on the host” to fix it. David reviewed and merged it. Thanks!
--
Thiago
¹ https://inbox.sourceware.org/gdb-patches/20221202192200.405379-1-thiago.bau…
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
- Worked on v2 of the gdbserver patches improving SVE support. Found a
couple of simplifications that could be made to the code. Rebased on
current master branch and finished regression testing and patch
preparation. Wrote the cover letter.
- Finally posted the patch series upstream¹.
--
Thiago
¹ https://inbox.sourceware.org/gdb-patches/20221126020452.1686509-1-thiago.ba…
Progress:
* UM-2 [QEMU upstream maintainership]
- More conversions of devices to 3-phase reset in pursuit of the
interim goal of getting rid of device_class_set_parent_reset()
- Investigated a regression in a TF-A workload: this was due to
recent pagetable walk refactoring breaking debug accesses.
- code review, etc; mostly this has been of for-8.0 material, as
(other than the above mentioned ptw regression) there haven't
been many release-worthy issues this freeze cycle.
-- PMM
Hi David,
Our CI flagged your commit; it seems it miscompiles 403.gcc from SPEC CPU2006 at -O3 -flto for aarch64-linux-gnu. Would you please investigate?
Let me know if you need any assistance in reproducing this.
Thanks!
===
After working-3971-g5f7f484ee54e commit 5f7f484ee54ebbf702ee4c5fe9852502dc237121
Author: David Green <david.green(a)arm.com>
[AArch64] Add GPR rr instructions to isAssociativeAndCommutative
the following benchmarks slowed down by more than 3%:
- 403.gcc failed to run
Configuration:
- Benchmark: SPEC CPU2006
- Toolchain: Clang + Glibc + LLVM Linker
- Version: all components were built from their tip of trunk
- Target: aarch64-linux-gnu
- Compiler flags: -O3 -flto
- Hardware: NVidia TX1 4x Cortex-A57
--
Maxim Kuvyrkov
https://www.linaro.org
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
- Working on v2 of the gdbserver patches improving SVE support. Found
and fixed a memory leak in my code while preparing patches for
upstream submission. Continuing preparing the patches.
# [GNU-796] Stabilise GDB testsuite results in the CI
- Analysed failures of “fast_check_gdb” CI jobs over the weekend. They
were caused by unrelated build issues in GCC and libstdc++.
--
Thiago
Project Stratos
===============
- finished [blog post for virtio-camera]
- now live [on web site]
- did a review of [virtio-loopback]
- started reviewing [PATCH v9 0/8] KVM: mm: fd-based approach for
supporting KVM Message-Id:
<20221025151344.3784230-1-chao.p.peng(a)linux.intel.com>
- trying to assess if user-space facing solution for memory sharing
[blog post for virtio-camera]
<https://linaro.atlassian.net/jira/core/projects/LBO/board?selectedIssue=LBO…>
[on web site]
<https://www.linaro.org/blog/the-challenges-of-abstracting-virtio/>
[virtio-loopback] <https://git.virtualopensystems.com/virtio-loopback>
vhost-device maintainer effort ([UM-196])
- debugged regression in virtio-vsock and QEMU
- should have some error message patches to post
[UM-196] <https://linaro.atlassian.net/browse/UM-196>
Single Binary ([QEMU-487])
==========================
- posted [PATCH for 8.0 v5 00/20] use MemTxAttrs to avoid current_cpu
in hw/ Message-Id: <20221111182535.64844-1-alex.bennee(a)linaro.org>
[QEMU-487] <https://linaro.atlassian.net/browse/QEMU-487>
QEMU Upstream Work ([UM-2])
===========================
- posted [PATCH for 7.2-rc1 v2 00/12] testing, docs, plugins, arm
pre-PR Message-Id: <20221111145529.4020801-1-alex.bennee(a)linaro.org>
- posted [PULL for 7.2 00/10] testing and doc updates Message-Id:
<20221115133439.2348929-1-alex.bennee(a)linaro.org>
- did a bunch of follow-up testing to shake out other console bugs
- posted [PATCH for 7.2-rc1 v2 00/12] testing, docs, plugins, arm
pre-PR Message-Id:
<20221111145529.4020801-1-alex.bennee(a)linaro.org>
- posted [PATCH for 7.2? v1 0/2] Arm GICv2 patches Message-Id:
<20221115134048.2352715-1-alex.bennee(a)linaro.org>
[UM-2] <https://linaro.atlassian.net/browse/UM-2>
Other
=====
- hackbox2 upgrade follow-up
- health check content
Completed Reviews [1/1]
=======================
[PATCH] ci: replace x86_64 macos-11 with aarch64 macos-12
Message-Id: <20221116175023.80627-1-berrange(a)redhat.com>
Absences
========
Current Review Queue
====================
TODO [PATCH v6 00/21] Drivers for gunyah hypervisor
Message-Id: <20221026185846.3983888-1-quic_eberman(a)quicinc.com>
==================================================================================================================
TODO [PATCH v2 0/1] tcg: add perfmap and jitdump
Message-Id: <20221114161321.3364875-1-iii(a)linux.ibm.com>
========================================================================================================
TODO [PATCH for-8.0 v3 00/45] tcg: Support for Int128 with helpers
Message-Id: <20221111074101.2069454-1-richard.henderson(a)linaro.org>
=====================================================================================================================================
--
Alex Bennée
Progress:
* UM-2 [QEMU upstream maintainership]
-- the usual release cycle work. Looks relatively quiet this
time around.
-- taking the opportunity to try to catch up on some of the for-8.0
code review
* QEMU-471 [QEMU ARM v9.0 Baseline CPU for TCG]
-- started thinking about how to implement FEAT_FGT. Looking at
the code where this ought to go, I found a minor bug with how
we implement the existing HSTR_EL2 traps, and a case where we
trap AArch32 ATS12NSO* with the wrong syndrome.
-- PMM
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
- Working on v2 of the gdbserver patches improving SVE support. Tested new
code for regressions in different systems and configurations and found
none. Preparing new version of the patches for upstream submission. Will
likely post them early next week.
--
Thiago
Project Stratos
===============
- finished [blog post for virtio-camera]
- did a review of [virtio-loopback]
[blog post for virtio-camera]
<https://linaro.atlassian.net/jira/core/projects/LBO/board?selectedIssue=LBO…>
[virtio-loopback] <https://git.virtualopensystems.com/virtio-loopback>
vhost-device maintainer effort ([UM-196])
- review work
Single Binary ([QEMU-487])
==========================
- cleaning up current_cpu in [with mxtxattrs]
- stumbled into regressions in the way of testing
- posted [PATCH for 8.0 v5 00/20] use MemTxAttrs to avoid current_cpu
in hw/ Message-Id: <20221111182535.64844-1-alex.bennee(a)linaro.org>
[QEMU-487] <https://linaro.atlassian.net/browse/QEMU-487>
[with mxtxattrs]
<https://github.com/stsquad/qemu/tree/memtxattrs/cpuid-v5>
QEMU Upstream Work ([UM-2])
===========================
- posted [PATCH for 7.2-rc1 v2 00/12] testing, docs, plugins, arm
pre-PR Message-Id: <20221111145529.4020801-1-alex.bennee(a)linaro.org>
[UM-2] <https://linaro.atlassian.net/browse/UM-2>
Other
=====
- hackbox2 upgrade follow-up
- health check content
Completed Reviews [7/7]
=======================
[PATCH 00/24] accel/tcg: Rewrite user-only vma tracking
Message-Id: <20221006031113.1139454-1-richard.henderson(a)linaro.org>
[PATCH v1 00/12] Introduce xenpv machine for arm architecture
Message-Id: <20221015050750.4185-1-vikram.garhwal(a)amd.com>
[PATCH] Run docker probe only if docker or podman are available
Message-Id: <20221030083510.310584-1-sw(a)weilnetz.de>
[PULL 3/3] linux-test (tests/tcg/multiarch/linux-test.c) add check
Message-Id: <1626902375-7002-4-git-send-email-tsimpson(a)quicinc.com>
[PATCH v5 00/18] tests/qtest: Enable running qtest on Windows
Message-Id: <20221006151927.2079583-3-bmeng.cn(a)gmail.com>
[PATCH v1 00/12] Introduce xenpv machine for arm architecture
Message-Id: <20221015050750.4185-1-vikram.garhwal(a)amd.com>
[PATCH RFC 0/1] tcg: add perfmap and jitdump
Message-Id: <20221012051846.1432050-1-iii(a)linux.ibm.com>
Absences
========
Current Review Queue
====================
TODO [PATCH for-8.0 v3 00/45] tcg: Support for Int128 with helpers
Message-Id: <20221111074101.2069454-1-richard.henderson(a)linaro.org>
=====================================================================================================================================
TODO [PATCH v3 0/7] memory: prevent dma-reentracy issues
Message-Id: <20221028191648.964076-1-alxndr(a)bu.edu>
===========================================================================================================
TODO [QEMU][PATCH v2 0/5] Introduce Xilinx Versal CANFD
Message-Id: <20221022054746.28217-1-vikram.garhwal(a)amd.com>
==================================================================================================================
--
Alex Bennée
Progress:
* UM-2 [QEMU upstream maintainership]
-- identified another piece of the reset mechanics that can be
tractably cleaned up: I think we should be able to get
everything (effectively) moved over to the 3-phase reset system
-- sent out various for-8.0 patchsets that convert devices that
were using device_class_set_parent_reset(), since getting rid
of that function is step 1 of that cleanup
-- code review etc
-- PMM
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
- Confirmed that gdbserver doesn't send a new XML target description
over the wire when the vector length changes, so there's no impact of
these patches on the amount of remote protocol traffic, which was a
concern for GDB maintainers.
- Started doing some up code cleanup and regression tests to prepare for
submitting v2 of the patches.
# [GNU-796] Stabilise GDB testsuite results in the CI
- Committed Gerrit change request adding the new CI job¹ to run fast
subset of GDB tests, which also has stable results. The list of tests
comes from Sourceware's builder project.
--
Thiago
¹ https://ci.linaro.org/view/tcwg_gnu_native/job/tcwg_gnu_native_fast_check_g…
Progress:
* UM-2 [QEMU upstream maintainership]
-- investigated and thought a bit more about a race condition involving
display devices. I know think I understand the problem but the
best idea I could come up with for a solution is pretty painful...
(Still hoping for feedback on whether I've missed something.)
-- collated and sent out a pull request with various bug fixes for rc0
-- sent some more reset-cleanup patches (these will be for 8.0)
-- PMM
Hi guys,
I will attempt to join today, but we've been finding that connectivity is dependent on the
number of rain drops and/or hail in between here and the mast. So I'm not overly hopeful
for later this evening.
Status report:
- Fixed a failure in my x86 TARGET_TB_PCREL patches, which caused
non-booting of some images (in today's tcg PR).
- Revised the TCGv_i128 patch set (not yet posted).
- Lots of work on accel/tcg/{cputlb,user-exec}.c, to honor
atomicity requirements of FEAT_LSE2.
Next up: Adding qemu_ld/st helpers and patterns for i128.
r~
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
- Finished implementing Luis' idea of having a process-wide target
description in addition to the thread-specific one. Started checking
changes for regressions.
--
Thiago
Progress:
* UM-2 [QEMU upstream maintainership]
- Usual code review and patch handling work
- Cross-checked our boot.c code against the kernel's booting.rst,
and sent patch fixing a few EL3 config bits we weren't setting
- Sent out the minutes from QEMU Summit
* QEMU-471 [QEMU ARM v9.0 Baseline CPU for TCG]
- Wrote and sent out patches to implement the extra traps
required for FEAT_EVT
-- PMM
Hello,
# [GNU-796] Stabilise GDB testsuite results in the CI
- Reworked and committed Gerrit change request for jenkins-scripts
adding a new CI job definition in tcwg_gnu-build.sh.
- Also reworked and committed another one to the same script adding a
default manifest file if one isn't specified on the command line.
# [GNU-767] Support changing SVE vector length in remote debugging
- Implemented Luis' suggestion of assuming that if ptrace can't read the
SVE state, then SVE is disabled (which is what gdbserver does before
my patches). It turns out that the only situation where this happens,
gdbserver doesn't actually care about the target description.
- Started exploring/implementing Luis' idea of having a process-wide
target description in addition to the thread-specific one. As Luis
suggests, it may simplify the code.
--
Thiago
Progress:
* UM-2 [QEMU upstream maintainership]
- Usual code review and patch handling work
- Spent a couple of days investigating a long-standing intermittent
test case failure booting a kernel on the raspberry pi. This turned
out to be caused by two linked bugs:
- the test framework unhelpfully disconnects immediately from the
guest serial console when the test ends, rather than staying
connected until the QEMU process exits to capture all the output
- QEMU's socket chardev loses data when the remote end closes the
connection if the guest UART hasn't read all of it
So the test was failing because the guest sometimes only saw
the 'h' of the final 'halt' command the test sent...
- Investigated and fixed a regression caused by some of last week's
reset patches. (Turns out the patch to fix it had been sent back
in 2021 but we accidentally dropped it on the floor. Oops.)
thanks
-- PMM
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
- Continued incorporating suggestions from Luis' review of the patches.
Working on a few regressions I introduced in the process.
# [GNU-796] Stabilise GDB testsuite results in the CI
- Started addressing Maxim's comments to my change requests for
jenkins-scripts.
--
Thiago
Progress:
* UM-2 [QEMU upstream maintainership]
- Started looking again at QEMU's rather messy set of reset related APIs.
Dug out the half-a-plan I wrote up a long time back and refreshed my
memory of what I was hoping we might be able to do.
- As an initial step, wrote some patches to get rid of uses of
several deprecated reset-related functions so that I only have to
think about one set of functions and not two...
-- PMM
Hello,
I haven't sent a report since week #36. For that reason, this report
covers three weeks.
# [GNU-796] Stabilise GDB testsuite results in the CI
- Implemented CI job to run fast GDB tests based on the list from
Sourceware's builder. Submitted Gerrit change requests for
jenkins-scripts and ci/job/configs.
- Posted Gerrit change request for jenkins-scripts with an improvement
to tcwg_gnu-build.sh to use a default path for the artifacts file if
one isn't given on the command line.
# [GNU-767] Support changing SVE vector length in remote debugging
- Started incorporating suggestions from Luis' review of the patches.
# Community participation
- Reviewed mailing list patch “[PATCH v3] gdb/arm: Handle lazy FPU
register stacking”
- Attended GNU Tools Cauldron 2022.
--
Thiago
Progress:
* UM-2 [QEMU upstream maintainership]
- sent out patch which adds a retry-on-EINTR loop to KVM_CREATE_VM ioctls
- wrote up the draft of the minutes for the QEMU Summit for review
- more code review and pullrequest collation (notably the Arm v8R support
patchset)
* QEMU-471 [QEMU ARM v9.0 Baseline CPU for TCG]
- read up on the remaining unimplemented features under this epic;
closed out one we'd already implemented, and wrote up enough detail
on the others to be happy with putting them all into the current
sprint (they're all small features)
- started looking at FEAT_GTG
thanks
-- PMM
Project Stratos
===============
- held poll for next meeting
- started planning for virtio-camera/sensor
QEMU Upstream Work ([UM-2])
===========================
- posted [PULL for 7.1 0/3] memory leak and testing tweaks Message-Id:
<CAFEAcA8oPjTq9quHxOCSczckwmmBSP0fY6dtCzwrNs59pMrNCw(a)mail.gmail.com>
- sadly one patch had to be reverted as it exposed another race
- posted [PATCH v1 00/10] plugins/next (disas, monitor, docs, execlog)
Message-Id: <20220921160801.1490125-6-alex.bennee(a)linaro.org>
- posted [PULL 00/30] testing updates (docker, avocado, deprecate
32bit BE MIPS) Message-Id:
<20220920171533.1098094-4-alex.bennee(a)linaro.org>
[UM-2] <https://linaro.atlassian.net/browse/UM-2>
Update docs
- mention -d plugin
- document features of tests/plugin plugins
- clean up command lines to drop builddir
KVM Forum
=========
- Attended KVM forum, gave a talk, helper with another
Completed Reviews [3/3]
=======================
[PATCH 00/62] target/arm: Implement FEAT_HAFDBS
Message-Id: <20220703082419.770989-1-richard.henderson(a)linaro.org>
[RFC PATCH v2] gdbstub: only send stop-reply packets when allowed to
Message-Id: <ba99db564c3aeb1812bdfbc9116849092334482f.1661362557.git.quic_mathbern(a)quicinc.com>
[RFC 0/4] Support interactions between TCG plugins
Message-Id: <20220901182734.2987337-1-fasano(a)mit.edu>
Absences
========
Current Review Queue
====================
TODO [PATCH v4 0/7] tcg: pc-relative translation blocks
Message-Id: <20220906091126.298041-1-richard.henderson(a)linaro.org>
=========================================================================================================================
TODO [PATCH 00/51] tests/qtest: Enable running qtest on Windows
Message-Id: <20220824094029.1634519-1-bmeng.cn(a)gmail.com>
========================================================================================================================
TODO [PATCH v2 00/33] accel/tcg + target/arm: pc-relative translation
Message-Id: <20220816203400.161187-1-richard.henderson(a)linaro.org>
=======================================================================================================================================
--
Alex Bennée
Progress:
* UM-2 [QEMU upstream maintainership]
- attended KVM Forum
- catching up with code review, email, etc...
- sent out an Arm pullreq now 7.2 has opened up for development
* QEMU-422 [QEMU Arm Neoverse V1 vCPU for TCG]
- diagnosed a regression caused by the recent FEAT_PMUv3p5 changes
and sent out a fix
KVM Forum trip highlights:
* it was good to be able to meet people face-to-face again after
several years
* Cloud use of Arm hardware has now got to the point where big cloud
companies are working through performance issues and then coming to
present about it; e.g. Google did a talk about perf issues during
migration on an Ampere Altra setup. The solutions seem to be a mix
of "apply the lessons and fixes we already went through with x86"
and "architecture fixes coming down the pipe" (in this case
FEAT_TLBIRANGE and FEAT_BBM).
* lots of Google talks about pKVM (using hypervisor hardware on
Android to improve security). In fact lots of Google all over --
apparently they've made a big push to do more upstream kernel work
and as a result a large chunk of the kernel KVM commits come from
them...
* talk from Xilinx (now with AMD) about doing co-simulation of QEMU
and RTL -- basically (with the aid of a lot of non-upstream stuff)
having QEMU talk to a SystemC environment so you can have eg an
emulated ethernet card in FPGA that plugs into a QEMU VM. This kind
of thing is a use-case which historically upstream have not really
been interested in addressing.
* Which brings me to the BoF session on emulation, perhaps the most
interesting bit of the conference for me. There was a lot of
discussion about whether QEMU might move closer to what I call the
"bag of lego bricks" paradigm, where it provides device models and
users might be able to configure it at runtime to stitch them
together, perhaps adding out-of-tree devices of their own. There is
clearly interest in this (eg from attendees from Xilinx and
Qualcomm); the sticking point is that from upstream's perspective
this seems like "you should do this thing that will benefit us and
not you". My take is that whether this goes anywhere will depend on
whether those who would like this are prepared to coordinate
together to present themselves as a group who are willing to dig in
to the necessary upstream refactoring and cleanup that would be a
precondition for having something like this be anywhere near
supportable, i.e. that they're a group who will come and help
rather than merely consume...
* There was also a shorter discussion in the BoF about the idea of
"heterogenous CPU emulation", eg one QEMU model with both Arm and
Microblaze CPUs. This is not conceptually controversial, it's just
a lot of work. It seemed like maybe a few folk now care enough to
have a go at it.
-- PMM
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
- Made a few last-minute adjustments to the code and fixed a couple of
regressions on x86_64-linux. Re-ran regression tests on x86_64-linux and
aarch64-linux. Wrote cover letter and descriptions for all the patches.
- Finally posted the patch series upstream¹.
# [GNU-796] Stabilize GDB testsuite results in the Linaro CI
- Started working on this issue. Currently adding a new CI job to run the
same small subset of GDB testcases that Sourceware's buildbot runs. This
subset runs quickly and has stable results so the job will be a good
canary to check that the CI infrastructure is working correctly.
--
Thiago
¹https://inbox.sourceware.org/gdb-patches/20220908064151.3959930-1-thiago.b…
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
- Cleaned up code for upstream submission, and divided it into patches.
A couple of the patches affect other architectures and OSes, so made
sure the code builds on as many combinations I can test, and now doing
final regression testing on some of them. I'm hoping to finally send
the patches upstream early next week.
--
Thiago
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
- Finished fixing regressions in my changes to gdbserver for debugging an
inferior which changes the SVE length.
- Started cleaning up code for upstream submission and dividing it into
patches.
# Community participation
- Reviewed mailing list patches:
- [PATCH,v3] [aarch64] Fix removal of non-address bits for PAuth
- [PATCH 1/2] gdb: Fix deleted thread when issuing next command
- [PATCH 2/2] gdb: Improve the resuming of the stepped thread
--
Thiago
Progress (short week, 3 days):
* UM-2 [QEMU upstream maintainership]
- pretty much just tying up loose ends and doing other
miscellaneous bits and pieces
* QEMU-422 [QEMU Arm Neoverse V1 vCPU for TCG]
- respin, resend of PMUv3p5 series
-- PMM
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
- v2 of the patches fixing a small SVE bug when debugging in native mode
an inferior which changes the SVE length was committed upstream.
- Continued working on fixing regressions in my changes to gdbserver for
debugging an inferior which changes the SVE length.
--
Thiago
Project Stratos
===============
- continued working on [adding vhost-user-rng to crosvm]
- this is to demo Stratos on Gunyah
- re-built guest kernel with known working backend
- it works :-)
- initial review of Viresh's slides for KVM Forum talk
[adding vhost-user-rng to crosvm]
<https://github.com/stsquad/crosvm/tree/add-vhost-user-rng>
vhost-device maintainer effort ([UM-196])
- prepared a clean-up [branch for new queue interface]
- spent time testing and realised it had broken things
[branch for new queue interface]
<https://github.com/stsquad/vhost-device/tree/update-queue-interface>
QEMU Upstream Work ([UM-2])
===========================
- posted [PULL for 7.1 0/3] memory leak and testing tweaks Message-Id:
<CAFEAcA8oPjTq9quHxOCSczckwmmBSP0fY6dtCzwrNs59pMrNCw(a)mail.gmail.com>
- sadly one patch had to be reverted as it exposed another race
[UM-2] <https://linaro.atlassian.net/browse/UM-2>
Completed Reviews [1/1]
=======================
[PATCH 00/62] target/arm: Implement FEAT_HAFDBS
Message-Id: <20220703082419.770989-1-richard.henderson(a)linaro.org>
Absences
========
- will take a long w/e for August BH
Current Review Queue
====================
TODO [PATCH v2 00/33] accel/tcg + target/arm: pc-relative translation
Message-Id: <20220816203400.161187-1-richard.henderson(a)linaro.org>
=======================================================================================================================================
TODO [PATCH for-7.2 00/21] accel/tcg: minimize tlb lookups during translate + user-only PROT_EXEC fixes
Message-Id: <20220812180806.2128593-22-richard.henderson(a)linaro.org>
===========================================================================================================================================================================
--
Alex Bennée
Progress:
* UM-2 [QEMU upstream maintainership]
- respin and resend for a few patchsets after code review
* QEMU-422 [QEMU Arm Neoverse V1 vCPU for TCG]
- identified what the old ARMv8.5-CMODX feature is now
("prefetch speculation protection") and confirmed that
QEMU is already compliant with the instruction fetch ordering
requirements so there's no coding work required here
- Checked that we implement FEAT_ETS already and sent patches
to advertise it in the ID registers
- Checked that we already conform to the ordering rules required
by "prefetch speculation protection"
- Discovered that we accidentally fail to RAZ for a big chunk
of the reserved-for-new-AArch32-ID-registers space for v8 CPUs;
sent patches fixing that
thanks
-- PMM
Hello Linaro Toolchain Working Group,
clang-arm64-windows-msvc is red for 12 days. The host is missing a correct
version of msvc.
Is somebody looking at this?
Thanks
Galina
Progress:
* UM-2 [QEMU upstream maintainership]
- usual release cycle work: rounded up a couple of last-minute
fixes for "whoops, this crashes" bugs and some safe changes like
docs typo fixes.
* QEMU-422 [QEMU Arm Neoverse V1 vCPU for TCG]
- Finished implementing the FEAT_PMUv3p5 work. In the process of
testing it I found a handful of bugs in our existing PMU
emulation code. Sent out the patchset which fixes those bugs and
adds FEAT_PMUv3p5.
- Cleaned up the epic to remove subtasks we aren't going to
implement (FEAT_SPE, FEAT_TRF), and added one for "actually
define the new CPU model"
- FEAT_LSE2 is the only remaining real work here, and it is
probably going to be seriously tricky...(i.e. I hope to leave
it to RTH ;-))
-- PMM
Project Stratos
===============
- continued working on [adding vhost-user-rng to crosvm]
- this is to demo Stratos on Gunyah
- backend comes up and device is detected but queues are not
consumed
- had some initial discussions with Viresh about talk structure for
KVM Forum
[adding vhost-user-rng to crosvm]
<https://github.com/stsquad/crosvm/tree/add-vhost-user-rng>
vhost-device maintainer effort ([UM-196])
- prepared a clean-up [branch for new queue interface]
[UM-196] <https://linaro.atlassian.net/browse/UM-196>
[branch for new queue interface]
<https://github.com/stsquad/vhost-device/tree/update-queue-interface>
QEMU Upstream Work ([UM-2])
===========================
- posted [PATCH for 7.1 v1 0/8] memory leaks and speed tweaks
Message-Id: <20220811151413.3350684-8-alex.bennee(a)linaro.org>
- will drop most of the speed tweaks until 7.2 opens
[UM-2] <https://linaro.atlassian.net/browse/UM-2>
Completed Reviews [1/1]
=======================
[PATCH 00/62] target/arm: Implement FEAT_HAFDBS
Message-Id: <20220703082419.770989-1-richard.henderson(a)linaro.org>
Absences
========
- 2 day week next week
- will take a long w/e for August BH
--
Alex Bennée
Hello,
I noticed that I didn't send a report for week #30. Sorry about that. For
that reason, this report covers two weeks.
# [GNU-767] Support changing SVE vector length in remote debugging
- Prepared and submitted upstream a fix and a testcase for a small SVE bug
when debugging in native mode an inferior which changes the SVE length.
Luis reviewed it and I submitted v2 addressing his comments.
# Misc
- Was out for 2 days.
--
Thiago
Progress:
* UM-2 [QEMU upstream maintainership]
- more investigation, triage and fixing of minor bugs in run-up to release
* QEMU-422 [QEMU Arm Neoverse V1 vCPU for TCG]
- starting working on the PMUv8p5 enhancements. These consist of a couple
of new cycle-counter-disable bits (easy) and extension of the event
counters to 64 bits (more tricky). So far I have code for the easy part
and have made a start on the hard part...
-- PMM
Progress:
* UM-2 [QEMU upstream maintainership]
- debugged and sent patch to fix a bug in timer_create
syscall support in linux-user on certain host libcs
- tried and failed to repro a bug where semihosting SYS_HEAPINFO
was returning addresses in the flash rom
- more Coverity issue triage -- now have finished triage of
everything that isn't either in the test suite or an
"insecure data handling" issue. Sent patches for a few
issues, prodded other people about some more...
-- PMM
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
* Fixed last bug which prevented the sve-ioctls QEMU testcase to be
correctly stepped through in gdbserver. The next step is checking
whether any regression was introduced by my changes, and clean up the
code.
* In the process, spotted small bug in GDB when stepping through the
sve-ioctls QEMU testcase using the existing native support. Started
preparing a patch to submit upstream.
# [LLVM-769] Linaro CI
* Increased tcwg-fx-02 ccache max size to 40 GB.
* Learned a bit about Zorg and started adding “depends_on_projects”
field to builders running on Linaro workers.
--
Thiago
Hi,
I noticed that bots like flang-aarch64-latest-gcc are quite slow and could
benefit from enabling ccache. Could you make it available on the system so
it could be turned on for all these builds?
Thanks,
--
Mehdi
Progress:
* UM-2 [QEMU upstream maintainership]
- softfreeze this week; lots of pullrequest merging
- spent some time going through our backlog of Coverity Scan issues, triaging
them and sending patches for some of them
- sent a patchset fixing portability issues in our configure script which
had crept in recently and were causing problems on OpenBSD and NetBSD
- sent out the invite emails for QEMU Summit
-- PMM
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
* Rebased the actual SVE vector length changes on top of the stabilised
per-thread target descriptions changes. Now stabilising the result. Fixed
a couple of problems found when remote-debugging QEMU's sve-ioctls test
binary, currently looking into a third one.
# Linaro CI's GDB testsuite results
* Updated and expanded the LLVM Docker Buildbot Maintenance wiki page with
the information about ccache setup I gathered in the past few days. Also
added a link to it to the Buildkite Bot Maintenance wiki page since
libstdc++ buildkites uses the same configuration.
* Increased ccache max size in GNU build jobs on tcwg-jade-02.
* Updated ABE repo's tested branch with my commits from last week to
improve the GDB testsuite results. Confirmed that the GDB testsuite went
from 538 unexpected failures to 307. There's still room for improvement
though.
--
Thiago
Progress:
* UM-2 [QEMU upstream maintainership]
- took over pullreq handling from RTH for the next couple of weeks
- wrote and sent patches that fix a mishandling of Secure stage 2
translation caused by QEMU not noticing that some config bits are
in VTCR_EL2 and some in VSTCR_EL2. Removed an ancient microoptimization
that was getting in the way of fixing that.
- sent patch fixing incorrect syndrome value for data abort on some
post-indexed load/store insns
- RTH's SME patchset is now upstream, so now would be a good time to
test it if anybody has compiler test cases or similar they were
thinking of running under QEMU
- softfreeze next Tuesday: started reviewing and collecting up
minor patches for a pre-freeze pullreq
-- PMM
Hello,
I went through the LLVM build bots (and also the libc++ buildkites) and
increased their ccache max size. There was a big impact on the flang
builds on tcwg-jade-01 (which went from 1h–2h to 10min–30min), but not
on other builds. One reason is probably that since I made this change
earlier today, there wasn't time yet to finish enough several-hours-long
builds to warm up the caches.
Since different machines have different disk sizes and free space I
chose different ccache max sizes for them, as follows:
* tcwg-fx-02 hosts the following build bots:
- clang-aarch64-sve-vls-2stage
- clang-aarch64-sve-vls
- clang-aarch64-sve-vla-2stage
- clang-aarch64-sve-vla
All share the same ccache. I changed its max size to 20 GB. It's not a
lot, but this machine is also used as a dev box so I though it would
be good to preserve a fair amount of space.
* tcwg-jade-01 hosts the following build bots:
- clang-armv8-lld-2stage
- clang-armv7-vfpv3-2stage
- clang-armv7-global-isel
- clang-armv7-quick
- clang-armv7-2stage
- clang-armv7-lnt
- flang-aarch64-latest-gcc
- flang-aarch64-rel-assert
- flang-aarch64-release
- flang-aarch64-latest-clang
- flang-aarch64-debug
- flang-aarch64-out-of-tree
- flang-aarch64-sharedlibs
- flang-aarch64-dylib
- clang-aarch64-full-2stage
- clang-aarch64-global-isel
- clang-aarch64-lld-2stage
- clang-aarch64-quick
All armv7 and armv8 bots share one ccache, and all aarch64 bots share
another. I changed the max size of each one to 100 GB.
* tcwg-jade-04 hosts the following build bots:
- lldb-aarch64-ubuntu
- lldb-arm-ubuntu
- buildkite-linaro-armv8-libcxx-01
- buildkite-linaro-armv8-libcxx-02
- buildkite-linaro-armv8-libcxx-03
- buildkite-linaro-armv8-libcxx-04
The buildkite bots share a 50 GB ccache, while lldb-arm-ubuntu uses
another 50 GB ccache due to being based on a different distro version.
And lldb-aarch64-ubuntu also uses its own 50 GB ccache.
* tcwg-llvmbot_tk1-01.tcwglab hosts the following build bot:
- silent-linaro-tk1-01
I changed the max cache size to 10 GB. There's not a lot of free space
on the machine.
* tcwg-llvmbot_tk1-03.tcwglab hosts the following build bot:
- normal-linaro-tk1-02
I changed the max cache size to 20 GB.
* tcwg-llvmbot_tk1-05.tcwglab hosts the following build bot:
- silent-linaro-tk1-08
I changed the max cache size to 10 GB.
* The following tcwg-llvmbot_tk1-* machines are currently unreachable so
I couldn't examine them:
- tcwg-llvmbot_tk1-02.tcwglab
- tcwg-llvmbot_tk1-04.tcwglab
* The following tcwg-llvmbot_tk1-* machines are running an llvmbot
container but no builder container, so I didn't change their ccache
configuration:
- tcwg-llvmbot_tk1-06.tcwglab
- tcwg-llvmbot_tk1-07.tcwglab
- tcwg-llvmbot_tk1-08.tcwglab
- tcwg-llvmbot_tk1-09.tcwglab
* tcwg-jade-02 is a GNU builder, and from peeking into a few containers
running build jobs I have the impression that it doesn't use ccache.
Should I look into it?
* Going through our ssh config file I didn't find these build bots that
are listed at http://llvm.validation.linaro.org/ so I didn't check
their ccache usage:
- clang-arm64-windows-msvc-2stage
- clang-arm64-windows-msvc
- clang-arm64-windows-msvc-2stage
- clang-arm64-windows-msvc
- clang-native-arm-lnt-perf
- clang-armv7-vfpv3-full-2stage
- clang-thumbv7-full-2stage
- libcxx aarch64
- libcxx aarch64 -fno-exceptions
--
Thiago
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
* Analysed and fixed a couple more regressions in my branch. The change to
per-thread target descriptions in gdbserver (which was the more
challenging part) is now free of regressions. Now cleaning up the part
that actually deals with the SVE vector length change.
# Linaro CI's GDB testsuite results
* Increased ccache's max size on most build bots. Sent email to the
linaro-toolchain list summarising the current status of their ccache
setup.
* Started looking more closely into how ccache configuration is put
together in our container scripts to document it on the wiki (together
with the steps I took to change the ccache max size).
--
Thiago
Hello Linaro Toolchain Working Group,
linaro-clang-armv8-lld-2stage <https://lab.llvm.org/buildbot/#/workers/140>
has been red since June 7th.
Is anybody looking at the issue?
Thanks
Galina
Progress: (short week, 3 days)
* UM-2 [QEMU upstream maintainership]
- More code review, as softfreeze is now quite close. I think we've
finally got there with the SME patchset (the remaining problems
with v5 were very minor)
* QEMU-422 [QEMU Arm Neoverse V1 vCPU for TCG]
- QEMU-315 OS Lock/DoubleLock work now upstream
-- PMM
Hello,
# Linaro CI's GDB testsuite results
* Implemented new version of change in the Abe shell script to correctly
set auto-load-safe-path so that GDB can load libthread_db.so.1. Since
GDB's configure script needs to be passed an argument containing
literal dollar signs, use '@@' instead of '$' to avoid the shell
misinterpreting it and substitute at the point of use. This version
worked and was merged to the Abe repo.
* Implemented and merged change in the Abe shell script to set variables
pointing to language-specific target tools only if they are present in
the path. This fixes Ada test failures in the GDB testsuite.
* Implemented and merged improvement to our tcwg_gnu-build.sh script to
allow specifying on the command line the Abe repo and branch to use.
# [GNU-767] Support changing SVE vector length in remote debugging
* Analysed and fixed a couple more regressions in my branch.
--
Thiago
Progress:
* UM-2 [QEMU upstream maintainership]
- Code review (misc, plus another round on the SME patchset)
- KVM Forum programme committee work
* QEMU-422 [QEMU Arm Neoverse V1 vCPU for TCG]
- Wrote and sent patches that deal with the last of the "small and
uninteresting" dependencies of the V1 support epic (this one covers
Feat_DoubleLock, which lets guest OSes suppress debug events as
part of their power-down-a-CPU sequence)
-- PMM
Hi guys. I just realized that today's meeting will be right in the middle of dinner
plans. I'll organize better next week. Anyway, here's my status:
- Fourth SME patch set -- parts merged, and some bugs fixed.
- Base/arm-compat portion of semihosting rewrite now upstream.
Target-specific bits for m68k, mips, nios2, xtensa outstanding.
- Almost done with FEAT_HAFDBS (hardware access/dirty updates).
Big changes to ptw.c to make that work: 50+ patches.
The reorg should make FEAT_RME easier though.
r~
Hello,
I just noticed that I didn't send a report for week #24. Sorry about
that. For that reason, this report covers two weeks.
# Linaro CI's GDB testsuite results
* Submitted upstream patch fixing gdb_compile regexp to account for our
GNATMAKE_FOR_TARGET value containing spaces. This should solve the Ada
test failures in our CI.
* Fixed the Abe shell script to correctly set auto-load-safe-path so
that GDB can load libthread_db.so.1. Unfortunately the CI detected a
problem with using the generated manifest to reproduce the toolchain
build, so I'm back to the drawing board on this one.
* Sent a Gerrit change request for the Abe script updating it to use
release 12's branch and tag for GDB and gdbserver, and another one
removing a workaround for a build problem fixed in GDB 9.
* Sent a Gerrit change request for tcwg-dev-build.sh fixing a couple of
issues I found when using it to build and test GDB.
# [GNU-767] Support changing SVE vector length in remote debugging
* Analysed and fixed a couple more regressions in my branch.
# Misc
* Attended a few online sessions from Linaro San Francisco Get Together.
* Sent Gerrit change request updating the TCWG script that generates our
SSH known_hosts file to include the Ed25519 host keys, which are now
preferred in Ubuntu 22.04.
* Was out one day due to “Corpus Christi” public holiday.
--
Thiago
Progress:
* UM-2 [QEMU upstream maintainership]
- First week back after holiday: lots of catchup
- Good progress with the code review queue, including getting
rid of a few things that had been lurking in it for too
long, and another pass through the latest SME series
- KVM Forum programme committee work
-- PMM
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
* Debugged and fixed a few issues in my code where gdbserver was having
trouble with setting the target description for new threads. Also
fixed regressions in a couple more testcases.
# Linaro CI's GDB testsuite results
* Luis commented on IRC that the GDB testsuite results from the Linaro CI
seemed a bit high with about 540 failures, so I set out to investigate.
The two biggest sources of failures are:
1. Ada tests were failing because they can't build their test
executables. This is expected because we don't have the Ada compiler
in the CI, but normally these testcases would just bail out as
unsupported. Found out that there was a regex in the GDB testsuite
that was (IMHO) too strict for our particular setup and fixed it.
2. All CTF tests are failing. The compiler in the CI seems to be
building test executables with CTF debug info, so we do seem to have a
problem there.
The CI's GDB is also not loading libthread_db.so because of a GDB
security setting, so I fixed that as well and expect some more tests
to pass now.
I still haven't submitted my fixes for 1. to upstream and for the
libthread_db.so.1 issue to our CI scripts because I'm still working
with jenkins-scripts and Abe to reproduce the CI environment to verify
the fixes.
--
Thiago
Progress:
* UM-2 [QEMU upstream maintainership]
- This week was almost entirely code review and similar upstream tasks
- managed to review all the preliminary parts of the SME patchset
- reviewed several other refactoring series from rth
- reviewed a big PS/2 keyboard emulation refactoring patchset
- prep for KVM Forum program committee session
* QEMU-422 [QEMU Arm Neoverse V1 vCPU for TCG]
- FEAT_RASv1p1 and FEAT_DoubleFault now upstream
-- PMM
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
* Debugged and fixed issues in my code where gdbserver was in some cases
trying to read inferior registers before aarch64_target was fully
initialised, and also while the inferior thread was running. This
improved reliability but there are still some testsuite regressions to
look into.
# Sourceware bug 28561 - [gdb/testsuite] Error due to not reading \r\n
at end of mi prompt
* Posted comment to the bug report summarising my current results.
* Tried to reproduce the bug using the upstream v5.3 kernel (since I was
able to see it with openSUSE Leap's v5.3 kernel), but failed. Still
trying to understand what that implies.
--
Thiago
Progress (covers two half-weeks):
* UM-2 [QEMU upstream maintainership]
- investigating a reported bug with semihosting syscalls over gdbstub
- reviewed a massive series from RTH refactoring our SVE code
in preparation for handling SME
* QEMU-422 [QEMU Arm Neoverse V1 vCPU for TCG]
- looking at exactly what FEAT_RASv1p1 and FEAT_DoubleFault require
of a minimal RAS implementation like QEMU's
- sent a patch implementing FEAT_RASv1p1 (a no-op for QEMU)
- sent a patch implementing FEAT_DoubleFault (turns out to be
simpler than I initially feared it might be)
-- PMM
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
* Found out that one issue I was having with gdbserver was caused by an
incompatibility it has with zsh (sourceware bug 26116).
* Fixed a gdbserver crash in my code where a register set was NULL in
the target description.
* Now working on an issue where the target description says SVE isn't
supported, but the regsets information says they are. This is caused
by my code sometimes moving the first ptrace call to get the inferior
registers to a time before it is properly stopped.
# Sourceware bug 28561 - [gdb/testsuite] Error due to not reading \r\n
at end of mi prompt
* Set up a few containers and KVM guests to attempt to reproduce this
bug on different environments. Reproduced it successfully on an
openSUSE Leap 15.3 guest, as well as Ubuntu 20.04 and 22.04 containers
in said guest. I wasn't able to reproduce on Ubuntu 20.04 nor 22.04
guests. Suspecting it's a kernel issue where the fix was backported to
the Ubuntu kernels.
--
Thiago
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
- Rebased my code on current master branch.
- Ran into issues with running the GDB testsuite against gdbserver, both
on my branch and on master. Currently investigating.
- Regarding the ptrace issues I'm running into, at Richard's suggestion
I checked the errno and it's ESRCH. This means that the inferior isn't
in a state where gdbserver can fetch its registers. So maybe there's
a race condition in gdbserver itself and it's trying to do that before
the inferior is stopped. Currently investigating.
# Sourceware bug 28561 - [gdb/testsuite] Error due to not reading \r\n
at end of mi prompt
* Luis mentioned this bug so I started investigating it. Tried
reproducing it on Ubuntu 20.04 and 22.04 but without success.
Also tried setting up an openSUSE Leap 15.3 KVM guest to try to
reproduce it there, but the distro's installer hangs.
--
Thiago
Progress:
* UM-2 [QEMU upstream maintainership]
- Joint Linaro/Arm meeting on the Realm Management Extension (RME).
Mostly this was "how the software stack is going to work"; some
useful discussion on how this intersects with QEMU, both as a
potential emulation platform for software development and also
as the VMM for a realm-using KVM virtual machine.
- Kicked off a discussion thread on getting rid of the last parts
of our "ad-hoc CI" this release cycle. The main thing that's
not yet handled by Gitlab CI is FreeBSD and NetBSD hosts.
We might be able to do this if we can find an x86 Linux machine
to act as a gitlab runner (it needs to be able to run guest
BSD VMs).
* QEMU-422 [QEMU Arm Neoverse V1 vCPU for TCG]
- Several small features have now made it upstream so those
subtasks have been closed out
- Looking at FEAT_RASv1p1 and FEAT_DoubleFault. The first of these
is easy because we only model the minimal "no error records"
RAS: I think we can simply bump the ID register fields to
indicate support. The second is a little bit more interesting
because the new SCR_EL3.EASE bit means we suddenly have a
source of physical SErrors (from synchronous external aborts)
when we previously could not have any...
-- PMM
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
* Continued working on the testsuite regressions introduced by my code.
- Found out that the crash I was investigating (which happens when
gdbserver thinks that the kernel doesn't support SVE and crashes)
only occurs with kernel v5.4 from Ubuntu 20.04 and not with
Ubuntu 22.04's v5.15. In the former version,
ptrace(PTRACE_GETREGSET, …, NT_ARM_SVE, …) often returns -1 (but not
always) and gdbserver interprets this as meaning that SVE isn't
supported. The newer kernel always returns successfully from this
call. gdbserver still acts weird so there's more digging to do, but
at least it doesn't crash.
# Misc
- Took one day of vacation.
--
Thiago