- linaro-toolchain - lists.linaro.org

by Peter Maydell

Progress: * UM-2 [QEMU upstream maintainership] -- the usual release cycle work. Looks relatively quiet this time around. -- taking the opportunity to try to catch up on some of the for-8.0 code review * QEMU-471 [QEMU ARM v9.0 Baseline CPU for TCG] -- started thinking about how to implement FEAT_FGT. Looking at the code where this ought to go, I found a minor bug with how we implement the existing HSTR_EL2 traps, and a case where we trap AArch32 ATS12NSO* with the wrong syndrome. -- PMM

2 years, 7 months

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[ACTIVITY] Report for week #45

by Thiago Jung Bauermann

Hello, # [GNU-767] Support changing SVE vector length in remote debugging - Working on v2 of the gdbserver patches improving SVE support. Tested new code for regressions in different systems and configurations and found none. Preparing new version of the patches for upstream submission. Will likely post them early next week. -- Thiago

2 years, 7 months

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[ACTIVITY] week ending Nov. 13 2022

by Alex Bennée

Project Stratos =============== - finished [blog post for virtio-camera] - did a review of [virtio-loopback] [blog post for virtio-camera] <https://linaro.atlassian.net/jira/core/projects/LBO/board?selectedIssue=LBO…> [virtio-loopback] <https://git.virtualopensystems.com/virtio-loopback> vhost-device maintainer effort ([UM-196]) - review work Single Binary ([QEMU-487]) ========================== - cleaning up current_cpu in [with mxtxattrs] - stumbled into regressions in the way of testing - posted [PATCH for 8.0 v5 00/20] use MemTxAttrs to avoid current_cpu in hw/ Message-Id: <20221111182535.64844-1-alex.bennee(a)linaro.org> [QEMU-487] <https://linaro.atlassian.net/browse/QEMU-487> [with mxtxattrs] <https://github.com/stsquad/qemu/tree/memtxattrs/cpuid-v5> QEMU Upstream Work ([UM-2]) =========================== - posted [PATCH for 7.2-rc1 v2 00/12] testing, docs, plugins, arm pre-PR Message-Id: <20221111145529.4020801-1-alex.bennee(a)linaro.org> [UM-2] <https://linaro.atlassian.net/browse/UM-2> Other ===== - hackbox2 upgrade follow-up - health check content Completed Reviews [7/7] ======================= [PATCH 00/24] accel/tcg: Rewrite user-only vma tracking Message-Id: <20221006031113.1139454-1-richard.henderson(a)linaro.org> [PATCH v1 00/12] Introduce xenpv machine for arm architecture Message-Id: <20221015050750.4185-1-vikram.garhwal(a)amd.com> [PATCH] Run docker probe only if docker or podman are available Message-Id: <20221030083510.310584-1-sw(a)weilnetz.de> [PULL 3/3] linux-test (tests/tcg/multiarch/linux-test.c) add check Message-Id: <1626902375-7002-4-git-send-email-tsimpson(a)quicinc.com> [PATCH v5 00/18] tests/qtest: Enable running qtest on Windows Message-Id: <20221006151927.2079583-3-bmeng.cn(a)gmail.com> [PATCH v1 00/12] Introduce xenpv machine for arm architecture Message-Id: <20221015050750.4185-1-vikram.garhwal(a)amd.com> [PATCH RFC 0/1] tcg: add perfmap and jitdump Message-Id: <20221012051846.1432050-1-iii(a)linux.ibm.com> Absences ======== Current Review Queue ==================== TODO [PATCH for-8.0 v3 00/45] tcg: Support for Int128 with helpers Message-Id: <20221111074101.2069454-1-richard.henderson(a)linaro.org> ===================================================================================================================================== TODO [PATCH v3 0/7] memory: prevent dma-reentracy issues Message-Id: <20221028191648.964076-1-alxndr(a)bu.edu> =========================================================================================================== TODO [QEMU][PATCH v2 0/5] Introduce Xilinx Versal CANFD Message-Id: <20221022054746.28217-1-vikram.garhwal(a)amd.com> ================================================================================================================== -- Alex Bennée

2 years, 7 months

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[ACTIVITY] report week ending 10 Nov

by Peter Maydell

Progress: * UM-2 [QEMU upstream maintainership] -- identified another piece of the reset mechanics that can be tractably cleaned up: I think we should be able to get everything (effectively) moved over to the 3-phase reset system -- sent out various for-8.0 patchsets that convert devices that were using device_class_set_parent_reset(), since getting rid of that function is step 1 of that cleanup -- code review etc -- PMM

2 years, 7 months

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[ACTIVITY] Report for week #44

by Thiago Jung Bauermann

Hello, # [GNU-767] Support changing SVE vector length in remote debugging - Confirmed that gdbserver doesn't send a new XML target description over the wire when the vector length changes, so there's no impact of these patches on the amount of remote protocol traffic, which was a concern for GDB maintainers. - Started doing some up code cleanup and regression tests to prepare for submitting v2 of the patches. # [GNU-796] Stabilise GDB testsuite results in the CI - Committed Gerrit change request adding the new CI job¹ to run fast subset of GDB tests, which also has stable results. The list of tests comes from Sourceware's builder project. -- Thiago ¹ https://ci.linaro.org/view/tcwg_gnu_native/job/tcwg_gnu_native_fast_check_g…

2 years, 7 months

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[ACTIVITY] report week ending 4 Nov

by Peter Maydell

Progress: * UM-2 [QEMU upstream maintainership] -- investigated and thought a bit more about a race condition involving display devices. I know think I understand the problem but the best idea I could come up with for a solution is pretty painful... (Still hoping for feedback on whether I've missed something.) -- collated and sent out a pull request with various bug fixes for rc0 -- sent some more reset-cleanup patches (these will be for 8.0) -- PMM

2 years, 7 months

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Virt meeting 2022-11-01

by Richard Henderson

Hi guys, I will attempt to join today, but we've been finding that connectivity is dependent on the number of rain drops and/or hail in between here and the mast. So I'm not overly hopeful for later this evening. Status report: - Fixed a failure in my x86 TARGET_TB_PCREL patches, which caused non-booting of some images (in today's tcg PR). - Revised the TCGv_i128 patch set (not yet posted). - Lots of work on accel/tcg/{cputlb,user-exec}.c, to honor atomicity requirements of FEAT_LSE2. Next up: Adding qemu_ld/st helpers and patterns for i128. r~

2 years, 8 months

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[ACTIVITY] Report for week #43

by Thiago Jung Bauermann

Hello, # [GNU-767] Support changing SVE vector length in remote debugging - Finished implementing Luis' idea of having a process-wide target description in addition to the thread-specific one. Started checking changes for regressions. -- Thiago

2 years, 8 months

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[ACTIVITY] report week ending 28 Oct

by Peter Maydell

Progress: * UM-2 [QEMU upstream maintainership] - Usual code review and patch handling work - Cross-checked our boot.c code against the kernel's booting.rst, and sent patch fixing a few EL3 config bits we weren't setting - Sent out the minutes from QEMU Summit * QEMU-471 [QEMU ARM v9.0 Baseline CPU for TCG] - Wrote and sent out patches to implement the extra traps required for FEAT_EVT -- PMM

2 years, 8 months

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[ACTIVITY] Report for week #42

by Thiago Jung Bauermann

Hello, # [GNU-796] Stabilise GDB testsuite results in the CI - Reworked and committed Gerrit change request for jenkins-scripts adding a new CI job definition in tcwg_gnu-build.sh. - Also reworked and committed another one to the same script adding a default manifest file if one isn't specified on the command line. # [GNU-767] Support changing SVE vector length in remote debugging - Implemented Luis' suggestion of assuming that if ptrace can't read the SVE state, then SVE is disabled (which is what gdbserver does before my patches). It turns out that the only situation where this happens, gdbserver doesn't actually care about the target description. - Started exploring/implementing Luis' idea of having a process-wide target description in addition to the thread-specific one. As Luis suggests, it may simplify the code. -- Thiago

2 years, 8 months

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[ACTIVITY] week ending Oct. 23 2022

by Alex Bennée

Project Stratos =============== - wrote a [draft blog post for virtio-camera] [draft blog post for virtio-camera] <https://linaro.atlassian.net/jira/core/projects/LBO/board?selectedIssue=LBO…> vhost-device maintainer effort ([UM-196]) - review work [UM-196] <https://linaro.atlassian.net/browse/UM-196> [review of vhost-sock for vhost-device] <https://github.com/rust-vmm/vhost-device/pull/216> Single Binary ([QEMU-487]) ========================== - cleaning up current_cpu in [with mxtxattrs] - stumbled into regressions in the way of testing [QEMU-487] <https://linaro.atlassian.net/browse/QEMU-487> [with mxtxattrs] <https://github.com/stsquad/qemu/tree/memtxattrs/cpuid-v5> QEMU Upstream Work ([UM-2]) =========================== - posted [RFC PATCH 0/4] docs/devel suggestions for discussion Message-Id: <20221012121152.1179051-1-alex.bennee(a)linaro.org> - posted [RFC PATCH] target/arm: don't process FCSE translations on physical TLBs Message-Id: <20221021172338.2782240-1-alex.bennee(a)linaro.org> - posted [PATCH v3 00/26] testing/next (docker, avocado, s390x, MAINTAINERS) Message-Id: <20221020115209.1761864-1-alex.bennee(a)linaro.org> - posted [RFC PATCH] contrib/plugins: protect execlog's last_exec expansion Message-Id: <20221021164028.2757262-1-alex.bennee(a)linaro.org> - posted [RFC PATCH] contrib/plugins: enable debug on CONFIG_DEBUG_TCG Message-Id: <20221021155146.2729598-1-alex.bennee(a)linaro.org> [UM-2] <https://linaro.atlassian.net/browse/UM-2> Completed Reviews [4/4] ======================= [libvirt PATCH] conf: skip resource cache init if sysfs files are missing Message-Id: <20221010164753.1701971-1-berrange(a)redhat.com> [libvirt PATCH v2 0/2] conf: fix handling of missing CPU cache info in sysfs Message-Id: <20221011090621.1712993-1-berrange(a)redhat.com> [PATCH v3 00/26] testing/next (docker, avocado, s390x, MAINTAINERS) Message-Id: <20221020115209.1761864-1-alex.bennee(a)linaro.org> [PATCH v6 00/10] Introduce new acpi/smbios avocado tests using biosbits Message-Id: <20221020123506.26363-1-ani(a)anisinha.ca> Other ===== - reviews and appraisals - members operational meeting - QEMU plans Absences ======== Current Review Queue ==================== TODO [PATCH 00/31] tcg: Support for Int128 with helpers Message-Id: <20221020115242.2301066-1-richard.henderson(a)linaro.org> ========================================================================================================================== TODO [PATCH v8 0/9] target/arm: pc-relative translation blocks Message-Id: <20221020030641.2066807-1-richard.henderson(a)linaro.org> ================================================================================================================================= TODO [PATCH v1 00/12] Introduce xenpv machine for arm architecture Message-Id: <20221015050750.4185-1-vikram.garhwal(a)amd.com> ============================================================================================================================ -- Alex Bennée

2 years, 8 months

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[ACTIVITY] report week ending 21 Oct

by Peter Maydell

Progress: * UM-2 [QEMU upstream maintainership] - Usual code review and patch handling work - Spent a couple of days investigating a long-standing intermittent test case failure booting a kernel on the raspberry pi. This turned out to be caused by two linked bugs: - the test framework unhelpfully disconnects immediately from the guest serial console when the test ends, rather than staying connected until the QEMU process exits to capture all the output - QEMU's socket chardev loses data when the remote end closes the connection if the guest UART hasn't read all of it So the test was failing because the guest sometimes only saw the 'h' of the final 'halt' command the test sent... - Investigated and fixed a regression caused by some of last week's reset patches. (Turns out the patch to fix it had been sent back in 2021 but we accidentally dropped it on the floor. Oops.) thanks -- PMM

2 years, 8 months

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[ACTIVITY] Report for week #41

by Thiago Jung Bauermann

Hello, # [GNU-767] Support changing SVE vector length in remote debugging - Continued incorporating suggestions from Luis' review of the patches. Working on a few regressions I introduced in the process. # [GNU-796] Stabilise GDB testsuite results in the CI - Started addressing Maxim's comments to my change requests for jenkins-scripts. -- Thiago

2 years, 8 months

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[ACTIVITY] week ending Oct. 16 2022

by Alex Bennée

Project Stratos =============== - virtio-camera discussion and prep vhost-device maintainer effort ([UM-196]) - more review, vsock merged \o/ [UM-196] <https://linaro.atlassian.net/browse/UM-196> [review of vhost-sock for vhost-device] <https://github.com/rust-vmm/vhost-device/pull/216> QEMU Upstream Work ([UM-2]) =========================== - more leadership committee work - more member engagement on CCA/RME - posted [PATCH v1 0/4] testing/next hotfix (revert bios build, mingw) Message-Id: <20221011113417.794841-1-alex.bennee(a)linaro.org> - posted [PULL 0/1] testing: revert pc-bios build patch Message-Id: <20221011192858.956078-1-alex.bennee(a)linaro.org> - posted [PATCH v2 0/7] testing/next (configure, RUNC, win32|64) Message-Id: <20221013154705.1846261-1-alex.bennee(a)linaro.org> - posted [RFC PATCH 0/4] docs/devel suggestions for discussion Message-Id: <20221012121152.1179051-1-alex.bennee(a)linaro.org> [UM-2] <https://linaro.atlassian.net/browse/UM-2> Completed Reviews [2/2] ======================= [libvirt PATCH] conf: skip resource cache init if sysfs files are missing Message-Id: <20221010164753.1701971-1-berrange(a)redhat.com> [libvirt PATCH v2 0/2] conf: fix handling of missing CPU cache info in sysfs Message-Id: <20221011090621.1712993-1-berrange(a)redhat.com> Other ===== - reviews and appraisals - other admin Absences ======== - day off ill Current Review Queue ==================== TODO [PATCH 00/24] accel/tcg: Rewrite user-only vma tracking Message-Id: <20221006031113.1139454-2-richard.henderson(a)linaro.org> =============================================================================================================================== -- Alex Bennée

2 years, 8 months

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[ACTIVITY] report week ending 14 Oct

by Peter Maydell

Progress: * UM-2 [QEMU upstream maintainership] - Started looking again at QEMU's rather messy set of reset related APIs. Dug out the half-a-plan I wrote up a long time back and refreshed my memory of what I was hoping we might be able to do. - As an initial step, wrote some patches to get rid of uses of several deprecated reset-related functions so that I only have to think about one set of functions and not two... -- PMM

2 years, 8 months

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[TCWG CI] Failure after basepoints/gcc-13-3219-g25413fdb2ac: vect: Teach vectorizer how to handle bitfield accesses

by ci_notify＠linaro.org

Failure after basepoints/gcc-13-3219-g25413fdb2ac: vect: Teach vectorizer how to handle bitfield accesses: Results changed to -10 # build_abe binutils: -9 # build_abe stage1: -5 # build_abe qemu: -2 # linux_n_obj: 624 # First few build errors in logs: # 00:01:42 mm/slub.c:4428:5: error: virtual use of statement not up to date # 00:01:42 mm/slub.c:4428:5: internal compiler error: verify_ssa failed # 00:01:43 make[2]: *** [scripts/Makefile.build:250: mm/slub.o] Error 1 # 00:01:44 make[1]: *** [scripts/Makefile.build:500: mm] Error 2 # 00:01:56 make: *** [Makefile:1990: .] Error 2 from -10 # build_abe binutils: -9 # build_abe stage1: -5 # build_abe qemu: -2 # linux_n_obj: 629 # linux build successful: all # linux boot successful: boot THIS IS THE END OF INTERESTING STUFF. BELOW ARE LINKS TO BUILDS, REPRODUCTION INSTRUCTIONS, AND THE RAW COMMIT. For latest status see comments in https://linaro.atlassian.net/browse/GNU-680 . Status of basepoints/gcc-13-3219-g25413fdb2ac commit for tcwg_kernel: commit 25413fdb2ac24933214123e24ba165026452a6f2 Author: Andre Vieira <andre.simoesdiasvieira(a)arm.com> Date: Tue Oct 11 10:49:27 2022 +0100 vect: Teach vectorizer how to handle bitfield accesses gcc/ChangeLog: * tree-if-conv.cc (if_convertible_loop_p_1): Move ordering of loop bb's from here... (tree_if_conversion): ... to here. Also call bitfield lowering when appropriate. (version_loop_for_if_conversion): Adapt to enable loop versioning when we only need to lower bitfields. (ifcvt_split_critical_edges): Relax condition of expected loop form as this is checked earlier. (get_bitfield_rep): New function. (lower_bitfield): Likewise. (bitfields_to_lower_p): Likewise. (need_to_lower_bitfields): New global boolean. (need_to_ifcvt): Likewise. * tree-vect-data-refs.cc (vect_find_stmt_data_reference): Improve diagnostic message. * tree-vect-patterns.cc (vect_recog_temp_ssa_var): Add default value for last parameter. (vect_recog_bitfield_ref_pattern): New. (vect_recog_bit_insert_pattern): New. gcc/testsuite/ChangeLog: * gcc.dg/vect/vect-bitfield-read-1.c: New test. * gcc.dg/vect/vect-bitfield-read-2.c: New test. * gcc.dg/vect/vect-bitfield-read-3.c: New test. * gcc.dg/vect/vect-bitfield-read-4.c: New test. * gcc.dg/vect/vect-bitfield-read-5.c: New test. * gcc.dg/vect/vect-bitfield-read-6.c: New test. * gcc.dg/vect/vect-bitfield-write-1.c: New test. * gcc.dg/vect/vect-bitfield-write-2.c: New test. * gcc.dg/vect/vect-bitfield-write-3.c: New test. * gcc.dg/vect/vect-bitfield-write-4.c: New test. * gcc.dg/vect/vect-bitfield-write-5.c: New test. * gnu-master-aarch64-next-allnoconfig ** Failure after basepoints/gcc-13-3219-g25413fdb2ac: vect: Teach vectorizer how to handle bitfield accesses: ** https://ci.linaro.org/job/tcwg_kernel-gnu-build-gnu-master-aarch64-next-all… Bad build: https://ci.linaro.org/job/tcwg_kernel-gnu-build-gnu-master-aarch64-next-all… Good build: https://ci.linaro.org/job/tcwg_kernel-gnu-build-gnu-master-aarch64-next-all… Reproduce current build: <cut> mkdir -p investigate-gcc-25413fdb2ac24933214123e24ba165026452a6f2 cd investigate-gcc-25413fdb2ac24933214123e24ba165026452a6f2 # Fetch scripts git clone https://git.linaro.org/toolchain/jenkins-scripts # Fetch manifests for bad and good builds mkdir -p bad/artifacts good/artifacts curl -o bad/artifacts/manifest.sh https://ci.linaro.org/job/tcwg_kernel-gnu-build-gnu-master-aarch64-next-all… --fail curl -o good/artifacts/manifest.sh https://ci.linaro.org/job/tcwg_kernel-gnu-build-gnu-master-aarch64-next-all… --fail # Reproduce bad build (cd bad; ../jenkins-scripts/tcwg_kernel-build.sh ^^ true %%rr[top_artifacts] artifacts) # Reproduce good build (cd good; ../jenkins-scripts/tcwg_kernel-build.sh ^^ true %%rr[top_artifacts] artifacts) </cut> Full commit (up to 1000 lines): <cut> commit 25413fdb2ac24933214123e24ba165026452a6f2 Author: Andre Vieira <andre.simoesdiasvieira(a)arm.com> Date: Tue Oct 11 10:49:27 2022 +0100 vect: Teach vectorizer how to handle bitfield accesses gcc/ChangeLog: * tree-if-conv.cc (if_convertible_loop_p_1): Move ordering of loop bb's from here... (tree_if_conversion): ... to here. Also call bitfield lowering when appropriate. (version_loop_for_if_conversion): Adapt to enable loop versioning when we only need to lower bitfields. (ifcvt_split_critical_edges): Relax condition of expected loop form as this is checked earlier. (get_bitfield_rep): New function. (lower_bitfield): Likewise. (bitfields_to_lower_p): Likewise. (need_to_lower_bitfields): New global boolean. (need_to_ifcvt): Likewise. * tree-vect-data-refs.cc (vect_find_stmt_data_reference): Improve diagnostic message. * tree-vect-patterns.cc (vect_recog_temp_ssa_var): Add default value for last parameter. (vect_recog_bitfield_ref_pattern): New. (vect_recog_bit_insert_pattern): New. gcc/testsuite/ChangeLog: * gcc.dg/vect/vect-bitfield-read-1.c: New test. * gcc.dg/vect/vect-bitfield-read-2.c: New test. * gcc.dg/vect/vect-bitfield-read-3.c: New test. * gcc.dg/vect/vect-bitfield-read-4.c: New test. * gcc.dg/vect/vect-bitfield-read-5.c: New test. * gcc.dg/vect/vect-bitfield-read-6.c: New test. * gcc.dg/vect/vect-bitfield-write-1.c: New test. * gcc.dg/vect/vect-bitfield-write-2.c: New test. * gcc.dg/vect/vect-bitfield-write-3.c: New test. * gcc.dg/vect/vect-bitfield-write-4.c: New test. * gcc.dg/vect/vect-bitfield-write-5.c: New test. --- gcc/testsuite/gcc.dg/vect/vect-bitfield-read-1.c | 40 +++ gcc/testsuite/gcc.dg/vect/vect-bitfield-read-2.c | 43 +++ gcc/testsuite/gcc.dg/vect/vect-bitfield-read-3.c | 44 +++ gcc/testsuite/gcc.dg/vect/vect-bitfield-read-4.c | 45 +++ gcc/testsuite/gcc.dg/vect/vect-bitfield-read-5.c | 42 +++ gcc/testsuite/gcc.dg/vect/vect-bitfield-read-6.c | 42 +++ gcc/testsuite/gcc.dg/vect/vect-bitfield-write-1.c | 39 +++ gcc/testsuite/gcc.dg/vect/vect-bitfield-write-2.c | 42 +++ gcc/testsuite/gcc.dg/vect/vect-bitfield-write-3.c | 43 +++ gcc/testsuite/gcc.dg/vect/vect-bitfield-write-4.c | 42 +++ gcc/testsuite/gcc.dg/vect/vect-bitfield-write-5.c | 42 +++ gcc/tree-if-conv.cc | 313 ++++++++++++++++++-- gcc/tree-vect-data-refs.cc | 3 +- gcc/tree-vect-patterns.cc | 330 +++++++++++++++++++++- 14 files changed, 1079 insertions(+), 31 deletions(-) diff --git a/gcc/testsuite/gcc.dg/vect/vect-bitfield-read-1.c b/gcc/testsuite/gcc.dg/vect/vect-bitfield-read-1.c new file mode 100644 index 00000000000..01cf34fb444 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/vect-bitfield-read-1.c @@ -0,0 +1,40 @@ +/* { dg-require-effective-target vect_int } */ + +#include <stdarg.h> +#include "tree-vect.h" + +extern void abort(void); + +struct s { int i : 31; }; + +#define ELT0 {0} +#define ELT1 {1} +#define ELT2 {2} +#define ELT3 {3} +#define N 32 +#define RES 48 +struct s A[N] + = { ELT0, ELT1, ELT2, ELT3, ELT0, ELT1, ELT2, ELT3, + ELT0, ELT1, ELT2, ELT3, ELT0, ELT1, ELT2, ELT3, + ELT0, ELT1, ELT2, ELT3, ELT0, ELT1, ELT2, ELT3, + ELT0, ELT1, ELT2, ELT3, ELT0, ELT1, ELT2, ELT3}; + +int __attribute__ ((noipa)) +f(struct s *ptr, unsigned n) { + int res = 0; + for (int i = 0; i < n; ++i) + res += ptr[i].i; + return res; +} + +int main (void) +{ + check_vect (); + + if (f(&A[0], N) != RES) + abort (); + + return 0; +} + +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/vect-bitfield-read-2.c b/gcc/testsuite/gcc.dg/vect/vect-bitfield-read-2.c new file mode 100644 index 00000000000..1a4a1579c14 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/vect-bitfield-read-2.c @@ -0,0 +1,43 @@ +/* { dg-require-effective-target vect_int } */ + +#include <stdarg.h> +#include "tree-vect.h" + +extern void abort(void); + +struct s { + unsigned i : 31; + char a : 4; +}; + +#define N 32 +#define ELT0 {0x7FFFFFFFUL, 0} +#define ELT1 {0x7FFFFFFFUL, 1} +#define ELT2 {0x7FFFFFFFUL, 2} +#define ELT3 {0x7FFFFFFFUL, 3} +#define RES 48 +struct s A[N] + = { ELT0, ELT1, ELT2, ELT3, ELT0, ELT1, ELT2, ELT3, + ELT0, ELT1, ELT2, ELT3, ELT0, ELT1, ELT2, ELT3, + ELT0, ELT1, ELT2, ELT3, ELT0, ELT1, ELT2, ELT3, + ELT0, ELT1, ELT2, ELT3, ELT0, ELT1, ELT2, ELT3}; + +int __attribute__ ((noipa)) +f(struct s *ptr, unsigned n) { + int res = 0; + for (int i = 0; i < n; ++i) + res += ptr[i].a; + return res; +} + +int main (void) +{ + check_vect (); + + if (f(&A[0], N) != RES) + abort (); + + return 0; +} + +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/vect-bitfield-read-3.c b/gcc/testsuite/gcc.dg/vect/vect-bitfield-read-3.c new file mode 100644 index 00000000000..849f4a017e1 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/vect-bitfield-read-3.c @@ -0,0 +1,44 @@ +/* { dg-require-effective-target vect_int } */ + +#include <stdarg.h> +#include "tree-vect.h" +#include <stdbool.h> + +extern void abort(void); + +typedef struct { + int c; + int b; + bool a : 1; + int d : 31; +} struct_t; + +#define N 16 +#define ELT_F { 0xFFFFFFFF, 0xFFFFFFFF, 0, 0x7FFFFFFF } +#define ELT_T { 0xFFFFFFFF, 0xFFFFFFFF, 1, 0x7FFFFFFF } + +struct_t vect_false[N] = { ELT_F, ELT_F, ELT_F, ELT_F, ELT_F, ELT_F, ELT_F, ELT_F, + ELT_F, ELT_F, ELT_F, ELT_F, ELT_F, ELT_F, ELT_F, ELT_F }; +struct_t vect_true[N] = { ELT_F, ELT_F, ELT_T, ELT_F, ELT_F, ELT_F, ELT_F, ELT_F, + ELT_F, ELT_F, ELT_T, ELT_F, ELT_F, ELT_F, ELT_F, ELT_F }; +int main (void) +{ + unsigned ret = 0; + for (unsigned i = 0; i < N; i++) + { + ret |= vect_false[i].a; + } + if (ret) + abort (); + + for (unsigned i = 0; i < N; i++) + { + ret |= vect_true[i].a; + } + if (!ret) + abort (); + + return 0; +} + +/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/vect-bitfield-read-4.c b/gcc/testsuite/gcc.dg/vect/vect-bitfield-read-4.c new file mode 100644 index 00000000000..5bc9c412e96 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/vect-bitfield-read-4.c @@ -0,0 +1,45 @@ +/* { dg-require-effective-target vect_int } */ + +#include <stdarg.h> +#include "tree-vect.h" + +extern void abort(void); + +struct s { + unsigned i : 31; + char x : 2; + char a : 4; +}; + +#define N 32 +#define ELT0 {0x7FFFFFFFUL, 3, 0} +#define ELT1 {0x7FFFFFFFUL, 3, 1} +#define ELT2 {0x7FFFFFFFUL, 3, 2} +#define ELT3 {0x7FFFFFFFUL, 3, 3} +#define RES 48 +struct s A[N] + = { ELT0, ELT1, ELT2, ELT3, ELT0, ELT1, ELT2, ELT3, + ELT0, ELT1, ELT2, ELT3, ELT0, ELT1, ELT2, ELT3, + ELT0, ELT1, ELT2, ELT3, ELT0, ELT1, ELT2, ELT3, + ELT0, ELT1, ELT2, ELT3, ELT0, ELT1, ELT2, ELT3}; + +int __attribute__ ((noipa)) +f(struct s *ptr, unsigned n) { + int res = 0; + for (int i = 0; i < n; ++i) + res += ptr[i].a; + return res; +} + +int main (void) +{ + check_vect (); + + if (f(&A[0], N) != RES) + abort (); + + return 0; +} + +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ + diff --git a/gcc/testsuite/gcc.dg/vect/vect-bitfield-read-5.c b/gcc/testsuite/gcc.dg/vect/vect-bitfield-read-5.c new file mode 100644 index 00000000000..1dc24d3eded --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/vect-bitfield-read-5.c @@ -0,0 +1,42 @@ +/* { dg-require-effective-target vect_int } */ + +#include <stdarg.h> +#include "tree-vect.h" + +extern void abort(void); + +struct s { + unsigned a : 23; unsigned b : 9; +}; + +#define N 32 +#define ELT0 {0x7FFFFFUL, 0} +#define ELT1 {0x7FFFFFUL, 1} +#define ELT2 {0x7FFFFFUL, 2} +#define ELT3 {0x7FFFFFUL, 3} +#define RES 48 +struct s A[N] + = { ELT0, ELT1, ELT2, ELT3, ELT0, ELT1, ELT2, ELT3, + ELT0, ELT1, ELT2, ELT3, ELT0, ELT1, ELT2, ELT3, + ELT0, ELT1, ELT2, ELT3, ELT0, ELT1, ELT2, ELT3, + ELT0, ELT1, ELT2, ELT3, ELT0, ELT1, ELT2, ELT3}; + +int __attribute__ ((noipa)) +f(struct s *ptr, unsigned n) { + int res = 0; + for (int i = 0; i < n; ++i) + res += ptr[i].b; + return res; +} + +int main (void) +{ + check_vect (); + + if (f(&A[0], N) != RES) + abort (); + + return 0; +} + +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/vect-bitfield-read-6.c b/gcc/testsuite/gcc.dg/vect/vect-bitfield-read-6.c new file mode 100644 index 00000000000..7d24c299758 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/vect-bitfield-read-6.c @@ -0,0 +1,42 @@ +/* { dg-require-effective-target vect_int } */ + +#include <stdarg.h> +#include "tree-vect.h" + +extern void abort(void); + +struct s { + unsigned a : 23; unsigned b : 8; +}; + +#define N 32 +#define ELT0 {0x7FFFFFUL, 0} +#define ELT1 {0x7FFFFFUL, 1} +#define ELT2 {0x7FFFFFUL, 2} +#define ELT3 {0x7FFFFFUL, 3} +#define RES 48 +struct s A[N] + = { ELT0, ELT1, ELT2, ELT3, ELT0, ELT1, ELT2, ELT3, + ELT0, ELT1, ELT2, ELT3, ELT0, ELT1, ELT2, ELT3, + ELT0, ELT1, ELT2, ELT3, ELT0, ELT1, ELT2, ELT3, + ELT0, ELT1, ELT2, ELT3, ELT0, ELT1, ELT2, ELT3}; + +int __attribute__ ((noipa)) +f(struct s *ptr, unsigned n) { + int res = 0; + for (int i = 0; i < n; ++i) + res += ptr[i].b; + return res; +} + +int main (void) +{ + check_vect (); + + if (f(&A[0], N) != RES) + abort (); + + return 0; +} + +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/vect-bitfield-write-1.c b/gcc/testsuite/gcc.dg/vect/vect-bitfield-write-1.c new file mode 100644 index 00000000000..19683d277b1 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/vect-bitfield-write-1.c @@ -0,0 +1,39 @@ +/* { dg-require-effective-target vect_int } */ + +#include <stdarg.h> +#include "tree-vect.h" + +extern void abort(void); + +struct s { int i : 31; }; + +#define N 32 +#define V 5 +struct s A[N]; + +void __attribute__ ((noipa)) +f(struct s *ptr, unsigned n) { + for (int i = 0; i < n; ++i) + ptr[i].i = V; +} + +void __attribute__ ((noipa)) +check_f(struct s *ptr) { + for (unsigned i = 0; i < N; ++i) + if (ptr[i].i != V) + abort (); +} + +int main (void) +{ + check_vect (); + __builtin_memset (&A[0], 0, sizeof(struct s) * N); + + f(&A[0], N); + check_f (&A[0]); + + return 0; +} + +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ + diff --git a/gcc/testsuite/gcc.dg/vect/vect-bitfield-write-2.c b/gcc/testsuite/gcc.dg/vect/vect-bitfield-write-2.c new file mode 100644 index 00000000000..d550dd35ab7 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/vect-bitfield-write-2.c @@ -0,0 +1,42 @@ +/* { dg-require-effective-target vect_int } */ + +#include <stdarg.h> +#include "tree-vect.h" + +extern void abort(void); + +struct s { + unsigned i : 31; + char a : 4; +}; + +#define N 32 +#define V 5 +struct s A[N]; + +void __attribute__ ((noipa)) +f(struct s *ptr, unsigned n) { + for (int i = 0; i < n; ++i) + ptr[i].a = V; +} + +void __attribute__ ((noipa)) +check_f(struct s *ptr) { + for (unsigned i = 0; i < N; ++i) + if (ptr[i].a != V) + abort (); +} + +int main (void) +{ + check_vect (); + __builtin_memset (&A[0], 0, sizeof(struct s) * N); + + f(&A[0], N); + check_f (&A[0]); + + return 0; +} + +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ + diff --git a/gcc/testsuite/gcc.dg/vect/vect-bitfield-write-3.c b/gcc/testsuite/gcc.dg/vect/vect-bitfield-write-3.c new file mode 100644 index 00000000000..3303d2610ff --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/vect-bitfield-write-3.c @@ -0,0 +1,43 @@ +/* { dg-require-effective-target vect_int } */ + +#include <stdarg.h> +#include "tree-vect.h" + +extern void abort(void); + +struct s { + unsigned i : 31; + char x : 2; + char a : 4; +}; + +#define N 32 +#define V 5 +struct s A[N]; + +void __attribute__ ((noipa)) +f(struct s *ptr, unsigned n) { + for (int i = 0; i < n; ++i) + ptr[i].a = V; +} + +void __attribute__ ((noipa)) +check_f(struct s *ptr) { + for (unsigned i = 0; i < N; ++i) + if (ptr[i].a != V) + abort (); +} + +int main (void) +{ + check_vect (); + __builtin_memset (&A[0], 0, sizeof(struct s) * N); + + f(&A[0], N); + check_f (&A[0]); + + return 0; +} + +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ + diff --git a/gcc/testsuite/gcc.dg/vect/vect-bitfield-write-4.c b/gcc/testsuite/gcc.dg/vect/vect-bitfield-write-4.c new file mode 100644 index 00000000000..fae6ea3557d --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/vect-bitfield-write-4.c @@ -0,0 +1,42 @@ +/* { dg-require-effective-target vect_int } */ + +#include <stdarg.h> +#include "tree-vect.h" + +extern void abort(void); + +struct s { + unsigned b : 23; + unsigned a : 9; +}; + +#define N 32 +#define V 5 +struct s A[N]; + +void __attribute__ ((noipa)) +f(struct s *ptr, unsigned n) { + for (int i = 0; i < n; ++i) + ptr[i].a = V; +} + +void __attribute__ ((noipa)) +check_f(struct s *ptr) { + for (unsigned i = 0; i < N; ++i) + if (ptr[i].a != V) + abort (); +} + +int main (void) +{ + check_vect (); + __builtin_memset (&A[0], 0, sizeof(struct s) * N); + + f(&A[0], N); + check_f (&A[0]); + + return 0; +} + +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ + diff --git a/gcc/testsuite/gcc.dg/vect/vect-bitfield-write-5.c b/gcc/testsuite/gcc.dg/vect/vect-bitfield-write-5.c new file mode 100644 index 00000000000..99360c2967b --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/vect-bitfield-write-5.c @@ -0,0 +1,42 @@ +/* { dg-require-effective-target vect_int } */ + +#include <stdarg.h> +#include "tree-vect.h" + +extern void abort(void); + +struct s { + unsigned b : 23; + unsigned a : 8; +}; + +#define N 32 +#define V 5 +struct s A[N]; + +void __attribute__ ((noipa)) +f(struct s *ptr, unsigned n) { + for (int i = 0; i < n; ++i) + ptr[i].a = V; +} + +void __attribute__ ((noipa)) +check_f(struct s *ptr) { + for (unsigned i = 0; i < N; ++i) + if (ptr[i].a != V) + abort (); +} + +int main (void) +{ + check_vect (); + __builtin_memset (&A[0], 0, sizeof(struct s) * N); + + f(&A[0], N); + check_f (&A[0]); + + return 0; +} + +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ + diff --git a/gcc/tree-if-conv.cc b/gcc/tree-if-conv.cc index bac29fb5574..e468a4659fa 100644 --- a/gcc/tree-if-conv.cc +++ b/gcc/tree-if-conv.cc @@ -91,6 +91,7 @@ along with GCC; see the file COPYING3. If not see #include "tree-pass.h" #include "ssa.h" #include "expmed.h" +#include "expr.h" #include "optabs-query.h" #include "gimple-pretty-print.h" #include "alias.h" @@ -123,6 +124,9 @@ along with GCC; see the file COPYING3. If not see #include "tree-vectorizer.h" #include "tree-eh.h" +/* For lang_hooks.types.type_for_mode. */ +#include "langhooks.h" + /* Only handle PHIs with no more arguments unless we are asked to by simd pragma. */ #define MAX_PHI_ARG_NUM \ @@ -145,6 +149,12 @@ static bool need_to_rewrite_undefined; before phi_convertible_by_degenerating_args. */ static bool any_complicated_phi; +/* True if we have bitfield accesses we can lower. */ +static bool need_to_lower_bitfields; + +/* True if there is any ifcvting to be done. */ +static bool need_to_ifcvt; + /* Hash for struct innermost_loop_behavior. It depends on the user to free the memory. */ @@ -1411,15 +1421,6 @@ if_convertible_loop_p_1 (class loop *loop, vec<data_reference_p> *refs) calculate_dominance_info (CDI_DOMINATORS); - /* Allow statements that can be handled during if-conversion. */ - ifc_bbs = get_loop_body_in_if_conv_order (loop); - if (!ifc_bbs) - { - if (dump_file && (dump_flags & TDF_DETAILS)) - fprintf (dump_file, "Irreducible loop\n"); - return false; - } - for (i = 0; i < loop->num_nodes; i++) { basic_block bb = ifc_bbs[i]; @@ -2899,18 +2900,22 @@ version_loop_for_if_conversion (class loop *loop, vec<gimple *> *preds) class loop *new_loop; gimple *g; gimple_stmt_iterator gsi; - unsigned int save_length; + unsigned int save_length = 0; g = gimple_build_call_internal (IFN_LOOP_VECTORIZED, 2, build_int_cst (integer_type_node, loop->num), integer_zero_node); gimple_call_set_lhs (g, cond); - /* Save BB->aux around loop_version as that uses the same field. */ - save_length = loop->inner ? loop->inner->num_nodes : loop->num_nodes; - void **saved_preds = XALLOCAVEC (void *, save_length); - for (unsigned i = 0; i < save_length; i++) - saved_preds[i] = ifc_bbs[i]->aux; + void **saved_preds = NULL; + if (any_complicated_phi || need_to_predicate) + { + /* Save BB->aux around loop_version as that uses the same field. */ + save_length = loop->inner ? loop->inner->num_nodes : loop->num_nodes; + saved_preds = XALLOCAVEC (void *, save_length); + for (unsigned i = 0; i < save_length; i++) + saved_preds[i] = ifc_bbs[i]->aux; + } initialize_original_copy_tables (); /* At this point we invalidate porfile confistency until IFN_LOOP_VECTORIZED @@ -2922,8 +2927,9 @@ version_loop_for_if_conversion (class loop *loop, vec<gimple *> *preds) profile_probability::always (), true); free_original_copy_tables (); - for (unsigned i = 0; i < save_length; i++) - ifc_bbs[i]->aux = saved_preds[i]; + if (any_complicated_phi || need_to_predicate) + for (unsigned i = 0; i < save_length; i++) + ifc_bbs[i]->aux = saved_preds[i]; if (new_loop == NULL) return NULL; @@ -2999,7 +3005,7 @@ ifcvt_split_critical_edges (class loop *loop, bool aggressive_if_conv) auto_vec<edge> critical_edges; /* Loop is not well formed. */ - if (num <= 2 || loop->inner || !single_exit (loop)) + if (loop->inner) return false; body = get_loop_body (loop); @@ -3260,6 +3266,201 @@ ifcvt_hoist_invariants (class loop *loop, edge pe) free (body); } +/* Returns the DECL_FIELD_BIT_OFFSET of the bitfield accesse in stmt iff its + type mode is not BLKmode. If BITPOS is not NULL it will hold the poly_int64 + value of the DECL_FIELD_BIT_OFFSET of the bitfield access and STRUCT_EXPR, + if not NULL, will hold the tree representing the base struct of this + bitfield. */ + +static tree +get_bitfield_rep (gassign *stmt, bool write, tree *bitpos, + tree *struct_expr) +{ + tree comp_ref = write ? gimple_assign_lhs (stmt) + : gimple_assign_rhs1 (stmt); + + tree field_decl = TREE_OPERAND (comp_ref, 1); + tree rep_decl = DECL_BIT_FIELD_REPRESENTATIVE (field_decl); + + /* Bail out if the representative is BLKmode as we will not be able to + vectorize this. */ + if (TYPE_MODE (TREE_TYPE (rep_decl)) == E_BLKmode) + return NULL_TREE; + + /* Bail out if the DECL_SIZE of the field_decl isn't the same as the BF's + precision. */ + unsigned HOST_WIDE_INT bf_prec + = TYPE_PRECISION (TREE_TYPE (gimple_assign_lhs (stmt))); + if (compare_tree_int (DECL_SIZE (field_decl), bf_prec) != 0) + return NULL_TREE; + + if (struct_expr) + *struct_expr = TREE_OPERAND (comp_ref, 0); + + if (bitpos) + *bitpos + = fold_build2 (MINUS_EXPR, bitsizetype, + DECL_FIELD_BIT_OFFSET (field_decl), + DECL_FIELD_BIT_OFFSET (rep_decl)); + + return rep_decl; + +} + +/* Lowers the bitfield described by DATA. + For a write like: + + struct.bf = _1; + + lower to: + + __ifc_1 = struct.<representative>; + __ifc_2 = BIT_INSERT_EXPR (__ifc_1, _1, bitpos); + struct.<representative> = __ifc_2; + + For a read: + + _1 = struct.bf; + + lower to: + + __ifc_1 = struct.<representative>; + _1 = BIT_FIELD_REF (__ifc_1, bitsize, bitpos); + + where representative is a legal load that contains the bitfield value, + bitsize is the size of the bitfield and bitpos the offset to the start of + the bitfield within the representative. */ + +static void +lower_bitfield (gassign *stmt, bool write) +{ + tree struct_expr; + tree bitpos; + tree rep_decl = get_bitfield_rep (stmt, write, &bitpos, &struct_expr); + tree rep_type = TREE_TYPE (rep_decl); + tree bf_type = TREE_TYPE (gimple_assign_lhs (stmt)); + + gimple_stmt_iterator gsi = gsi_for_stmt (stmt); + if (dump_file && (dump_flags & TDF_DETAILS)) + { + fprintf (dump_file, "Lowering:\n"); + print_gimple_stmt (dump_file, stmt, 0, TDF_SLIM); + fprintf (dump_file, "to:\n"); + } + + /* REP_COMP_REF is a COMPONENT_REF for the representative. NEW_VAL is it's + defining SSA_NAME. */ + tree rep_comp_ref = build3 (COMPONENT_REF, rep_type, struct_expr, rep_decl, + NULL_TREE); + tree new_val = ifc_temp_var (rep_type, rep_comp_ref, &gsi); + + if (dump_file && (dump_flags & TDF_DETAILS)) + print_gimple_stmt (dump_file, SSA_NAME_DEF_STMT (new_val), 0, TDF_SLIM); + + if (write) + { + new_val = ifc_temp_var (rep_type, + build3 (BIT_INSERT_EXPR, rep_type, new_val, + unshare_expr (gimple_assign_rhs1 (stmt)), + bitpos), &gsi); + + if (dump_file && (dump_flags & TDF_DETAILS)) + print_gimple_stmt (dump_file, SSA_NAME_DEF_STMT (new_val), 0, TDF_SLIM); + + gimple *new_stmt = gimple_build_assign (unshare_expr (rep_comp_ref), + new_val); + gimple_move_vops (new_stmt, stmt); + gsi_insert_before (&gsi, new_stmt, GSI_SAME_STMT); + + if (dump_file && (dump_flags & TDF_DETAILS)) + print_gimple_stmt (dump_file, new_stmt, 0, TDF_SLIM); + } + else + { + tree bfr = build3 (BIT_FIELD_REF, bf_type, new_val, + build_int_cst (bitsizetype, TYPE_PRECISION (bf_type)), + bitpos); + new_val = ifc_temp_var (bf_type, bfr, &gsi); + + gimple *new_stmt = gimple_build_assign (gimple_assign_lhs (stmt), + new_val); + gimple_move_vops (new_stmt, stmt); + gsi_insert_before (&gsi, new_stmt, GSI_SAME_STMT); + + if (dump_file && (dump_flags & TDF_DETAILS)) + print_gimple_stmt (dump_file, new_stmt, 0, TDF_SLIM); + } + + gsi_remove (&gsi, true); +} + +/* Return TRUE if there are bitfields to lower in this LOOP. Fill TO_LOWER + with data structures representing these bitfields. */ + +static bool +bitfields_to_lower_p (class loop *loop, + vec <gassign *> &reads_to_lower, + vec <gassign *> &writes_to_lower) +{ + gimple_stmt_iterator gsi; + + if (dump_file && (dump_flags & TDF_DETAILS)) + { + fprintf (dump_file, "Analyzing loop %d for bitfields:\n", loop->num); + } + + for (unsigned i = 0; i < loop->num_nodes; ++i) + { + basic_block bb = ifc_bbs[i]; + for (gsi = gsi_start_bb (bb); !gsi_end_p (gsi); gsi_next (&gsi)) + { + gassign *stmt = dyn_cast<gassign*> (gsi_stmt (gsi)); + if (!stmt) + continue; + + tree op = gimple_assign_lhs (stmt); + bool write = TREE_CODE (op) == COMPONENT_REF; + + if (!write) + op = gimple_assign_rhs1 (stmt); + + if (TREE_CODE (op) != COMPONENT_REF) + continue; + + if (DECL_BIT_FIELD_TYPE (TREE_OPERAND (op, 1))) + { + if (dump_file && (dump_flags & TDF_DETAILS)) + print_gimple_stmt (dump_file, stmt, 0, TDF_SLIM); + + if (!INTEGRAL_TYPE_P (TREE_TYPE (op))) + { + if (dump_file && (dump_flags & TDF_DETAILS)) + fprintf (dump_file, "\t Bitfield NO OK to lower," + " field type is not Integral.\n"); + return false; + } + + if (!get_bitfield_rep (stmt, write, NULL, NULL)) + { + if (dump_file && (dump_flags & TDF_DETAILS)) + fprintf (dump_file, "\t Bitfield NOT OK to lower," + " representative is BLKmode.\n"); + return false; + } + + if (dump_file && (dump_flags & TDF_DETAILS)) + fprintf (dump_file, "\tBitfield OK to lower.\n"); + if (write) + writes_to_lower.safe_push (stmt); + else + reads_to_lower.safe_push (stmt); + } + } + } + return !reads_to_lower.is_empty () || !writes_to_lower.is_empty (); +} + + /* If-convert LOOP when it is legal. For the moment this pass has no profitability analysis. Returns non-zero todo flags when something changed. */ @@ -3270,12 +3471,16 @@ tree_if_conversion (class loop *loop, vec<gimple *> *preds) unsigned int todo = 0; bool aggressive_if_conv; class loop *rloop; + auto_vec <gassign *, 4> reads_to_lower; + auto_vec <gassign *, 4> writes_to_lower; bitmap exit_bbs; edge pe; again: rloop = NULL; ifc_bbs = NULL; + need_to_lower_bitfields = false; + need_to_ifcvt = false; need_to_predicate = false; need_to_rewrite_undefined = false; any_complicated_phi = false; @@ -3291,16 +3496,42 @@ tree_if_conversion (class loop *loop, vec<gimple *> *preds) aggressive_if_conv = true; } - if (!ifcvt_split_critical_edges (loop, aggressive_if_conv)) + if (!single_exit (loop)) goto cleanup; - if (!if_convertible_loop_p (loop) - || !dbg_cnt (if_conversion_tree)) + /* If there are more than two BBs in the loop then there is at least one if + to convert. */ + if (loop->num_nodes > 2 + && !ifcvt_split_critical_edges (loop, aggressive_if_conv)) goto cleanup; - if ((need_to_predicate || any_complicated_phi) - && ((!flag_tree_loop_vectorize && !loop->force_vectorize) - || loop->dont_vectorize)) + ifc_bbs = get_loop_body_in_if_conv_order (loop); + if (!ifc_bbs) + { + if (dump_file && (dump_flags & TDF_DETAILS)) + fprintf (dump_file, "Irreducible loop\n"); + goto cleanup; + } + + if (loop->num_nodes > 2) + { + need_to_ifcvt = true; + + if (!if_convertible_loop_p (loop) || !dbg_cnt (if_conversion_tree)) + goto cleanup; + + if ((need_to_predicate || any_complicated_phi) + && ((!flag_tree_loop_vectorize && !loop->force_vectorize) + || loop->dont_vectorize)) + goto cleanup; + } + + if ((flag_tree_loop_vectorize || loop->force_vectorize) + && !loop->dont_vectorize) + need_to_lower_bitfields = bitfields_to_lower_p (loop, reads_to_lower, + writes_to_lower); + + if (!need_to_ifcvt && !need_to_lower_bitfields) goto cleanup; /* The edge to insert invariant stmts on. */ @@ -3311,7 +3542,8 @@ tree_if_conversion (class loop *loop, vec<gimple *> *preds) Either version this loop, or if the pattern is right for outer-loop vectorization, version the outer loop. In the latter case we will still if-convert the original inner loop. */ - if (need_to_predicate + if (need_to_lower_bitfields + || need_to_predicate || any_complicated_phi || flag_tree_loop_if_convert != 1) { @@ -3351,10 +3583,31 @@ tree_if_conversion (class loop *loop, vec<gimple *> *preds) pe = single_pred_edge (gimple_bb (preds->last ())); } - /* Now all statements are if-convertible. Combine all the basic - blocks into one huge basic block doing the if-conversion - on-the-fly. */ - combine_blocks (loop); + if (need_to_lower_bitfields) + { + if (dump_file && (dump_flags & TDF_DETAILS)) + { + fprintf (dump_file, "-------------------------\n"); + fprintf (dump_file, "Start lowering bitfields\n"); + } + while (!reads_to_lower.is_empty ()) + lower_bitfield (reads_to_lower.pop (), false); + while (!writes_to_lower.is_empty ()) + lower_bitfield (writes_to_lower.pop (), true); + + if (dump_file && (dump_flags & TDF_DETAILS)) + { + fprintf (dump_file, "Done lowering bitfields\n"); + fprintf (dump_file, "-------------------------\n"); + } + } + if (need_to_ifcvt) + { + /* Now all statements are if-convertible. Combine all the basic + blocks into one huge basic block doing the if-conversion + on-the-fly. */ + combine_blocks (loop); + } </cut>

2 years, 8 months

1
0
0 0

[ACTIVITY] Report for weeks #37, #39 and #40

by Thiago Jung Bauermann

Hello, I haven't sent a report since week #36. For that reason, this report covers three weeks. # [GNU-796] Stabilise GDB testsuite results in the CI - Implemented CI job to run fast GDB tests based on the list from Sourceware's builder. Submitted Gerrit change requests for jenkins-scripts and ci/job/configs. - Posted Gerrit change request for jenkins-scripts with an improvement to tcwg_gnu-build.sh to use a default path for the artifacts file if one isn't given on the command line. # [GNU-767] Support changing SVE vector length in remote debugging - Started incorporating suggestions from Luis' review of the patches. # Community participation - Reviewed mailing list patch “[PATCH v3] gdb/arm: Handle lazy FPU register stacking” - Attended GNU Tools Cauldron 2022. -- Thiago

2 years, 8 months

1
0
0 0

[ACTIVITY] week ending Oct. 9 2022

by Alex Bennée

Project Stratos =============== [UM-196] <https://linaro.atlassian.net/browse/UM-196> vhost-device maintainer effort ([UM-196]) - [review of vhost-sock for vhost-device] [review of vhost-sock for vhost-device] <https://github.com/rust-vmm/vhost-device/pull/216> QEMU Upstream Work ([UM-2]) =========================== - posted [PULL 00/54] testing, gdbstub, plugin and gitdm updates Message-Id: <20221004130138.2299307-1-alex.bennee(a)linaro.org> - took 3 attempts [PULL v3 00/52] testing, gdbstub, plugin and gitdm updates Message-Id: <20221006105556.3319342-1-alex.bennee(a)linaro.org> - leadership committee work - member engagement on CCA/RME [UM-2] <https://linaro.atlassian.net/browse/UM-2> Completed Reviews [3/3] ======================= [PATCH 00/20] Cross compilation changes for 7.2 Message-Id: <20220825222745.38779-13-pbonzini(a)redhat.com> [PATCH v7 00/18] tcg: CPUTLBEntryFull and TARGET_TB_PCREL Message-Id: <20221004141051.110653-4-richard.henderson(a)linaro.org> [PATCH v4 0/7] tcg: pc-relative translation blocks Message-Id: <20220906091126.298041-1-richard.henderson(a)linaro.org> Other ===== - reviews and appraisals Absences ======== Current Review Queue ==================== TODO [PATCH 00/24] accel/tcg: Rewrite user-only vma tracking Message-Id: <20221006031113.1139454-2-richard.henderson(a)linaro.org> =============================================================================================================================== TODO [PATCH for-7.2 00/21] accel/tcg: minimize tlb lookups during translate + user-only PROT_EXEC fixes Message-Id: <20220812180806.2128593-22-richard.henderson(a)linaro.org> =========================================================================================================================================================================== -- Alex Bennée

2 years, 8 months

1
0
0 0

[ACTIVITY] report week ending Oct 7

by Peter Maydell

Progress: * UM-2 [QEMU upstream maintainership] - miscellaneous upstream patch review * QEMU-471 [QEMU ARM v9.0 Baseline CPU for TCG] - sent out patchset implementing FEAT_GTG - sent out patch implementing FEAT_E0PD - code review of RTH's FEAT_HAFDBS patchset -- PMM

2 years, 8 months

1
0
0 0

[ACTIVITY] report week ending 30 Sep

by Peter Maydell

Progress: * UM-2 [QEMU upstream maintainership] - sent out patch which adds a retry-on-EINTR loop to KVM_CREATE_VM ioctls - wrote up the draft of the minutes for the QEMU Summit for review - more code review and pullrequest collation (notably the Arm v8R support patchset) * QEMU-471 [QEMU ARM v9.0 Baseline CPU for TCG] - read up on the remaining unimplemented features under this epic; closed out one we'd already implemented, and wrote up enough detail on the others to be happy with putting them all into the current sprint (they're all small features) - started looking at FEAT_GTG thanks -- PMM

2 years, 9 months

1
0
0 0

[ACTIVITY] week ending Sep. 25 2022

by Alex Bennée

Project Stratos =============== - held poll for next meeting - started planning for virtio-camera/sensor QEMU Upstream Work ([UM-2]) =========================== - posted [PULL for 7.1 0/3] memory leak and testing tweaks Message-Id: <CAFEAcA8oPjTq9quHxOCSczckwmmBSP0fY6dtCzwrNs59pMrNCw(a)mail.gmail.com> - sadly one patch had to be reverted as it exposed another race - posted [PATCH v1 00/10] plugins/next (disas, monitor, docs, execlog) Message-Id: <20220921160801.1490125-6-alex.bennee(a)linaro.org> - posted [PULL 00/30] testing updates (docker, avocado, deprecate 32bit BE MIPS) Message-Id: <20220920171533.1098094-4-alex.bennee(a)linaro.org> [UM-2] <https://linaro.atlassian.net/browse/UM-2> Update docs - mention -d plugin - document features of tests/plugin plugins - clean up command lines to drop builddir KVM Forum ========= - Attended KVM forum, gave a talk, helper with another Completed Reviews [3/3] ======================= [PATCH 00/62] target/arm: Implement FEAT_HAFDBS Message-Id: <20220703082419.770989-1-richard.henderson(a)linaro.org> [RFC PATCH v2] gdbstub: only send stop-reply packets when allowed to Message-Id: <ba99db564c3aeb1812bdfbc9116849092334482f.1661362557.git.quic_mathbern(a)quicinc.com> [RFC 0/4] Support interactions between TCG plugins Message-Id: <20220901182734.2987337-1-fasano(a)mit.edu> Absences ======== Current Review Queue ==================== TODO [PATCH v4 0/7] tcg: pc-relative translation blocks Message-Id: <20220906091126.298041-1-richard.henderson(a)linaro.org> ========================================================================================================================= TODO [PATCH 00/51] tests/qtest: Enable running qtest on Windows Message-Id: <20220824094029.1634519-1-bmeng.cn(a)gmail.com> ======================================================================================================================== TODO [PATCH v2 00/33] accel/tcg + target/arm: pc-relative translation Message-Id: <20220816203400.161187-1-richard.henderson(a)linaro.org> ======================================================================================================================================= -- Alex Bennée

2 years, 9 months

1
0
0 0

[ACTIVITY] report week ending 23 Sep

by Peter Maydell

Progress: * UM-2 [QEMU upstream maintainership] - attended KVM Forum - catching up with code review, email, etc... - sent out an Arm pullreq now 7.2 has opened up for development * QEMU-422 [QEMU Arm Neoverse V1 vCPU for TCG] - diagnosed a regression caused by the recent FEAT_PMUv3p5 changes and sent out a fix KVM Forum trip highlights: * it was good to be able to meet people face-to-face again after several years * Cloud use of Arm hardware has now got to the point where big cloud companies are working through performance issues and then coming to present about it; e.g. Google did a talk about perf issues during migration on an Ampere Altra setup. The solutions seem to be a mix of "apply the lessons and fixes we already went through with x86" and "architecture fixes coming down the pipe" (in this case FEAT_TLBIRANGE and FEAT_BBM). * lots of Google talks about pKVM (using hypervisor hardware on Android to improve security). In fact lots of Google all over -- apparently they've made a big push to do more upstream kernel work and as a result a large chunk of the kernel KVM commits come from them... * talk from Xilinx (now with AMD) about doing co-simulation of QEMU and RTL -- basically (with the aid of a lot of non-upstream stuff) having QEMU talk to a SystemC environment so you can have eg an emulated ethernet card in FPGA that plugs into a QEMU VM. This kind of thing is a use-case which historically upstream have not really been interested in addressing. * Which brings me to the BoF session on emulation, perhaps the most interesting bit of the conference for me. There was a lot of discussion about whether QEMU might move closer to what I call the "bag of lego bricks" paradigm, where it provides device models and users might be able to configure it at runtime to stitch them together, perhaps adding out-of-tree devices of their own. There is clearly interest in this (eg from attendees from Xilinx and Qualcomm); the sticking point is that from upstream's perspective this seems like "you should do this thing that will benefit us and not you". My take is that whether this goes anywhere will depend on whether those who would like this are prepared to coordinate together to present themselves as a group who are willing to dig in to the necessary upstream refactoring and cleanup that would be a precondition for having something like this be anywhere near supportable, i.e. that they're a group who will come and help rather than merely consume... * There was also a shorter discussion in the BoF about the idea of "heterogenous CPU emulation", eg one QEMU model with both Arm and Microblaze CPUs. This is not conceptually controversial, it's just a lot of work. It seemed like maybe a few folk now care enough to have a go at it. -- PMM

2 years, 9 months

1
0
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[ACTIVITY] Report for week #36

by Thiago Jung Bauermann

Hello, # [GNU-767] Support changing SVE vector length in remote debugging - Made a few last-minute adjustments to the code and fixed a couple of regressions on x86_64-linux. Re-ran regression tests on x86_64-linux and aarch64-linux. Wrote cover letter and descriptions for all the patches. - Finally posted the patch series upstream¹. # [GNU-796] Stabilize GDB testsuite results in the Linaro CI - Started working on this issue. Currently adding a new CI job to run the same small subset of GDB testcases that Sourceware's buildbot runs. This subset runs quickly and has stable results so the job will be a good canary to check that the CI infrastructure is working correctly. -- Thiago ¹https://inbox.sourceware.org/gdb-patches/20220908064151.3959930-1-thiago.b…

2 years, 9 months

1
0
0 0

[ACTIVITY] Report for week #35

by Thiago Jung Bauermann

Hello, # [GNU-767] Support changing SVE vector length in remote debugging - Cleaned up code for upstream submission, and divided it into patches. A couple of the patches affect other architectures and OSes, so made sure the code builds on as many combinations I can test, and now doing final regression testing on some of them. I'm hoping to finally send the patches upstream early next week. -- Thiago

2 years, 10 months

1
0
0 0

[ACTIVITY] Report for week #34

by Thiago Jung Bauermann

Hello, # [GNU-767] Support changing SVE vector length in remote debugging - Finished fixing regressions in my changes to gdbserver for debugging an inferior which changes the SVE length. - Started cleaning up code for upstream submission and dividing it into patches. # Community participation - Reviewed mailing list patches: - [PATCH,v3] [aarch64] Fix removal of non-address bits for PAuth - [PATCH 1/2] gdb: Fix deleted thread when issuing next command - [PATCH 2/2] gdb: Improve the resuming of the stepped thread -- Thiago

2 years, 10 months

1
0
0 0

[ACTIVITY] report week ending 25 Aug

by Peter Maydell

Progress (short week, 3 days): * UM-2 [QEMU upstream maintainership] - pretty much just tying up loose ends and doing other miscellaneous bits and pieces * QEMU-422 [QEMU Arm Neoverse V1 vCPU for TCG] - respin, resend of PMUv3p5 series -- PMM

2 years, 10 months

1
0
0 0

[ACTIVITY] Report for week #33

by Thiago Jung Bauermann

Hello, # [GNU-767] Support changing SVE vector length in remote debugging - v2 of the patches fixing a small SVE bug when debugging in native mode an inferior which changes the SVE length was committed upstream. - Continued working on fixing regressions in my changes to gdbserver for debugging an inferior which changes the SVE length. -- Thiago

2 years, 10 months

1
0
0 0

[ACTIVITY] week ending Aug. 21 2022

by Alex Bennée

Project Stratos =============== - continued working on [adding vhost-user-rng to crosvm] - this is to demo Stratos on Gunyah - re-built guest kernel with known working backend - it works :-) - initial review of Viresh's slides for KVM Forum talk [adding vhost-user-rng to crosvm] <https://github.com/stsquad/crosvm/tree/add-vhost-user-rng> vhost-device maintainer effort ([UM-196]) - prepared a clean-up [branch for new queue interface] - spent time testing and realised it had broken things [branch for new queue interface] <https://github.com/stsquad/vhost-device/tree/update-queue-interface> QEMU Upstream Work ([UM-2]) =========================== - posted [PULL for 7.1 0/3] memory leak and testing tweaks Message-Id: <CAFEAcA8oPjTq9quHxOCSczckwmmBSP0fY6dtCzwrNs59pMrNCw(a)mail.gmail.com> - sadly one patch had to be reverted as it exposed another race [UM-2] <https://linaro.atlassian.net/browse/UM-2> Completed Reviews [1/1] ======================= [PATCH 00/62] target/arm: Implement FEAT_HAFDBS Message-Id: <20220703082419.770989-1-richard.henderson(a)linaro.org> Absences ======== - will take a long w/e for August BH Current Review Queue ==================== TODO [PATCH v2 00/33] accel/tcg + target/arm: pc-relative translation Message-Id: <20220816203400.161187-1-richard.henderson(a)linaro.org> ======================================================================================================================================= TODO [PATCH for-7.2 00/21] accel/tcg: minimize tlb lookups during translate + user-only PROT_EXEC fixes Message-Id: <20220812180806.2128593-22-richard.henderson(a)linaro.org> =========================================================================================================================================================================== -- Alex Bennée

2 years, 10 months

1
0
0 0

[ACTIVITY] report week ending 19 Aug

by Peter Maydell

Progress: * UM-2 [QEMU upstream maintainership] - respin and resend for a few patchsets after code review * QEMU-422 [QEMU Arm Neoverse V1 vCPU for TCG] - identified what the old ARMv8.5-CMODX feature is now ("prefetch speculation protection") and confirmed that QEMU is already compliant with the instruction fetch ordering requirements so there's no coding work required here - Checked that we implement FEAT_ETS already and sent patches to advertise it in the ID registers - Checked that we already conform to the ordering rules required by "prefetch speculation protection" - Discovered that we accidentally fail to RAZ for a big chunk of the reserved-for-new-AArch32-ID-registers space for v8 CPUs; sent patches fixing that thanks -- PMM

2 years, 10 months

1
0
0 0

clang-arm64-windows-msvc is red for 12 days

by Galina Kistanova

Hello Linaro Toolchain Working Group, clang-arm64-windows-msvc is red for 12 days. The host is missing a correct version of msvc. Is somebody looking at this? Thanks Galina

2 years, 10 months

2
1
0 0

[ACTIVITY] report week ending 12 Aug

by Peter Maydell

Progress: * UM-2 [QEMU upstream maintainership] - usual release cycle work: rounded up a couple of last-minute fixes for "whoops, this crashes" bugs and some safe changes like docs typo fixes. * QEMU-422 [QEMU Arm Neoverse V1 vCPU for TCG] - Finished implementing the FEAT_PMUv3p5 work. In the process of testing it I found a handful of bugs in our existing PMU emulation code. Sent out the patchset which fixes those bugs and adds FEAT_PMUv3p5. - Cleaned up the epic to remove subtasks we aren't going to implement (FEAT_SPE, FEAT_TRF), and added one for "actually define the new CPU model" - FEAT_LSE2 is the only remaining real work here, and it is probably going to be seriously tricky...(i.e. I hope to leave it to RTH ;-)) -- PMM

2 years, 10 months

1
0
0 0

[ACTIVITY] week ending Aug. 14 2022

by Alex Bennée

Project Stratos =============== - continued working on [adding vhost-user-rng to crosvm] - this is to demo Stratos on Gunyah - backend comes up and device is detected but queues are not consumed - had some initial discussions with Viresh about talk structure for KVM Forum [adding vhost-user-rng to crosvm] <https://github.com/stsquad/crosvm/tree/add-vhost-user-rng> vhost-device maintainer effort ([UM-196]) - prepared a clean-up [branch for new queue interface] [UM-196] <https://linaro.atlassian.net/browse/UM-196> [branch for new queue interface] <https://github.com/stsquad/vhost-device/tree/update-queue-interface> QEMU Upstream Work ([UM-2]) =========================== - posted [PATCH for 7.1 v1 0/8] memory leaks and speed tweaks Message-Id: <20220811151413.3350684-8-alex.bennee(a)linaro.org> - will drop most of the speed tweaks until 7.2 opens [UM-2] <https://linaro.atlassian.net/browse/UM-2> Completed Reviews [1/1] ======================= [PATCH 00/62] target/arm: Implement FEAT_HAFDBS Message-Id: <20220703082419.770989-1-richard.henderson(a)linaro.org> Absences ======== - 2 day week next week - will take a long w/e for August BH -- Alex Bennée

2 years, 10 months

1
0
0 0

[ACTIVITY] week ending Aug. 7 2022

by Alex Bennée

Project Stratos =============== - worked on [adding vhost-user-rng to crosvm] - this is to demo Stratos on Gunyah [adding vhost-user-rng to crosvm] <https://github.com/stsquad/crosvm/tree/add-vhost-user-rng> vhost-device maintainer effort ([UM-196]) - posted [error message cleanup series] [UM-196] <https://linaro.atlassian.net/browse/UM-196> [error message cleanup series] <https://github.com/rust-vmm/vhost/pull/113> Linux RPMB Sub-system and virtio-driver ([STR-40]) - posted [PATCH v4 for 7.2 00/22] virtio-gpio and various virtio cleanups Message-Id: <20220802095010.3330793-1-alex.bennee(a)linaro.org> [STR-40] <https://linaro.atlassian.net/browse/STR-40> QEMU Upstream Work ([UM-2]) =========================== - posted [RFC PATCH] util: add a qemu_backtrace utility function Message-Id: <20220801141209.2184305-1-alex.bennee(a)linaro.org> - posted [PATCH v2] linux-user: un-parent OBJECT(cpu) when closing thread Message-Id: <20220803130537.763666-1-alex.bennee(a)linaro.org> - posted [RFC PATCH] cputlb and ssi: cache class to avoid expensive object_dynamic_cast_assert (HACK!!!) Message-Id: <20220804092044.2101093-1-alex.bennee(a)linaro.org> [UM-2] <https://linaro.atlassian.net/browse/UM-2> Completed Reviews [4/4] ======================= [PATCH] tests/tcg/i386: Use explicit suffix on fist insns Message-Id: <20220527171143.168276-1-richard.henderson(a)linaro.org> [PATCH 00/43] semihosting cleanup Message-Id: <20220430132932.324018-1-richard.henderson(a)linaro.org> [PATCH 0/2] gdbstub: don't crash if no gdb attached and gdb syscall attempted Message-Id: <20220526190053.521505-1-peter.maydell(a)linaro.org> [PATCH 0/2] Floating-point OE/UE exception bug Message-Id: <87pmhemzh9.fsf(a)linaro.org> Absences ======== Current Review Queue ==================== TODO [PATCH RFC v2 0/2] arm: enable MTE for QEMU + kvm Message-Id: <20220707161656.41664-1-cohuck(a)redhat.com> ============================================================================================================ TODO [PATCH v4 0/9] Record/replay refactoring and stuff Message-Id: <165364836050.688121.11980415709895333098.stgit@pasha-ThinkPad-X280> ======================================================================================================================================= TODO [PATCH v11 0/2] hw/arm/virt: CXL 2.0 emulation support Message-Id: <20220520163732.27545-3-Jonathan.Cameron(a)huawei.com> =========================================================================================================================== -- Alex Bennée

2 years, 10 months

1
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[ACTIVITY] Report for weeks #30 and #31

by Thiago Jung Bauermann

Hello, I noticed that I didn't send a report for week #30. Sorry about that. For that reason, this report covers two weeks. # [GNU-767] Support changing SVE vector length in remote debugging - Prepared and submitted upstream a fix and a testcase for a small SVE bug when debugging in native mode an inferior which changes the SVE length. Luis reviewed it and I submitted v2 addressing his comments. # Misc - Was out for 2 days. -- Thiago

2 years, 10 months

1
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[ACTIVITY] report week ending 5 Aug

by Peter Maydell

Progress: * UM-2 [QEMU upstream maintainership] - more investigation, triage and fixing of minor bugs in run-up to release * QEMU-422 [QEMU Arm Neoverse V1 vCPU for TCG] - starting working on the PMUv8p5 enhancements. These consist of a couple of new cycle-counter-disable bits (easy) and extension of the event counters to 64 bits (more tricky). So far I have code for the easy part and have made a start on the hard part... -- PMM

2 years, 10 months

1
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[ACTIVITY] report week ending 29 Jul

by Peter Maydell

Progress: * UM-2 [QEMU upstream maintainership] - debugged and sent patch to fix a bug in timer_create syscall support in linux-user on certain host libcs - tried and failed to repro a bug where semihosting SYS_HEAPINFO was returning addresses in the flash rom - more Coverity issue triage -- now have finished triage of everything that isn't either in the test suite or an "insecure data handling" issue. Sent patches for a few issues, prodded other people about some more... -- PMM

2 years, 11 months

1
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[ACTIVITY] Report for week #29

by Thiago Jung Bauermann

Hello, # [GNU-767] Support changing SVE vector length in remote debugging * Fixed last bug which prevented the sve-ioctls QEMU testcase to be correctly stepped through in gdbserver. The next step is checking whether any regression was introduced by my changes, and clean up the code. * In the process, spotted small bug in GDB when stepping through the sve-ioctls QEMU testcase using the existing native support. Started preparing a patch to submit upstream. # [LLVM-769] Linaro CI * Increased tcwg-fx-02 ccache max size to 40 GB. * Learned a bit about Zorg and started adding “depends_on_projects” field to builders running on Linaro workers. -- Thiago

2 years, 11 months

1
0
0 0

Enabling CCache on LLVM bots

by Mehdi AMINI

Hi, I noticed that bots like flang-aarch64-latest-gcc are quite slow and could benefit from enabling ccache. Could you make it available on the system so it could be turned on for all these builds? Thanks, -- Mehdi

2 years, 11 months

4
14
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[ACTIVITY] report week ending 21 Jul

by Peter Maydell

Progress: * UM-2 [QEMU upstream maintainership] - softfreeze this week; lots of pullrequest merging - spent some time going through our backlog of Coverity Scan issues, triaging them and sending patches for some of them - sent a patchset fixing portability issues in our configure script which had crept in recently and were causing problems on OpenBSD and NetBSD - sent out the invite emails for QEMU Summit -- PMM

2 years, 11 months

1
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[ACTIVITY] Report for week #28

by Thiago Jung Bauermann

Hello, # [GNU-767] Support changing SVE vector length in remote debugging * Rebased the actual SVE vector length changes on top of the stabilised per-thread target descriptions changes. Now stabilising the result. Fixed a couple of problems found when remote-debugging QEMU's sve-ioctls test binary, currently looking into a third one. # Linaro CI's GDB testsuite results * Updated and expanded the LLVM Docker Buildbot Maintenance wiki page with the information about ccache setup I gathered in the past few days. Also added a link to it to the Buildkite Bot Maintenance wiki page since libstdc++ buildkites uses the same configuration. * Increased ccache max size in GNU build jobs on tcwg-jade-02. * Updated ABE repo's tested branch with my commits from last week to improve the GDB testsuite results. Confirmed that the GDB testsuite went from 538 unexpected failures to 307. There's still room for improvement though. -- Thiago

2 years, 11 months

1
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[ACTIVITY] report week ending 15 Jul

by Peter Maydell

Progress: * UM-2 [QEMU upstream maintainership] - took over pullreq handling from RTH for the next couple of weeks - wrote and sent patches that fix a mishandling of Secure stage 2 translation caused by QEMU not noticing that some config bits are in VTCR_EL2 and some in VSTCR_EL2. Removed an ancient microoptimization that was getting in the way of fixing that. - sent patch fixing incorrect syndrome value for data abort on some post-indexed load/store insns - RTH's SME patchset is now upstream, so now would be a good time to test it if anybody has compiler test cases or similar they were thinking of running under QEMU - softfreeze next Tuesday: started reviewing and collecting up minor patches for a pre-freeze pullreq -- PMM

2 years, 11 months

1
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0 0

Status of ccache setup on LLVM build bots

by Thiago Jung Bauermann

Hello, I went through the LLVM build bots (and also the libc++ buildkites) and increased their ccache max size. There was a big impact on the flang builds on tcwg-jade-01 (which went from 1h–2h to 10min–30min), but not on other builds. One reason is probably that since I made this change earlier today, there wasn't time yet to finish enough several-hours-long builds to warm up the caches. Since different machines have different disk sizes and free space I chose different ccache max sizes for them, as follows: * tcwg-fx-02 hosts the following build bots: - clang-aarch64-sve-vls-2stage - clang-aarch64-sve-vls - clang-aarch64-sve-vla-2stage - clang-aarch64-sve-vla All share the same ccache. I changed its max size to 20 GB. It's not a lot, but this machine is also used as a dev box so I though it would be good to preserve a fair amount of space. * tcwg-jade-01 hosts the following build bots: - clang-armv8-lld-2stage - clang-armv7-vfpv3-2stage - clang-armv7-global-isel - clang-armv7-quick - clang-armv7-2stage - clang-armv7-lnt - flang-aarch64-latest-gcc - flang-aarch64-rel-assert - flang-aarch64-release - flang-aarch64-latest-clang - flang-aarch64-debug - flang-aarch64-out-of-tree - flang-aarch64-sharedlibs - flang-aarch64-dylib - clang-aarch64-full-2stage - clang-aarch64-global-isel - clang-aarch64-lld-2stage - clang-aarch64-quick All armv7 and armv8 bots share one ccache, and all aarch64 bots share another. I changed the max size of each one to 100 GB. * tcwg-jade-04 hosts the following build bots: - lldb-aarch64-ubuntu - lldb-arm-ubuntu - buildkite-linaro-armv8-libcxx-01 - buildkite-linaro-armv8-libcxx-02 - buildkite-linaro-armv8-libcxx-03 - buildkite-linaro-armv8-libcxx-04 The buildkite bots share a 50 GB ccache, while lldb-arm-ubuntu uses another 50 GB ccache due to being based on a different distro version. And lldb-aarch64-ubuntu also uses its own 50 GB ccache. * tcwg-llvmbot_tk1-01.tcwglab hosts the following build bot: - silent-linaro-tk1-01 I changed the max cache size to 10 GB. There's not a lot of free space on the machine. * tcwg-llvmbot_tk1-03.tcwglab hosts the following build bot: - normal-linaro-tk1-02 I changed the max cache size to 20 GB. * tcwg-llvmbot_tk1-05.tcwglab hosts the following build bot: - silent-linaro-tk1-08 I changed the max cache size to 10 GB. * The following tcwg-llvmbot_tk1-* machines are currently unreachable so I couldn't examine them: - tcwg-llvmbot_tk1-02.tcwglab - tcwg-llvmbot_tk1-04.tcwglab * The following tcwg-llvmbot_tk1-* machines are running an llvmbot container but no builder container, so I didn't change their ccache configuration: - tcwg-llvmbot_tk1-06.tcwglab - tcwg-llvmbot_tk1-07.tcwglab - tcwg-llvmbot_tk1-08.tcwglab - tcwg-llvmbot_tk1-09.tcwglab * tcwg-jade-02 is a GNU builder, and from peeking into a few containers running build jobs I have the impression that it doesn't use ccache. Should I look into it? * Going through our ssh config file I didn't find these build bots that are listed at http://llvm.validation.linaro.org/ so I didn't check their ccache usage: - clang-arm64-windows-msvc-2stage - clang-arm64-windows-msvc - clang-arm64-windows-msvc-2stage - clang-arm64-windows-msvc - clang-native-arm-lnt-perf - clang-armv7-vfpv3-full-2stage - clang-thumbv7-full-2stage - libcxx aarch64 - libcxx aarch64 -fno-exceptions -- Thiago

2 years, 11 months

2
2
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[ACTIVITY] Report for week #27

by Thiago Jung Bauermann

Hello, # [GNU-767] Support changing SVE vector length in remote debugging * Analysed and fixed a couple more regressions in my branch. The change to per-thread target descriptions in gdbserver (which was the more challenging part) is now free of regressions. Now cleaning up the part that actually deals with the SVE vector length change. # Linaro CI's GDB testsuite results * Increased ccache's max size on most build bots. Sent email to the linaro-toolchain list summarising the current status of their ccache setup. * Started looking more closely into how ccache configuration is put together in our container scripts to document it on the wiki (together with the steps I took to change the ccache max size). -- Thiago

2 years, 11 months

1
0
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linaro-clang-armv8-lld-2stage has been red for a month

by Galina Kistanova

Hello Linaro Toolchain Working Group, linaro-clang-armv8-lld-2stage <https://lab.llvm.org/buildbot/#/workers/140> has been red since June 7th. Is anybody looking at the issue? Thanks Galina

2 years, 11 months

2
1
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[weekly][linaro] report week ending 7 Jul

by Peter Maydell

Progress: (short week, 3 days) * UM-2 [QEMU upstream maintainership] - More code review, as softfreeze is now quite close. I think we've finally got there with the SME patchset (the remaining problems with v5 were very minor) * QEMU-422 [QEMU Arm Neoverse V1 vCPU for TCG] - QEMU-315 OS Lock/DoubleLock work now upstream -- PMM

2 years, 11 months

1
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0 0

clang-armv7-vfpv3-full-2stage has been failing for more than 7 days and sends emails for each failed build

by Florian Hahn

Hi, It looks like https://lab.llvm.org/buildbot/#/builders/190 has been failing for the last week. It also sends out emails for each failed build, instead of for new failures only. The failure is below. It would be great if you could take a look and possibly adjust the configuration of the bot: [10/2380] Linking CXX shared library lib/clang/15.0.0/lib/linux/libclang_rt.scudo_standalone-armhf.so FAILED: lib/clang/15.0.0/lib/linux/libclang_rt.scudo_standalone-armhf.so : && /usr/local/bin/c++ -fPIC -fPIC -fvisibility-inlines-hidden -Werror=date-time -Werror=unguarded-availability-new -Wall -Wextra -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wmissing-field-initializers -pedantic -Wno-long-long -Wc++98-compat-extra-semi -Wimplicit-fallthrough -Wcovered-switch-default -Wno-noexcept-type -Wnon-virtual-dtor -Wdelete-non-virtual-dtor -Wsuggest-override -Wstring-conversion -Wmisleading-indentation -fdiagnostics-color -ffunction-sections -fdata-sections -Wall -std=c++14 -Wno-unused-parameter -O3 -DNDEBUG -Wl,-z,defs -Wl,-z,nodelete -Wl,-rpath-link,/home/tcwg-buildbot/worker/clang-armv7-vfpv3-full-2stage/stage1/./lib -march=armv7-a -mfloat-abi=hard -Wl,-z,defs,-z,now,-z,relro -ffunction-sections -fdata-sections -Wl,--gc-sections -nostdlib++ --unwindlib=none -pthread -shared -Wl,-soname,libclang_rt.scudo_standalone-armhf.so -o lib/clang/15.0.0/lib/linux/libclang_rt.scudo_standalone-armhf.so projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/common.cpp.o projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/crash_handler.cpp.o projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/platform_specific/common_posix.cpp.o projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/platform_specific/guarded_pool_allocator_posix.cpp.o projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/platform_specific/mutex_posix.cpp.o projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/platform_specific/utilities_posix.cpp.o projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/guarded_pool_allocator.cpp.o projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/stack_trace_compressor.cpp.o projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsanBacktraceLibc.armhf.dir/optional/backtrace_linux_libc.cpp.o projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsanSegvHandler.armhf.dir/optional/segv_handler_posix.cpp.o projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsanOptionsParser.armhf.dir/optional/options_parser.cpp.o projects/compiler-rt/lib/scudo/standalone/CMakeFiles/clang_rt.scudo_standalone-dynamic-armhf.dir/checksum.cpp.o projects/compiler-rt/lib/scudo/standalone/CMakeFiles/clang_rt.scudo_standalone-dynamic-armhf.dir/common.cpp.o projects/compiler-rt/lib/scudo/standalone/CMakeFiles/clang_rt.scudo_standalone-dynamic-armhf.dir/crc32_hw.cpp.o projects/compiler-rt/lib/scudo/standalone/CMakeFiles/clang_rt.scudo_standalone-dynamic-armhf.dir/flags_parser.cpp.o projects/compiler-rt/lib/scudo/standalone/CMakeFiles/clang_rt.scudo_standalone-dynamic-armhf.dir/flags.cpp.o projects/compiler-rt/lib/scudo/standalone/CMakeFiles/clang_rt.scudo_standalone-dynamic-armhf.dir/fuchsia.cpp.o projects/compiler-rt/lib/scudo/standalone/CMakeFiles/clang_rt.scudo_standalone-dynamic-armhf.dir/linux.cpp.o projects/compiler-rt/lib/scudo/standalone/CMakeFiles/clang_rt.scudo_standalone-dynamic-armhf.dir/release.cpp.o projects/compiler-rt/lib/scudo/standalone/CMakeFiles/clang_rt.scudo_standalone-dynamic-armhf.dir/report.cpp.o projects/compiler-rt/lib/scudo/standalone/CMakeFiles/clang_rt.scudo_standalone-dynamic-armhf.dir/string_utils.cpp.o projects/compiler-rt/lib/scudo/standalone/CMakeFiles/clang_rt.scudo_standalone-dynamic-armhf.dir/wrappers_c.cpp.o projects/compiler-rt/lib/scudo/standalone/CMakeFiles/clang_rt.scudo_standalone-dynamic-armhf.dir/wrappers_cpp.cpp.o -Wl,-rpath,"\$ORIGIN/../lib" && : /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/common.cpp.o:(.ARM.exidx.text._ZN8gwp_asan13ErrorToStringERKNS_5ErrorE+0x0): undefined reference to `__aeabi_unwind_cpp_pr0' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/common.cpp.o:(.ARM.exidx.text._ZN8gwp_asan18AllocationMetadata16RecordAllocationEjj+0x0): undefined reference to `__aeabi_unwind_cpp_pr1' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/common.cpp.o:(.ARM.exidx.text._ZN8gwp_asan18AllocationMetadata18RecordDeallocationEv+0x0): undefined reference to `__aeabi_unwind_cpp_pr1' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/common.cpp.o:(.ARM.exidx.text._ZN8gwp_asan18AllocationMetadata12CallSiteInfo15RecordBacktraceEPFjPjjE+0x0): undefined reference to `__aeabi_unwind_cpp_pr1' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/common.cpp.o:(.ARM.exidx.text._ZNK8gwp_asan14AllocatorState21maximumAllocationSizeEv+0x0): undefined reference to `__aeabi_unwind_cpp_pr0' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/common.cpp.o:(.ARM.exidx.text._ZNK8gwp_asan14AllocatorState10slotToAddrEj+0x0): undefined reference to `__aeabi_unwind_cpp_pr0' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/common.cpp.o:(.ARM.exidx.text._ZNK8gwp_asan14AllocatorState11isGuardPageEj+0x0): undefined reference to `__aeabi_unwind_cpp_pr0' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/common.cpp.o:(.ARM.exidx.text._ZNK8gwp_asan14AllocatorState14getNearestSlotEj+0x0): undefined reference to `__aeabi_unwind_cpp_pr1' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/crash_handler.cpp.o:(.ARM.exidx.text.__gwp_asan_error_is_mine+0x0): undefined reference to `__aeabi_unwind_cpp_pr0' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/crash_handler.cpp.o:(.ARM.exidx.text.__gwp_asan_get_internal_crash_address+0x0): undefined reference to `__aeabi_unwind_cpp_pr0' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/crash_handler.cpp.o:(.ARM.exidx.text.__gwp_asan_diagnose_error+0x0): undefined reference to `__aeabi_unwind_cpp_pr1' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/crash_handler.cpp.o:(.ARM.exidx.text.__gwp_asan_get_metadata+0x0): undefined reference to `__aeabi_unwind_cpp_pr1' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/crash_handler.cpp.o:(.ARM.exidx.text.__gwp_asan_get_allocation_address+0x0): undefined reference to `__aeabi_unwind_cpp_pr0' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/crash_handler.cpp.o:(.ARM.exidx.text.__gwp_asan_get_allocation_size+0x0): undefined reference to `__aeabi_unwind_cpp_pr0' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/crash_handler.cpp.o:(.ARM.exidx.text.__gwp_asan_get_allocation_thread_id+0x0): undefined reference to `__aeabi_unwind_cpp_pr0' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/crash_handler.cpp.o:(.ARM.exidx.text.__gwp_asan_get_allocation_trace+0x0): undefined reference to `__aeabi_unwind_cpp_pr1' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/crash_handler.cpp.o:(.ARM.exidx.text.__gwp_asan_is_deallocated+0x0): undefined reference to `__aeabi_unwind_cpp_pr0' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/crash_handler.cpp.o:(.ARM.exidx.text.__gwp_asan_get_deallocation_thread_id+0x0): undefined reference to `__aeabi_unwind_cpp_pr0' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/crash_handler.cpp.o:(.ARM.exidx.text.__gwp_asan_get_deallocation_trace+0x0): undefined reference to `__aeabi_unwind_cpp_pr1' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/platform_specific/common_posix.cpp.o:(.ARM.exidx.text._ZN8gwp_asan11getThreadIDEv+0x0): undefined reference to `__aeabi_unwind_cpp_pr0' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/platform_specific/guarded_pool_allocator_posix.cpp.o:(.ARM.exidx.text._ZN8gwp_asan20GuardedPoolAllocator8initPRNGEv+0x0): undefined reference to `__aeabi_unwind_cpp_pr1' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/platform_specific/guarded_pool_allocator_posix.cpp.o:(.ARM.exidx.text._ZNK8gwp_asan20GuardedPoolAllocator3mapEjPKc+0x0): undefined reference to `__aeabi_unwind_cpp_pr1' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/platform_specific/guarded_pool_allocator_posix.cpp.o:(.ARM.exidx.text._ZN8gwp_asan20GuardedPoolAllocator18reserveGuardedPoolEj+0x0): undefined reference to `__aeabi_unwind_cpp_pr1' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/platform_specific/guarded_pool_allocator_posix.cpp.o:(.ARM.exidx.text._ZNK8gwp_asan20GuardedPoolAllocator21allocateInGuardedPoolEPvj+0x0): undefined reference to `__aeabi_unwind_cpp_pr0' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/platform_specific/guarded_pool_allocator_posix.cpp.o:(.ARM.exidx.text._ZNK8gwp_asan20GuardedPoolAllocator23deallocateInGuardedPoolEPvj+0x0): undefined reference to `__aeabi_unwind_cpp_pr0' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/platform_specific/guarded_pool_allocator_posix.cpp.o:(.ARM.exidx.text._ZN8gwp_asan20GuardedPoolAllocator19getPlatformPageSizeEv+0x0): undefined reference to `__aeabi_unwind_cpp_pr0' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/platform_specific/guarded_pool_allocator_posix.cpp.o:(.ARM.exidx.text._ZN8gwp_asan20GuardedPoolAllocator13installAtForkEv+0x0): undefined reference to `__aeabi_unwind_cpp_pr0' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/platform_specific/guarded_pool_allocator_posix.cpp.o:(.ARM.exidx.text._ZZN8gwp_asan20GuardedPoolAllocator13installAtForkEvEN3$_08__invokeEv+0x0): undefined reference to `__aeabi_unwind_cpp_pr0' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/platform_specific/guarded_pool_allocator_posix.cpp.o:(.ARM.exidx.text._ZZN8gwp_asan20GuardedPoolAllocator13installAtForkEvEN3$_18__invokeEv+0x0): more undefined references to `__aeabi_unwind_cpp_pr0' follow /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/guarded_pool_allocator.cpp.o:(.ARM.exidx.text._ZN8gwp_asan20GuardedPoolAllocator7disableEv+0x0): undefined reference to `__aeabi_unwind_cpp_pr1' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/guarded_pool_allocator.cpp.o:(.ARM.exidx.text._ZN8gwp_asan20GuardedPoolAllocator6enableEv+0x0): undefined reference to `__aeabi_unwind_cpp_pr1' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/guarded_pool_allocator.cpp.o:(.ARM.exidx.text._ZN8gwp_asan20GuardedPoolAllocator7iterateEPvjPFvjjS1_ES1_+0x0): undefined reference to `__aeabi_unwind_cpp_pr0' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/guarded_pool_allocator.cpp.o:(.ARM.exidx.text._ZN8gwp_asan20GuardedPoolAllocator8allocateEjj+0x0): undefined reference to `__aeabi_unwind_cpp_pr0' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/guarded_pool_allocator.cpp.o:(.ARM.exidx.text._ZN8gwp_asan20GuardedPoolAllocator4stopEv+0x0): undefined reference to `__aeabi_unwind_cpp_pr0' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/guarded_pool_allocator.cpp.o:(.ARM.exidx.text._ZN8gwp_asan20GuardedPoolAllocator10deallocateEPv+0x0): undefined reference to `__aeabi_unwind_cpp_pr0' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/guarded_pool_allocator.cpp.o:(.ARM.exidx.text._ZN8gwp_asan20GuardedPoolAllocator7getSizeEPKv+0x0): undefined reference to `__aeabi_unwind_cpp_pr1' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/stack_trace_compressor.cpp.o:(.ARM.exidx.text._ZN8gwp_asan11compression4packEPKjjPhj+0x0): undefined reference to `__aeabi_unwind_cpp_pr1' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsan.armhf.dir/stack_trace_compressor.cpp.o:(.ARM.exidx.text._ZN8gwp_asan11compression6unpackEPKhjPjj+0x0): undefined reference to `__aeabi_unwind_cpp_pr0' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsanBacktraceLibc.armhf.dir/optional/backtrace_linux_libc.cpp.o:(.ARM.exidx.text._ZN8gwp_asan9backtrace20getBacktraceFunctionEv+0x0): undefined reference to `__aeabi_unwind_cpp_pr0' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsanBacktraceLibc.armhf.dir/optional/backtrace_linux_libc.cpp.o:(.ARM.exidx.text._ZN12_GLOBAL__N_19BacktraceEPjj+0x0): undefined reference to `__aeabi_unwind_cpp_pr0' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsanBacktraceLibc.armhf.dir/optional/backtrace_linux_libc.cpp.o:(.ARM.exidx.text._ZN8gwp_asan9backtrace25getPrintBacktraceFunctionEv+0x0): undefined reference to `__aeabi_unwind_cpp_pr0' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsanBacktraceLibc.armhf.dir/optional/backtrace_linux_libc.cpp.o:(.ARM.exidx.text._ZN12_GLOBAL__N_114PrintBacktraceEPjjPFvPKczE+0x0): undefined reference to `__aeabi_unwind_cpp_pr0' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsanBacktraceLibc.armhf.dir/optional/backtrace_linux_libc.cpp.o:(.ARM.exidx.text._ZN8gwp_asan9backtrace24getSegvBacktraceFunctionEv+0x0): more undefined references to `__aeabi_unwind_cpp_pr0' follow /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsanSegvHandler.armhf.dir/optional/segv_handler_posix.cpp.o:(.ARM.exidx.text._ZN8gwp_asan12segv_handler21installSignalHandlersEPNS_20GuardedPoolAllocatorEPFvPKczEPFvPjjS6_EPFjS7_jPvE+0x0): undefined reference to `__aeabi_unwind_cpp_pr1' /usr/bin/ld: projects/compiler-rt/lib/gwp_asan/CMakeFiles/RTGwpAsanSegvHandler.armhf.dir/optional/segv_handler_posix.cpp.o:(.ARM.exidx.text._ZN12_GLOBAL__N_114sigSegvHandlerEiP9siginfo_tPv+0x0): undefined reference to `__aeabi_unwind_cpp_pr0' clang-13: error: linker command failed with exit code 1 (use -v to see invocation) [11/2380] Linking CXX static library lib/libLLVMObject.a Cheers, Florian

2 years, 12 months

2
3
0 0

[ACTIVITY] Report for week #26

by Thiago Jung Bauermann

Hello, # Linaro CI's GDB testsuite results * Implemented new version of change in the Abe shell script to correctly set auto-load-safe-path so that GDB can load libthread_db.so.1. Since GDB's configure script needs to be passed an argument containing literal dollar signs, use '@@' instead of '$' to avoid the shell misinterpreting it and substitute at the point of use. This version worked and was merged to the Abe repo. * Implemented and merged change in the Abe shell script to set variables pointing to language-specific target tools only if they are present in the path. This fixes Ada test failures in the GDB testsuite. * Implemented and merged improvement to our tcwg_gnu-build.sh script to allow specifying on the command line the Abe repo and branch to use. # [GNU-767] Support changing SVE vector length in remote debugging * Analysed and fixed a couple more regressions in my branch. -- Thiago

2 years, 12 months

1
0
0 0

[ACTIVITY] report week ending 1 Jul

by Peter Maydell

Progress: * UM-2 [QEMU upstream maintainership] - Code review (misc, plus another round on the SME patchset) - KVM Forum programme committee work * QEMU-422 [QEMU Arm Neoverse V1 vCPU for TCG] - Wrote and sent patches that deal with the last of the "small and uninteresting" dependencies of the V1 support epic (this one covers Feat_DoubleLock, which lets guest OSes suppress debug events as part of their power-down-a-CPU sequence) -- PMM

2 years, 12 months

1
0
0 0

qemu meeting status

by Richard Henderson

Hi guys. I just realized that today's meeting will be right in the middle of dinner plans. I'll organize better next week. Anyway, here's my status: - Fourth SME patch set -- parts merged, and some bugs fixed. - Base/arm-compat portion of semihosting rewrite now upstream. Target-specific bits for m68k, mips, nios2, xtensa outstanding. - Almost done with FEAT_HAFDBS (hardware access/dirty updates). Big changes to ptw.c to make that work: 50+ patches. The reorg should make FEAT_RME easier though. r~

3 years

2
1
0 0

[ACTIVITY] Report for weeks #24 and #25

by Thiago Jung Bauermann

Hello, I just noticed that I didn't send a report for week #24. Sorry about that. For that reason, this report covers two weeks. # Linaro CI's GDB testsuite results * Submitted upstream patch fixing gdb_compile regexp to account for our GNATMAKE_FOR_TARGET value containing spaces. This should solve the Ada test failures in our CI. * Fixed the Abe shell script to correctly set auto-load-safe-path so that GDB can load libthread_db.so.1. Unfortunately the CI detected a problem with using the generated manifest to reproduce the toolchain build, so I'm back to the drawing board on this one. * Sent a Gerrit change request for the Abe script updating it to use release 12's branch and tag for GDB and gdbserver, and another one removing a workaround for a build problem fixed in GDB 9. * Sent a Gerrit change request for tcwg-dev-build.sh fixing a couple of issues I found when using it to build and test GDB. # [GNU-767] Support changing SVE vector length in remote debugging * Analysed and fixed a couple more regressions in my branch. # Misc * Attended a few online sessions from Linaro San Francisco Get Together. * Sent Gerrit change request updating the TCWG script that generates our SSH known_hosts file to include the Ed25519 host keys, which are now preferred in Ubuntu 22.04. * Was out one day due to “Corpus Christi” public holiday. -- Thiago

3 years

1
0
0 0

[weekly][linaro] report week ending 24 Jun

by Peter Maydell

Progress: * UM-2 [QEMU upstream maintainership] - First week back after holiday: lots of catchup - Good progress with the code review queue, including getting rid of a few things that had been lurking in it for too long, and another pass through the latest SME series - KVM Forum programme committee work -- PMM

3 years

1
0
0 0

[ACTIVITY] Report for week #23

by Thiago Jung Bauermann

Hello, # [GNU-767] Support changing SVE vector length in remote debugging * Debugged and fixed a few issues in my code where gdbserver was having trouble with setting the target description for new threads. Also fixed regressions in a couple more testcases. # Linaro CI's GDB testsuite results * Luis commented on IRC that the GDB testsuite results from the Linaro CI seemed a bit high with about 540 failures, so I set out to investigate. The two biggest sources of failures are: 1. Ada tests were failing because they can't build their test executables. This is expected because we don't have the Ada compiler in the CI, but normally these testcases would just bail out as unsupported. Found out that there was a regex in the GDB testsuite that was (IMHO) too strict for our particular setup and fixed it. 2. All CTF tests are failing. The compiler in the CI seems to be building test executables with CTF debug info, so we do seem to have a problem there. The CI's GDB is also not loading libthread_db.so because of a GDB security setting, so I fixed that as well and expect some more tests to pass now. I still haven't submitted my fixes for 1. to upstream and for the libthread_db.so.1 issue to our CI scripts because I'm still working with jenkins-scripts and Abe to reproduce the CI environment to verify the fixes. -- Thiago

3 years

1
0
0 0

[ACTIVITY] report week ending 10 Jun

by Peter Maydell

Progress: * UM-2 [QEMU upstream maintainership] - This week was almost entirely code review and similar upstream tasks - managed to review all the preliminary parts of the SME patchset - reviewed several other refactoring series from rth - reviewed a big PS/2 keyboard emulation refactoring patchset - prep for KVM Forum program committee session * QEMU-422 [QEMU Arm Neoverse V1 vCPU for TCG] - FEAT_RASv1p1 and FEAT_DoubleFault now upstream -- PMM

3 years

1
0
0 0

[ACTIVITY] Report for week #22

by Thiago Jung Bauermann

Hello, # [GNU-767] Support changing SVE vector length in remote debugging * Debugged and fixed issues in my code where gdbserver was in some cases trying to read inferior registers before aarch64_target was fully initialised, and also while the inferior thread was running. This improved reliability but there are still some testsuite regressions to look into. # Sourceware bug 28561 - [gdb/testsuite] Error due to not reading \r\n at end of mi prompt * Posted comment to the bug report summarising my current results. * Tried to reproduce the bug using the upstream v5.3 kernel (since I was able to see it with openSUSE Leap's v5.3 kernel), but failed. Still trying to understand what that implies. -- Thiago

3 years

1
0
0 0

[TCWG CI] Regression caused by gcc: rs6000: Harden mma_init_builtins

by ci_notify＠linaro.org

[TCWG CI] Regression caused by gcc: rs6000: Harden mma_init_builtins: commit 6278065af07634278ba30029d92a82b089969baa Author: Peter Bergner <bergner(a)linux.ibm.com> rs6000: Harden mma_init_builtins Results regressed to # reset_artifacts: -10 # build_abe binutils: -9 # build_abe stage1: -5 # build_abe qemu: -2 # linux_n_obj: 33 # First few build errors in logs: # 00:03:13 cc1plus: fatal error: ./include/generated/utsrelease.h: No such file or directory # 00:03:13 make[2]: *** [scripts/gcc-plugins/latent_entropy_plugin.so] Error 1 # 00:03:13 cc1plus: fatal error: ./include/generated/utsrelease.h: No such file or directory # 00:03:13 make[2]: *** [scripts/gcc-plugins/stackleak_plugin.so] Error 1 # 00:03:13 cc1plus: fatal error: ./include/generated/utsrelease.h: No such file or directory # 00:03:13 make[2]: *** [scripts/gcc-plugins/randomize_layout_plugin.so] Error 1 # 00:03:13 make[1]: *** [scripts/gcc-plugins] Error 2 # 00:03:14 make: *** [scripts] Error 2 from # reset_artifacts: -10 # build_abe binutils: -9 # build_abe stage1: -5 # build_abe qemu: -2 # linux_n_obj: 31574 # linux build successful: all # linux boot successful: boot THIS IS THE END OF INTERESTING STUFF. BELOW ARE LINKS TO BUILDS, REPRODUCTION INSTRUCTIONS, AND THE RAW COMMIT. This commit has regressed these CI configurations: - tcwg_kernel/gnu-release-aarch64-next-allmodconfig First_bad build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-next-a… Last_good build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-next-a… Baseline build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-next-a… Even more details: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-next-a… Reproduce builds: <cut> mkdir investigate-gcc-6278065af07634278ba30029d92a82b089969baa cd investigate-gcc-6278065af07634278ba30029d92a82b089969baa # Fetch scripts git clone https://git.linaro.org/toolchain/jenkins-scripts # Fetch manifests and test.sh script mkdir -p artifacts/manifests curl -o artifacts/manifests/build-baseline.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-next-a… --fail curl -o artifacts/manifests/build-parameters.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-next-a… --fail curl -o artifacts/test.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-next-a… --fail chmod +x artifacts/test.sh # Reproduce the baseline build (build all pre-requisites) ./jenkins-scripts/tcwg_kernel-build.sh @@ artifacts/manifests/build-baseline.sh # Save baseline build state (which is then restored in artifacts/test.sh) mkdir -p ./bisect rsync -a --del --delete-excluded --exclude /bisect/ --exclude /artifacts/ --exclude /gcc/ ./ ./bisect/baseline/ cd gcc # Reproduce first_bad build git checkout --detach 6278065af07634278ba30029d92a82b089969baa ../artifacts/test.sh # Reproduce last_good build git checkout --detach a5b5c7c2840ebb0aaa0d0f1e090fb2fc6942196d ../artifacts/test.sh cd .. </cut> Full commit (up to 1000 lines): <cut> commit 6278065af07634278ba30029d92a82b089969baa Author: Peter Bergner <bergner(a)linux.ibm.com> Date: Wed Jul 7 11:39:34 2021 -0500 rs6000: Harden mma_init_builtins The previous MMA patch added some fragile code to initialize its new built-ins. This patch hardens the initialization. 2021-07-07 Peter Bergner <bergner(a)linux.ibm.com> gcc/ * config/rs6000/rs6000-call.c (mma_init_builtins): Use VSX_BUILTIN_LXVP and VSX_BUILTIN_STXVP. --- gcc/config/rs6000/rs6000-call.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c index 6115e3b34d9..904e104c058 100644 --- a/gcc/config/rs6000/rs6000-call.c +++ b/gcc/config/rs6000/rs6000-call.c @@ -14293,7 +14293,8 @@ mma_init_builtins (void) /* Some MMA built-ins that are expanded into gimple are converted into internal MMA built-ins that are expanded into rtl. The internal built-in follows immediately after this built-in. */ - if (d[1].icode != CODE_FOR_nothing) + if (d->code != VSX_BUILTIN_LXVP + && d->code != VSX_BUILTIN_STXVP) { op[nopnds++] = void_type_node; icode = d[1].icode; </cut>

3 years

3
2
0 0

[ACTIVITY] report week ending 31 May

by Peter Maydell

Progress (covers two half-weeks): * UM-2 [QEMU upstream maintainership] - investigating a reported bug with semihosting syscalls over gdbstub - reviewed a massive series from RTH refactoring our SVE code in preparation for handling SME * QEMU-422 [QEMU Arm Neoverse V1 vCPU for TCG] - looking at exactly what FEAT_RASv1p1 and FEAT_DoubleFault require of a minimal RAS implementation like QEMU's - sent a patch implementing FEAT_RASv1p1 (a no-op for QEMU) - sent a patch implementing FEAT_DoubleFault (turns out to be simpler than I initially feared it might be) -- PMM

3 years, 1 month

1
0
0 0

[TCWG CI] Regression caused by gcc: rs6000: MMA test case ICEs using -O3 [PR99842]

by ci_notify＠linaro.org

[TCWG CI] Regression caused by gcc: rs6000: MMA test case ICEs using -O3 [PR99842]: commit df4e0359dad239854af0ea9eacb8e7e3719557d0 Author: Peter Bergner <bergner(a)linux.ibm.com> rs6000: MMA test case ICEs using -O3 [PR99842] Results regressed to # reset_artifacts: -10 # build_abe binutils: -9 # build_abe stage1: -5 # build_abe qemu: -2 # linux_n_obj: 33 # First few build errors in logs: # 00:00:57 cc1plus: fatal error: ./include/generated/utsrelease.h: No such file or directory # 00:00:57 cc1plus: fatal error: ./include/generated/utsrelease.h: No such file or directory # 00:00:57 cc1plus: fatal error: ./include/generated/utsrelease.h: No such file or directory # 00:00:57 make[2]: *** [scripts/gcc-plugins/stackleak_plugin.so] Error 1 # 00:00:57 make[2]: *** [scripts/gcc-plugins/latent_entropy_plugin.so] Error 1 # 00:00:57 make[2]: *** [scripts/gcc-plugins/randomize_layout_plugin.so] Error 1 # 00:00:57 make[1]: *** [scripts/gcc-plugins] Error 2 # 00:00:59 make: *** [scripts] Error 2 from # reset_artifacts: -10 # build_abe binutils: -9 # build_abe stage1: -5 # build_abe qemu: -2 # linux_n_obj: 21071 # linux build successful: all THIS IS THE END OF INTERESTING STUFF. BELOW ARE LINKS TO BUILDS, REPRODUCTION INSTRUCTIONS, AND THE RAW COMMIT. This commit has regressed these CI configurations: - tcwg_kernel/gnu-release-aarch64-next-allyesconfig First_bad build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-next-a… Last_good build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-next-a… Baseline build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-next-a… Even more details: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-next-a… Reproduce builds: <cut> mkdir investigate-gcc-df4e0359dad239854af0ea9eacb8e7e3719557d0 cd investigate-gcc-df4e0359dad239854af0ea9eacb8e7e3719557d0 # Fetch scripts git clone https://git.linaro.org/toolchain/jenkins-scripts # Fetch manifests and test.sh script mkdir -p artifacts/manifests curl -o artifacts/manifests/build-baseline.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-next-a… --fail curl -o artifacts/manifests/build-parameters.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-next-a… --fail curl -o artifacts/test.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-next-a… --fail chmod +x artifacts/test.sh # Reproduce the baseline build (build all pre-requisites) ./jenkins-scripts/tcwg_kernel-build.sh @@ artifacts/manifests/build-baseline.sh # Save baseline build state (which is then restored in artifacts/test.sh) mkdir -p ./bisect rsync -a --del --delete-excluded --exclude /bisect/ --exclude /artifacts/ --exclude /gcc/ ./ ./bisect/baseline/ cd gcc # Reproduce first_bad build git checkout --detach df4e0359dad239854af0ea9eacb8e7e3719557d0 ../artifacts/test.sh # Reproduce last_good build git checkout --detach e21e93407202e62a10c372595076c593c561bb11 ../artifacts/test.sh cd .. </cut> Full commit (up to 1000 lines): <cut> commit df4e0359dad239854af0ea9eacb8e7e3719557d0 Author: Peter Bergner <bergner(a)linux.ibm.com> Date: Sun May 30 22:45:55 2021 -0500 rs6000: MMA test case ICEs using -O3 [PR99842] The mma_assemble_input_operand predicate does not accept reg+reg indexed addresses which can lead to ICEs. The lxv and lxvp instructions have indexed forms (lxvx and lxvpx), so the simple solution is to just allow indexed addresses in the predicate. 2021-05-30 Peter Bergner <bergner(a)linux.ibm.com> gcc/ PR target/99842 * config/rs6000/predicates.md(mma_assemble_input_operand): Allow indexed form addresses. gcc/testsuite/ PR target/99842 * g++.target/powerpc/pr99842.C: New. --- gcc/config/rs6000/predicates.md | 3 +- gcc/testsuite/g++.target/powerpc/pr99842.C | 188 +++++++++++++++++++++++++++++ 2 files changed, 190 insertions(+), 1 deletion(-) diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md index e21bc745f72..121cbf14810 100644 --- a/gcc/config/rs6000/predicates.md +++ b/gcc/config/rs6000/predicates.md @@ -1172,7 +1172,8 @@ (match_test "(mode == V16QImode && (vsx_register_operand (op, mode) || (MEM_P (op) - && quad_address_p (XEXP (op, 0), mode, false))))")) + && (indexed_or_indirect_address (XEXP (op, 0), mode) + || quad_address_p (XEXP (op, 0), mode, false)))))")) ;; Return 1 if this operand is valid for an MMA disassemble insn. (define_predicate "mma_disassemble_output_operand" diff --git a/gcc/testsuite/g++.target/powerpc/pr99842.C b/gcc/testsuite/g++.target/powerpc/pr99842.C new file mode 100644 index 00000000000..922450e2c21 --- /dev/null +++ b/gcc/testsuite/g++.target/powerpc/pr99842.C @@ -0,0 +1,188 @@ +/* PR target/99842 */ +/* { dg-require-effective-target power10_ok } */ +/* { dg-options "-O3 -mdejagnu-cpu=power10 -Wno-return-type" } */ + +/* Verify we do not ICE on the following noisy creduced test case. */ + +enum { a, b, c, d }; +template <typename> struct e; +template <typename g, typename h, typename k> struct e<g(h, k)> { + typedef h f; +}; +template <typename> struct ac; +template <typename ab> struct ac<const ab> : ac<ab> {}; +template <typename> struct l; +template <typename, int, int m, int = 0, int = a, int = m> class n; +template <typename> class o; +template <typename, typename, typename> class ag; +template <typename, typename, int = c> class af; +template <typename> struct ad; +template <typename ab> struct an { + typedef n<typename ab ::ah, ac<ab>::ai, ac<ab>::aj> f; +}; +template <typename al> struct am { typedef o<al> f; }; +template <typename al, typename = typename ac<al>::ao, + typename = typename ac<al>::av> +struct ak; +template <typename al, typename ao> struct ak<al, ao, int> { + typedef typename am<al>::f f; +}; +template <typename, typename, typename> struct aq; +template <typename ar, typename as> struct aq<ar, ar, as> { typedef ar at; }; +template <typename ap> ap bf(const typename ad<ap>::f *); +template <typename ap, int> ap aw(typename ad<ap>::f *ax) { return bf<ap>(ax); } +typedef __attribute__((altivec(vector__))) double au; +template <> struct ad<au> { typedef double f; }; +template <> au bf(const double *ax) { return __builtin_vec_vsx_ld(0, ax); } +template <typename> struct az {}; +template <typename al> class o : public l<al> { +public: + typedef typename ac<al>::ah ah; + template <typename ay> al &operator+=(const o<ay> &); +}; +template <typename> struct l {}; +template <typename ba, typename bb, int bd> struct ac<af<ba, bb, bd>> { + typedef typename ba::ah ah; + enum { ai, aj }; +}; +template <typename, typename, int bd> +class af + : public ak< + af<ag<int, const n<double, -1, -1, 3>, const n<double, -1, -1, 3>>, + n<double, -1, 1, 3>, bd>, + int, int>::f {}; +template <typename, typename, typename> struct be; +template <typename bj, typename bg, typename g> void bi(bj, bg bm, g) { + typename an<bg>::f bk(bm); +} +template <typename bj, typename bg, typename g> void bl(bj, bg bm, g bp) { + be<bj, bg, g>::bn(a, bm, bp); +} +template <typename, typename, typename, typename> struct bo; +class bs { +public: + bs(double *, int); + double &operator()(int, int) { return bq[br]; } + template <typename bw, int> bw bt(int i, int j) { + double &bu = operator()(i, j); + return aw<bw, b>(&bu); + } + double *bq; + int br; +}; +class ca : public bs { +public: + ca(double *by, int bz) : bs(by, bz) {} +}; +template <typename al> class ce : public am<al>::f { +protected: + template <typename ay> void cb(l<ay>) { + af<ag<int, const n<double, -1, -1, 3>, const n<double, -1, -1, 3>>, + n<double, -1, 1, 3>> + cc; + bl(0, cc, az<typename ay::ah>()); + } + template <typename> void ch(long); + template <typename ay> void ch(l<ay> cf) { cb(cf); } +}; +template <typename cg, int aa, int m, int cl, int ci, int cj> +struct ac<n<cg, aa, m, cl, ci, cj>> { + typedef cg ah; + typedef int av; +}; +template <typename cg, int, int m, int, int, int> +class n : public ce<n<cg, m, c>> { +public: + template <typename ab> n(ab p) { n::template ch<ab>(p); } +}; +template <typename bc, typename ba, typename bb> struct ac<ag<bc, ba, bb>> { + typedef ba ao; + typedef typename e<bc(typename ba::ah, typename bb::ah)>::f ah; + typedef typename aq<typename ac<ba>::av, typename ac<bb>::av, bc>::at av; +}; +template <typename> class cm; +template <typename, typename r, typename cs> +class ag + : public cm<typename aq<typename ac<r>::av, typename ac<cs>::av, int>::at> { +}; +template <typename> +class cm : public ak<ag<int, n<double, 1, 1>, n<double, 1, 1>>>::f {}; +template <typename al> +template <typename ay> +al &o<al>::operator+=(const o<ay> &) { + af<ag<int, const n<double, -1, -1, 3>, const n<double, -1, -1, 3>>, + n<double, -1, 1, 3>> + co; + bi(0, co, int()); +} +enum { cp }; +template <int> struct cq; +template <typename> struct cr { + enum { q }; + enum { ae = cq<q>::at }; +}; +template <> struct cq<cp> { + enum { at = d }; +}; +struct t { + template <typename ba, typename bb, typename s> static void bn(ba, bb, s) { + typedef typename bb::ah x; + x u; + bo<long, ca, x, ca>::bn(0, 0, ca(0, 0), ca(&u, 1), 0, 0, 0); + } +}; +template <typename, typename bb, int = cr<bb>::ae> struct cu; +template <typename cd, typename ba, typename bb, int ct, typename ah> +struct be<cd, af<ba, bb, ct>, az<ah>> { + static void bn(cd, af<ba, bb> bm, az<ah>) { + ag<int, const n<double, -1, -1, 3>, const n<double, -1, -1, 3>> da; + cu<ba, bb>::cv(c, da, bm); + } +}; +template <typename al> struct cw { + template <typename bj> + static void + cv(bj, ag<int, const n<double, -1, -1, 3>, const n<double, -1, -1, 3>>, + n<double, -1, 1, 3> bx) { + double alpha; + ag<int, const n<double, -1, -1, 3>, const n<double, -1, -1, 3>> bh; + al::cx(c, bh, bx, alpha); + } +}; +template <typename ba, typename bb> struct cu<ba, bb, d> : cw<cu<ba, bb>> { + template <typename s> static void cx(s, ba, bb bx, typename af<ba, bb>::ah) { + ba cz; + t::bn(cz, bx, c); + } +}; +template <typename dj, typename, bool> +void db(__vector_quad *, __vector_pair &, dj); +template <typename, typename, typename, typename, typename, typename, int> +void dc(ca alhs) { + typedef au dj; + typedef au dd; + ca bh(alhs); + enum { de }; + __vector_quad df, dg; + int j; + dd v; + __vector_pair dh; + __builtin_mma_assemble_pair( + &dh, (__attribute__((altivec(vector__))) char)bh.bt<dj, de>(0, j), + (__attribute__((altivec(vector__))) char)bh.bt<dj, de>(0, j)); + db<dj, dd, true>(&df, dh, v); + __vector_pair di; + __builtin_mma_assemble_pair( + &di, (__attribute__((altivec(vector__))) char)bh.bt<dj, de>(0, j), + (__attribute__((altivec(vector__))) char)bh.bt<dj, de>(0, j)); + db<dj, dd, true>(&dg, di, v); +} +template <typename bv, typename w, typename cy> struct bo<bv, w, double, cy> { + static void bn(bv, bv, w bh, cy, double, bv, double) { + dc<bv, double, w, double, cy, double, d>(bh); + } +}; +void dm() { + n<double, 1, 1> dk(1), y(0); + y += dk; +} </cut>

3 years, 1 month

3
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[ACTIVITY] Report for week #21

by Thiago Jung Bauermann

Hello, # [GNU-767] Support changing SVE vector length in remote debugging * Found out that one issue I was having with gdbserver was caused by an incompatibility it has with zsh (sourceware bug 26116). * Fixed a gdbserver crash in my code where a register set was NULL in the target description. * Now working on an issue where the target description says SVE isn't supported, but the regsets information says they are. This is caused by my code sometimes moving the first ptrace call to get the inferior registers to a time before it is properly stopped. # Sourceware bug 28561 - [gdb/testsuite] Error due to not reading \r\n at end of mi prompt * Set up a few containers and KVM guests to attempt to reproduce this bug on different environments. Reproduced it successfully on an openSUSE Leap 15.3 guest, as well as Ubuntu 20.04 and 22.04 containers in said guest. I wasn't able to reproduce on Ubuntu 20.04 nor 22.04 guests. Suspecting it's a kernel issue where the fix was backported to the Ubuntu kernels. -- Thiago

3 years, 1 month

1
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0 0

[TCWG CI] Regression caused by gcc: c++: designators in single-element init lists

by ci_notify＠linaro.org

[TCWG CI] Regression caused by gcc: c++: designators in single-element init lists: commit 885035eacb36b5bf1aa3b0d05f675ab89665d7be Author: Jason Merrill <jason(a)redhat.com> c++: designators in single-element init lists Results regressed to # reset_artifacts: -10 # build_abe binutils: -9 # build_abe stage1: -5 # build_abe qemu: -2 # linux_n_obj: 33 # First few build errors in logs: # 00:00:55 cc1plus: fatal error: ./include/generated/utsrelease.h: No such file or directory # 00:00:55 cc1plus: fatal error: ./include/generated/utsrelease.h: No such file or directory # 00:00:55 cc1plus: fatal error: ./include/generated/utsrelease.h: No such file or directory # 00:00:56 make[2]: *** [scripts/gcc-plugins/latent_entropy_plugin.so] Error 1 # 00:00:56 make[2]: *** [scripts/gcc-plugins/stackleak_plugin.so] Error 1 # 00:00:56 make[2]: *** [scripts/gcc-plugins/randomize_layout_plugin.so] Error 1 # 00:00:56 make[1]: *** [scripts/gcc-plugins] Error 2 # 00:00:57 make: *** [scripts] Error 2 from # reset_artifacts: -10 # build_abe binutils: -9 # build_abe stage1: -5 # build_abe qemu: -2 # linux_n_obj: 21071 # linux build successful: all THIS IS THE END OF INTERESTING STUFF. BELOW ARE LINKS TO BUILDS, REPRODUCTION INSTRUCTIONS, AND THE RAW COMMIT. This commit has regressed these CI configurations: - tcwg_kernel/gnu-release-aarch64-next-allyesconfig First_bad build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-next-a… Last_good build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-next-a… Baseline build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-next-a… Even more details: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-next-a… Reproduce builds: <cut> mkdir investigate-gcc-885035eacb36b5bf1aa3b0d05f675ab89665d7be cd investigate-gcc-885035eacb36b5bf1aa3b0d05f675ab89665d7be # Fetch scripts git clone https://git.linaro.org/toolchain/jenkins-scripts # Fetch manifests and test.sh script mkdir -p artifacts/manifests curl -o artifacts/manifests/build-baseline.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-next-a… --fail curl -o artifacts/manifests/build-parameters.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-next-a… --fail curl -o artifacts/test.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-next-a… --fail chmod +x artifacts/test.sh # Reproduce the baseline build (build all pre-requisites) ./jenkins-scripts/tcwg_kernel-build.sh @@ artifacts/manifests/build-baseline.sh # Save baseline build state (which is then restored in artifacts/test.sh) mkdir -p ./bisect rsync -a --del --delete-excluded --exclude /bisect/ --exclude /artifacts/ --exclude /gcc/ ./ ./bisect/baseline/ cd gcc # Reproduce first_bad build git checkout --detach 885035eacb36b5bf1aa3b0d05f675ab89665d7be ../artifacts/test.sh # Reproduce last_good build git checkout --detach 84fd1b5dff70cd74aee7e8b18f66959d8b8e1ce7 ../artifacts/test.sh cd .. </cut> Full commit (up to 1000 lines): <cut> commit 885035eacb36b5bf1aa3b0d05f675ab89665d7be Author: Jason Merrill <jason(a)redhat.com> Date: Wed May 19 21:13:43 2021 -0400 c++: designators in single-element init lists While looking at PR100489, it occurred to me that places that currently use an initializer-list with a single element to initialize an object of the same type shouldn't do that if the element has a designator. gcc/cp/ChangeLog: * call.c (reference_binding): Check for designator. (implicit_conversion_1, build_special_member_call): Likewise. * decl.c (reshape_init_r): Likewise. * pt.c (do_class_deduction): Likewise. * typeck2.c (digest_init_r): Likewise. gcc/testsuite/ChangeLog: * g++.dg/cpp2a/desig19.C: New test. --- gcc/cp/call.c | 5 ++++- gcc/cp/decl.c | 2 ++ gcc/cp/pt.c | 3 ++- gcc/cp/typeck2.c | 1 + gcc/testsuite/g++.dg/cpp2a/desig19.C | 33 +++++++++++++++++++++++++++++++++ 5 files changed, 42 insertions(+), 2 deletions(-) diff --git a/gcc/cp/call.c b/gcc/cp/call.c index fa770f244cb..cfccf273632 100644 --- a/gcc/cp/call.c +++ b/gcc/cp/call.c @@ -1731,7 +1731,8 @@ reference_binding (tree rto, tree rfrom, tree expr, bool c_cast_p, int flags, because A[] and A[2] are reference-related. But we don't do it because grok_reference_init has deduced the array size (to 1), and A[1] and A[2] aren't reference-related. */ - if (CONSTRUCTOR_NELTS (expr) == 1) + if (CONSTRUCTOR_NELTS (expr) == 1 + && !CONSTRUCTOR_IS_DESIGNATED_INIT (expr)) { tree elt = CONSTRUCTOR_ELT (expr, 0)->value; if (error_operand_p (elt)) @@ -2095,6 +2096,7 @@ implicit_conversion_1 (tree to, tree from, tree expr, bool c_cast_p, { if (BRACE_ENCLOSED_INITIALIZER_P (expr) && CONSTRUCTOR_NELTS (expr) == 1 + && !CONSTRUCTOR_IS_DESIGNATED_INIT (expr) && !is_list_ctor (cand->fn)) { /* "If C is not an initializer-list constructor and the @@ -10199,6 +10201,7 @@ build_special_member_call (tree instance, tree name, vec<tree, va_gc> **args, if (BRACE_ENCLOSED_INITIALIZER_P (arg) && !TYPE_HAS_LIST_CTOR (class_type) + && !CONSTRUCTOR_IS_DESIGNATED_INIT (arg) && CONSTRUCTOR_NELTS (arg) == 1) arg = CONSTRUCTOR_ELT (arg, 0)->value; diff --git a/gcc/cp/decl.c b/gcc/cp/decl.c index 6107b553cb4..e7268d5ad18 100644 --- a/gcc/cp/decl.c +++ b/gcc/cp/decl.c @@ -6650,6 +6650,8 @@ reshape_init_r (tree type, reshape_iter *d, tree first_initializer_p, initialized from that element." Even if T is an aggregate. */ if (cxx_dialect >= cxx11 && (CLASS_TYPE_P (type) || VECTOR_TYPE_P (type)) && first_initializer_p + /* But not if it's a designated init. */ + && !d->cur->index && d->end - d->cur == 1 && reference_related_p (type, TREE_TYPE (init))) { diff --git a/gcc/cp/pt.c b/gcc/cp/pt.c index 3d1787b6fc3..99a9ee5ade2 100644 --- a/gcc/cp/pt.c +++ b/gcc/cp/pt.c @@ -29326,7 +29326,8 @@ do_class_deduction (tree ptype, tree tmpl, tree init, { list_init_p = true; try_list_ctor = TYPE_HAS_LIST_CTOR (type); - if (try_list_ctor && CONSTRUCTOR_NELTS (init) == 1) + if (try_list_ctor && CONSTRUCTOR_NELTS (init) == 1 + && !CONSTRUCTOR_IS_DESIGNATED_INIT (init)) { /* As an exception, the first phase in 16.3.1.7 (considering the initializer list as a single argument) is omitted if the diff --git a/gcc/cp/typeck2.c b/gcc/cp/typeck2.c index 5a7219dec65..6679e247816 100644 --- a/gcc/cp/typeck2.c +++ b/gcc/cp/typeck2.c @@ -1183,6 +1183,7 @@ digest_init_r (tree type, tree init, int nested, int flags, the object is initialized from that element." */ if (cxx_dialect >= cxx11 && BRACE_ENCLOSED_INITIALIZER_P (stripped_init) + && !CONSTRUCTOR_IS_DESIGNATED_INIT (stripped_init) && CONSTRUCTOR_NELTS (stripped_init) == 1 && ((CLASS_TYPE_P (type) && !CLASSTYPE_NON_AGGREGATE (type)) || VECTOR_TYPE_P (type))) diff --git a/gcc/testsuite/g++.dg/cpp2a/desig19.C b/gcc/testsuite/g++.dg/cpp2a/desig19.C new file mode 100644 index 00000000000..3321da85802 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp2a/desig19.C @@ -0,0 +1,33 @@ +// { dg-do compile { target c++11 } } +// { dg-options "" } + +struct A +{ + int i; + constexpr operator int() { return 42; } +}; + +#define SA(X) static_assert ((X),#X) +constexpr A a1 { A() }; +SA(a1.i == 0); +constexpr A a2 { i: A() }; +SA(a2.i == 42); +#if __cpp_constexpr >= 201304L +constexpr int f3 () { A const &r { A() }; return r.i; } +SA(f3() == 0); +constexpr int f4 () { A const &r { i: A() }; return r.i; } +SA(f4() == 42); +constexpr int f5 () { A ar[1]{{ A() }}; return ar[0].i; } +SA(f5() == 0); +constexpr int f5a () { A ar[1]{{ i: A() }}; return ar[0].i; } +SA(f5a() == 42); +#if __cpp_constexpr >= 201907L +constexpr int f6 () { A* p = new A{A()}; int i = p->i; delete p; return i; } +SA(f6() == 0); +constexpr int f6a () { A* p = new A{i:A()}; int i = p->i; delete p; return i; } +SA(f6a() == 42); +#endif +#endif +constexpr int f7 (A a) { return a.i; } +SA(f7({A()}) == 0); +SA(f7({i:A()}) == 42); </cut>

3 years, 1 month

1
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0 0

[ACTIVITY] week ending May. 29 2022

by Alex Bennée

Project Stratos =============== - posted [RFC PATCH] xen/arm: p2m don't fall over on FEAT_LPA enabled hw Message-Id: <20220426160548.2020794-1-alex.bennee(a)linaro.org> - posted [PATCH v2] xen/arm: p2m don't fall over on FEAT_LPA enabled hw Message-Id: <20220428103410.2723837-1-alex.bennee(a)linaro.org> - many discussions and plans at KWG sprint - posted Remaining Xen enabling work for rust-vmm Message-Id: <87pmk472ii.fsf(a)linaro.org> - posted vhost-device outstanding tasks Message-Id: <87zgj87alq.fsf(a)linaro.org> vhost-device maintainer effort ([UM-196]) - adopted [PATCH 0/2] virtio: Add vhost-user-gpio device's support Message-Id: <5f560cab92d0d789b1c94295ec74b9952907d69d.1641987128.git.viresh.kumar(a)linaro.org> - posted [RFC PATCH v2] tests/qtest: attempt to enable tests for virtio-gpio (!working) Message-Id: <20220408155704.2777166-1-alex.bennee(a)linaro.org> - posted [PATCH v2 00/15] virtio-gpio and various virtio cleanups Message-Id: <20220524154056.2896913-14-alex.bennee(a)linaro.org> QEMU Upstream Work ([UM-2]) =========================== - posted [PATCH v1 00/15] testing, docs, tracepoints and cputlb hacks Message-Id: <20220408164742.2844631-1-alex.bennee(a)linaro.org> - posted [RFC PATCH] target/i386: avoid copying junk to extended ZMMReg fields Message-Id: <20220411145609.3932882-1-alex.bennee(a)linaro.org> - posted [RFC PATCH] gdb/gic: expose cpu_index via MxTxAttrs Message-Id: <20220412104519.201655-1-alex.bennee(a)linaro.org> - posted [RFC PATCH] tests/guest-debug: better handle gdb crashes Message-Id: <20220413121115.639610-1-alex.bennee(a)linaro.org> - posted [PATCH v2 01/15] contrib/vhost-user-blk: fix 32 bit build and enable Message-Id: <9c313696-6626-0b9e-0625-394fb2b38e21(a)redhat.com> - posted [PATCH v1 00/33] testing/next (gitlab, junit, lcitool, x-compile) Message-Id: <20220527153603.887929-1-alex.bennee(a)linaro.org> [UM-2] <https://linaro.atlassian.net/browse/UM-2> Completed Reviews [7/7] ======================= [PATCH for-7.1 v2 00/39] Logging cleanup and per-thread logfiles Message-Id: <20220326132534.543738-1-richard.henderson(a)linaro.org> [PATCH 00/17] tests/docker and tests/tcg cleanup and diet Message-Id: <20220401141326.1244422-1-pbonzini(a)redhat.com> [PATCH v1] virtio/virtio.c: include virtio prefix in error message Message-Id: <20220414112902.41390-1-codeguy.moteen(a)gmail.com> [PATCH v3 00/39] Logging cleanup and per-thread logfiles Message-Id: <20220417183019.755276-1-richard.henderson(a)linaro.org> [PATCH v3 00/60] target/arm: Cleanups, new features, new cpus Message-Id: <20220417174426.711829-1-richard.henderson(a)linaro.org> - or at least a chunk of it [PATCH] Remove Ubuntu 18.04 support from the repository Message-Id: <20220510195612.677494-1-thuth(a)redhat.com> [PATCH 00/16] Cross compilation of embedded firmware Message-Id: <20220517092616.1272238-1-pbonzini(a)redhat.com> Current Review Queue ==================== TODO [PATCH v4 0/9] Record/replay refactoring and stuff Message-Id: <165364836050.688121.11980415709895333098.stgit@pasha-ThinkPad-X280> ======================================================================================================================================= TODO [PATCH v11 0/2] hw/arm/virt: CXL 2.0 emulation support Message-Id: <20220520163732.27545-3-Jonathan.Cameron(a)huawei.com> =========================================================================================================================== TODO [PATCH v2 0/7] target/arm: SME prep patches Message-Id: <20220517054850.177016-1-richard.henderson(a)linaro.org> ================================================================================================================== -- Alex Bennée

3 years, 1 month

1
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[TCWG CI] Regression caused by gcc: Daily bump.

by ci_notify＠linaro.org

[TCWG CI] Regression caused by gcc: Daily bump.: commit b75978d14fc35981ffd8bf060ee52300db4dae50 Author: GCC Administrator <gccadmin(a)gcc.gnu.org> Daily bump. Results regressed to # reset_artifacts: -10 # build_abe binutils: -9 # build_abe stage1: -5 # build_abe qemu: -2 # linux_n_obj: 33 # First few build errors in logs: # 00:00:52 cc1plus: fatal error: ./include/generated/utsrelease.h: No such file or directory # 00:00:52 cc1plus: fatal error: ./include/generated/utsrelease.h: No such file or directory # 00:00:53 make[2]: *** [scripts/gcc-plugins/latent_entropy_plugin.so] Error 1 # 00:00:53 make[2]: *** [scripts/gcc-plugins/randomize_layout_plugin.so] Error 1 # 00:00:53 make[1]: *** [scripts/gcc-plugins] Error 2 # 00:00:53 make: *** [scripts] Error 2 from # reset_artifacts: -10 # build_abe binutils: -9 # build_abe stage1: -5 # build_abe qemu: -2 # linux_n_obj: 22769 THIS IS THE END OF INTERESTING STUFF. BELOW ARE LINKS TO BUILDS, REPRODUCTION INSTRUCTIONS, AND THE RAW COMMIT. This commit has regressed these CI configurations: - tcwg_kernel/gnu-release-arm-next-allmodconfig First_bad build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-arm-next-allmo… Last_good build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-arm-next-allmo… Baseline build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-arm-next-allmo… Even more details: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-arm-next-allmo… Reproduce builds: <cut> mkdir investigate-gcc-b75978d14fc35981ffd8bf060ee52300db4dae50 cd investigate-gcc-b75978d14fc35981ffd8bf060ee52300db4dae50 # Fetch scripts git clone https://git.linaro.org/toolchain/jenkins-scripts # Fetch manifests and test.sh script mkdir -p artifacts/manifests curl -o artifacts/manifests/build-baseline.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-arm-next-allmo… --fail curl -o artifacts/manifests/build-parameters.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-arm-next-allmo… --fail curl -o artifacts/test.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-arm-next-allmo… --fail chmod +x artifacts/test.sh # Reproduce the baseline build (build all pre-requisites) ./jenkins-scripts/tcwg_kernel-build.sh @@ artifacts/manifests/build-baseline.sh # Save baseline build state (which is then restored in artifacts/test.sh) mkdir -p ./bisect rsync -a --del --delete-excluded --exclude /bisect/ --exclude /artifacts/ --exclude /gcc/ ./ ./bisect/baseline/ cd gcc # Reproduce first_bad build git checkout --detach b75978d14fc35981ffd8bf060ee52300db4dae50 ../artifacts/test.sh # Reproduce last_good build git checkout --detach ac0bc21bd634a334ba8f323c39a11f01dfdc2aae ../artifacts/test.sh cd .. </cut> Full commit (up to 1000 lines): <cut> commit b75978d14fc35981ffd8bf060ee52300db4dae50 Author: GCC Administrator <gccadmin(a)gcc.gnu.org> Date: Wed Jun 2 00:16:43 2021 +0000 Daily bump. --- gcc/ChangeLog | 132 ++++++++++++++++++++++++++++++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/c-family/ChangeLog | 9 ++++ gcc/cp/ChangeLog | 19 +++++++ gcc/fortran/ChangeLog | 38 ++++++++++++++ gcc/testsuite/ChangeLog | 61 ++++++++++++++++++++++ libstdc++-v3/ChangeLog | 38 ++++++++++++++ 7 files changed, 298 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e1ae7fa23f0..ef69e6a04b3 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,135 @@ +2021-06-01 Andrew Pinski <apinski(a)marvell.com> + + PR tree-optimization/25290 + * tree-ssa-phiopt.c (match_simplify_replacement): + New function. + (tree_ssa_phiopt_worker): Use match_simplify_replacement. + (two_value_replacement): Change the comment about + conditional_replacement. + (conditional_replacement): Delete. + +2021-06-01 Andrew Pinski <apinski(a)marvell.com> + + PR tree-optimization/95481 + * tree-tailcall.c (find_tail_calls): Handle empty typed + return decls. + +2021-06-01 Andrew Pinski <apinski(a)marvell.com> + + * gimplify.c (zero_sized_field_decl): Delete + (zero_sized_type): Delete + (gimplify_init_ctor_eval): Use is_empty_type instead + of zero_sized_field_decl. + (gimplify_modify_expr): Use is_empty_type instead of + zero_sized_type. + +2021-06-01 Jason Merrill <jason(a)redhat.com> + + PR c++/91859 + * tree.h (CALL_FROM_NEW_OR_DELETE_P): Adjust comment. + +2021-06-01 Jason Merrill <jason(a)redhat.com> + + PR c++/94492 + * diagnostic.h (warning_enabled_at): Declare. + * diagnostic.c (diagnostic_enabled): Factor out from... + (diagnostic_report_diagnostic): ...here. + (warning_enabled_at): New. + +2021-06-01 Aldy Hernandez <aldyh(a)redhat.com> + + * gimple-ssa-evrp.c: Enable exporting of global ranges. + +2021-06-01 Martin Liska <mliska(a)suse.cz> + + PR other/100826 + * doc/invoke.texi: Mention that -fgcse-after-reload + is enabled with -O3. + +2021-06-01 liuhongt <hongtao.liu(a)intel.com> + + PR tree-optimization/98365 + * tree-if-conv.c (strip_nop_cond_scalar_reduction): New function. + (is_cond_scalar_reduction): Handle nop_expr in cond scalar reduction. + (convert_scalar_cond_reduction): Ditto. + (predicate_scalar_phi): Ditto. + +2021-06-01 Andrew MacLeod <amacleod(a)redhat.com> + + PR tree-optimization/100781 + * gimple-range-cache.cc (ranger_cache::ranger_cache): Enable new + value calculation by default. + (ranger_cache::enable_new_values): New. + (ranger_cache::disable_new_values): New. + (ranger_cache::push_poor_value): Check if new values are allowed. + * gimple-range-cache.h (class ranger_cache): New member/methods. + * gimple-range.cc (gimple_ranger::range_of_expr): Check for debug + statement, and disable/renable new value calculation. + +2021-06-01 Andrew MacLeod <amacleod(a)redhat.com> + + * gimple-range-cache.cc (ranger_cache::ssa_range_in_bb): Delete. + (ranger_cache::range_of_def): New. + (ranger_cache::entry_range): New. + (ranger_cache::exit_range): New. + (ranger_cache::range_of_expr): Adjust. + (ranger_cache::range_on_edge): Adjust. + (ranger_cache::propagate_cache): Call exit_range directly. + * gimple-range-cache.h (class ranger_cache): Adjust. + +2021-06-01 Andrew MacLeod <amacleod(a)redhat.com> + + * gimple-range-cache.cc (ranger_cache::ranger_cache): Adjust for + gori_compute being a member rather than base class. + dervied call to member call. + (ranger_cache::dump): No longer dump gori_map. + (ranger_cache::dump_bb): New. + (ranger_cache::get_non_stale_global_range): Adjust for gori_compute + being a member rather than base class. + (ranger_cache::set_global_range): Ditto. + (ranger_cache::ssa_range_in_bb): Ditto. + (ranger_cache::range_of_expr): New. + (ranger_cache::range_on_edge): New. + (ranger_cache::block_range): Adjust for gori_computes. Debug changes. + (ranger_cache::propagate_cache): Adjust debugging output. + (ranger_cache::fill_block_cache): Adjust for gori_computes. Debug + output changes. + * gimple-range-cache.h (class ranger_cache): Make gori_compute a + member, and inherit from range_query instead. + (ranger_cache::dump_bb): New. split from dump. + * gimple-range-gori.cc (gori_compute::ssa_range_in_bb): Delete. + (gori_compute::expr_range_at_stmt): Delete. + (gori_compute::compute_name_range_op): Delete. + (gori_compute::compute_operand_range_switch): Add fur_source. + (gori_compute::compute_operand_range): Add fur_source param, inline + old compute_name_range_op and optimize_logical_operands. + (struct tf_range): Delete. + (gori_compute::logical_combine): Adjust + (gori_compute::optimize_logical_operands): Delete. + (gori_compute::compute_logical_operands_in_chain): Delete. + (gori_compute::compute_logical_operands): Adjust. + (gori_compute::compute_operand1_range): Adjust to fur_source. + (gori_compute::compute_operand2_range): Ditto. + (gori_compute::compute_operand1_and_operand2_range): Ditto. + (gori_compute::outgoing_edge_range_p): Add range_query parameter, + and adjust to fur_source. + * gimple-range-gori.h (class gori_compute): Simplify and adjust to + range_query and fur_source. + * gimple-range.cc (gimple_ranger::range_on_edge): Query range_on_edge + from the ranger_cache.. + (gimple_ranger::fold_range_internal): Adjust to base class change of + ranger_cache. + (gimple_ranger::dump_bb): Adjust dump. + * gimple-range.h (gimple_ranger):export gori computes object. + +2021-06-01 Andrew MacLeod <amacleod(a)redhat.com> + + PR tree-optimization/100774 + * gimple-range-cache.cc (ranger_cache::get_non_stale_global_range): + Constant values are also not stale. + (ranger_cache::set_global_range): Range invariant values should also + have the correct timestamp. + 2021-05-31 Martin Liska <mliska(a)suse.cz> * tree-streamer-in.c (unpack_ts_function_decl_value_fields): diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 6b43bb2aa0c..54b764ae94c 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20210601 +20210602 diff --git a/gcc/c-family/ChangeLog b/gcc/c-family/ChangeLog index e85a6bf2f75..cb2757c0b32 100644 --- a/gcc/c-family/ChangeLog +++ b/gcc/c-family/ChangeLog @@ -1,3 +1,12 @@ +2021-06-01 Martin Liska <mliska(a)suse.cz> + + PR other/100759 + * c-attribs.c (handle_optimize_attribute): Limit sanity check + to a situation where we are not in processing of an optimize + pragma. + * c-pragma.c (handle_pragma_pop_options): Restore target + options. + 2021-05-31 Indu Bhagat <indu.bhagat(a)oracle.com> PR testsuite/100749 diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog index c764713465c..9a5fa7990f7 100644 --- a/gcc/cp/ChangeLog +++ b/gcc/cp/ChangeLog @@ -1,3 +1,22 @@ +2021-06-01 Patrick Palka <ppalka(a)redhat.com> + + PR c++/65816 + * init.c (expand_aggr_init_1): Check + type_has_non_user_provided_default_constructor instead of + type_has_user_provided_constructor. + +2021-06-01 Jason Merrill <jason(a)redhat.com> + + PR c++/91859 + * call.c (build_op_delete_call): Don't set CALL_FROM_NEW_OR_DELETE_P + for destroying delete. + * init.c (build_delete): Don't clobber before destroying delete. + +2021-06-01 Jason Merrill <jason(a)redhat.com> + + PR c++/94492 + * decl2.c (cp_warn_deprecated_use): Check warning_enabled_at. + 2021-05-31 Richard Biener <rguenther(a)suse.de> PR c++/88601 diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog index 95857ccfa8c..bab25eb7351 100644 --- a/gcc/fortran/ChangeLog +++ b/gcc/fortran/ChangeLog @@ -1,3 +1,41 @@ +2021-06-01 Tobias Burnus <tobias(a)codesourcery.com> + + PR middle-end/99928 + * dump-parse-tree.c (show_omp_node, show_code_node): Handle + (parallel) master taskloop (simd). + * frontend-passes.c (gfc_code_walker): Set in_omp_workshare + to false for parallel master taskloop (simd). + * gfortran.h (enum gfc_statement): + Add ST_OMP_(END_)(PARALLEL_)MASTER_TASKLOOP(_SIMD). + (enum gfc_exec_op): EXEC_OMP_(PARALLEL_)MASTER_TASKLOOP(_SIMD). + * match.h (gfc_match_omp_master_taskloop, + gfc_match_omp_master_taskloop_simd, + gfc_match_omp_parallel_master_taskloop, + gfc_match_omp_parallel_master_taskloop_simd): New prototype. + * openmp.c (gfc_match_omp_parallel_master_taskloop, + gfc_match_omp_parallel_master_taskloop_simd, + gfc_match_omp_master_taskloop, + gfc_match_omp_master_taskloop_simd): New. + (gfc_match_omp_taskloop_simd): Permit 'reduction' clause. + (resolve_omp_clauses): Handle new combined directives; remove + inscan-reduction check to reduce multiple errors; add + task-reduction error for 'taskloop simd'. + (gfc_resolve_omp_parallel_blocks, + resolve_omp_do, omp_code_to_statement, + gfc_resolve_omp_directive): Handle new combined constructs. + * parse.c (decode_omp_directive, next_statement, + gfc_ascii_statement, parse_omp_do, parse_omp_structured_block, + parse_executable): Likewise. + * resolve.c (gfc_resolve_blocks, gfc_resolve_code): Likewise. + * st.c (gfc_free_statement): Likewise. + * trans.c (trans_code): Likewise. + * trans-openmp.c (gfc_split_omp_clauses, + gfc_trans_omp_directive): Likewise. + (gfc_trans_omp_parallel_master): Move after gfc_trans_omp_master_taskloop; + handle parallel master taskloop (simd) as well. + (gfc_trans_omp_taskloop): Take gfc_exec_op as arg. + (gfc_trans_omp_master_taskloop): New. + 2021-05-30 Gerald Pfeifer <gerald(a)pfeifer.com> * gfortran.texi (BOZ literal constants): Fix typo. diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index e55bbf28c9b..46dc8147391 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,64 @@ +2021-06-01 Patrick Palka <ppalka(a)redhat.com> + + PR c++/65816 + * g++.dg/cpp0x/constexpr-delegating3.C: New test. + * g++.dg/cpp0x/dc10.C: New test. + * g++.dg/cpp0x/initlist-base4.C: New test. + * g++.dg/cpp2a/constexpr-init22.C: New test. + +2021-06-01 Andrew Pinski <apinski(a)marvell.com> + + PR tree-optimization/95481 + * gcc.dg/tree-ssa/tailcall-10.c: New test. + * gcc.dg/tree-ssa/tailcall-11.c: New test. + * gcc.dg/tree-ssa/tailcall-12.c: New test. + * gcc.dg/tree-ssa/tailcall-13.c: New test. + * gcc.dg/tree-ssa/tailrecursion-8.c: New test. + +2021-06-01 Bill Schmidt <wschmidt(a)linux.ibm.com> + + PR testsuite/100750 + * gcc.target/powerpc/rop-5.c: Require ELFv2 ABI. + +2021-06-01 Jason Merrill <jason(a)redhat.com> + + PR c++/91859 + * g++.dg/cpp2a/destroying-delete5.C: New test. + +2021-06-01 Jason Merrill <jason(a)redhat.com> + + PR c++/94492 + * g++.dg/cpp0x/depr-copy4.C: New test. + +2021-06-01 Aldy Hernandez <aldyh(a)redhat.com> + + * gcc.dg/Wstringop-overflow-55.c: Adjust for global ranges changes. + * gcc.dg/pr80776-1.c: Same. + +2021-06-01 Tobias Burnus <tobias(a)codesourcery.com> + + PR middle-end/99928 + * gfortran.dg/gomp/reduction5.f90: Remove dg-error; the issue is + now diagnosed with less error output. + * gfortran.dg/gomp/scan-1.f90: Likewise. + * gfortran.dg/gomp/pr99928-3.f90: New test. + * gfortran.dg/gomp/taskloop-1.f90: New test. + +2021-06-01 liuhongt <hongtao.liu(a)intel.com> + + PR tree-optimization/98365 + * gcc.target/i386/pr98365.c: New test. + +2021-06-01 Andrew MacLeod <amacleod(a)redhat.com> + + PR tree-optimization/100781 + * gcc.dg/pr100781.c: New. + +2021-06-01 Andrew MacLeod <amacleod(a)redhat.com> + + PR tree-optimization/100774 + * g++.dg/pr100774.C: New. + 2021-05-31 Tobias Burnus <tobias(a)codesourcery.com> * gfortran.dg/gomp/depend-iterator-1.f90: Use dg-do compile. diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog index e50aeb9217a..3fe0a390799 100644 --- a/libstdc++-v3/ChangeLog +++ b/libstdc++-v3/ChangeLog @@ -1,3 +1,41 @@ +2021-06-01 Patrick Palka <ppalka(a)redhat.com> + + PR c++/65816 + * testsuite/23_containers/deque/allocator/default_init.cc, + testsuite/23_containers/forward_list/allocator/default_init.cc, + testsuite/23_containers/list/allocator/default_init.cc, + testsuite/23_containers/map/allocator/default_init.cc, + testsuite/23_containers/set/allocator/default_init.cc, + testsuite/23_containers/vector/allocator/default_init.cc, + testsuite/23_containers/vector/bool/allocator/default_init.cc: + Remove xfail. + +2021-06-01 Jonathan Wakely <jwakely(a)redhat.com> + + * testsuite/23_containers/unordered_map/96088.cc: Change + effective target to c++17. + * testsuite/23_containers/unordered_set/96088.cc: Likewise. + +2021-06-01 Jonathan Wakely <jwakely(a)redhat.com> + + * testsuite/22_locale/ctype/is/string/89728_neg.cc: Only test + isblank for C++11 and later. + +2021-06-01 Jonathan Wakely <jwakely(a)redhat.com> + + PR libstdc++/100833 + * include/bits/ranges_base.h (ranges::advance(iter, n, sentinel)): + Fix return value for no-op case. + * testsuite/24_iterators/range_operations/advance.cc: Test + return values of three-argument overload. + +2021-06-01 Jonathan Wakely <jwakely(a)redhat.com> + + PR libstdc++/99453 + * python/Makefile.am: Use archive name for printer hook if no + dynamic library name is available. + * python/Makefile.in: Regenerate. + 2021-05-30 Gerald Pfeifer <gerald(a)pfeifer.com> * doc/xml/manual/abi.xml: Remove dead reference to "Intel </cut>

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[TCWG CI] Regression caused by gcc: Correct handling of variable offset minus constant in -Warray-bounds [PR100137]

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[TCWG CI] Regression caused by gcc: Correct handling of variable offset minus constant in -Warray-bounds [PR100137]: commit a110855667782dac7b674d3e328b253b3b3c919b Author: Martin Sebor <msebor(a)redhat.com> Correct handling of variable offset minus constant in -Warray-bounds [PR100137] Results regressed to # reset_artifacts: -10 # build_abe binutils: -9 # build_abe stage1: -5 # build_abe qemu: -2 # linux_n_obj: 20477 # First few build errors in logs: # 00:03:37 ./include/asm-generic/rwonce.h:44:26: error: array subscript 1 is outside array bounds of ‘struct page[0]’ [-Werror=array-bounds] # 00:03:37 make[2]: *** [arch/arm64/mm/flush.o] Error 1 # 00:03:37 ./include/asm-generic/rwonce.h:44:26: error: array subscript 1 is outside array bounds of ‘struct page[0]’ [-Werror=array-bounds] # 00:03:37 ./include/asm-generic/rwonce.h:44:26: error: array subscript 1 is outside array bounds of ‘struct page[0]’ [-Werror=array-bounds] # 00:03:37 ./include/asm-generic/rwonce.h:44:26: error: array subscript 1 is outside array bounds of ‘struct page[0]’ [-Werror=array-bounds] # 00:03:37 ./include/asm-generic/rwonce.h:44:26: error: array subscript 1 is outside array bounds of ‘struct page[0]’ [-Werror=array-bounds] # 00:03:37 ./include/asm-generic/rwonce.h:44:26: error: array subscript 0 is outside array bounds of ‘struct page[0]’ [-Werror=array-bounds] # 00:03:37 ./include/asm-generic/bitops/non-atomic.h:118:27: error: array subscript 0 is outside array bounds of ‘struct page[0]’ [-Werror=array-bounds] # 00:03:37 ./include/linux/mm.h:683:23: error: array subscript 1 is outside array bounds of ‘struct page[0]’ [-Werror=array-bounds] # 00:03:37 ./include/asm-generic/rwonce.h:44:26: error: array subscript 1 is outside array bounds of ‘struct page[0]’ [-Werror=array-bounds] from # reset_artifacts: -10 # build_abe binutils: -9 # build_abe stage1: -5 # build_abe qemu: -2 # linux_n_obj: 20799 # linux build successful: all THIS IS THE END OF INTERESTING STUFF. BELOW ARE LINKS TO BUILDS, REPRODUCTION INSTRUCTIONS, AND THE RAW COMMIT. This commit has regressed these CI configurations: - tcwg_kernel/gnu-release-aarch64-mainline-allyesconfig First_bad build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-mainli… Last_good build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-mainli… Baseline build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-mainli… Even more details: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-mainli… Reproduce builds: <cut> mkdir investigate-gcc-a110855667782dac7b674d3e328b253b3b3c919b cd investigate-gcc-a110855667782dac7b674d3e328b253b3b3c919b # Fetch scripts git clone https://git.linaro.org/toolchain/jenkins-scripts # Fetch manifests and test.sh script mkdir -p artifacts/manifests curl -o artifacts/manifests/build-baseline.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-mainli… --fail curl -o artifacts/manifests/build-parameters.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-mainli… --fail curl -o artifacts/test.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-mainli… --fail chmod +x artifacts/test.sh # Reproduce the baseline build (build all pre-requisites) ./jenkins-scripts/tcwg_kernel-build.sh @@ artifacts/manifests/build-baseline.sh # Save baseline build state (which is then restored in artifacts/test.sh) mkdir -p ./bisect rsync -a --del --delete-excluded --exclude /bisect/ --exclude /artifacts/ --exclude /gcc/ ./ ./bisect/baseline/ cd gcc # Reproduce first_bad build git checkout --detach a110855667782dac7b674d3e328b253b3b3c919b ../artifacts/test.sh # Reproduce last_good build git checkout --detach 6278065af07634278ba30029d92a82b089969baa ../artifacts/test.sh cd .. </cut> Full commit (up to 1000 lines): <cut> commit a110855667782dac7b674d3e328b253b3b3c919b Author: Martin Sebor <msebor(a)redhat.com> Date: Wed Jul 7 14:05:25 2021 -0600 Correct handling of variable offset minus constant in -Warray-bounds [PR100137] Resolves: PR tree-optimization/100137 - -Warray-bounds false positive on varying offset plus negative PR tree-optimization/99121 - ICE in -Warray-bounds on a multidimensional PR tree-optimization/97027 - missing warning on buffer overflow storing a larger scalar into a smaller array gcc/ChangeLog: PR tree-optimization/100137 PR tree-optimization/99121 PR tree-optimization/97027 * builtins.c (access_ref::access_ref): Also set offmax. (access_ref::offset_in_range): Define new function. (access_ref::add_offset): Set offmax. (access_ref::inform_access): Handle access_none. (handle_mem_ref): Clear ostype. (compute_objsize_r): Handle ASSERT_EXPR. * builtins.h (struct access_ref): Add offmax member. * gimple-array-bounds.cc (array_bounds_checker::check_mem_ref): Use compute_objsize() and simplify. gcc/testsuite/ChangeLog: PR tree-optimization/100137 PR tree-optimization/99121 PR tree-optimization/97027 * c-c++-common/Warray-bounds-3.c: Remove xfail * c-c++-common/Warray-bounds-4.c: Add an expected warning. * c-c++-common/Warray-bounds-9.c: New test. * c-c++-common/Warray-bounds-10.c: New test. * g++.dg/asan/asan_test.C: Suppress expected warnings. * g++.dg/pr95768.C: Same. * g++.dg/warn/Warray-bounds-10.C: Adjust text of expected messages. * g++.dg/warn/Warray-bounds-11.C: Same. * g++.dg/warn/Warray-bounds-12.C: Same. * g++.dg/warn/Warray-bounds-13.C: Same. * g++.dg/warn/Warray-bounds-17.C: Same. * g++.dg/warn/Warray-bounds-20.C: Same. * gcc.dg/Warray-bounds-29.c: Same. * gcc.dg/Warray-bounds-30.c: Add xfail. * gcc.dg/Warray-bounds-31.c: Adjust text of expected messages. * gcc.dg/Warray-bounds-32.c: Same. * gcc.dg/Warray-bounds-52.c: Same. * gcc.dg/Warray-bounds-53.c: Same. * gcc.dg/Warray-bounds-58.c: Remove xfail. * gcc.dg/Warray-bounds-63.c: Adjust text of expected messages. * gcc.dg/Warray-bounds-66.c: Same. * gcc.dg/Warray-bounds-69.c: Same. * gcc.dg/Wstringop-overflow-34.c: Same. * gcc.dg/Wstringop-overflow-47.c: Same. * gcc.dg/Wstringop-overflow-61.c: Same. * gcc.dg/Warray-bounds-77.c: New test. * gcc.dg/Warray-bounds-78.c: New test. * gcc.dg/Warray-bounds-79.c: New test. --- gcc/builtins.c | 69 +++++- gcc/builtins.h | 5 + gcc/gimple-array-bounds.cc | 336 ++++---------------------- gcc/testsuite/c-c++-common/Warray-bounds-10.c | 114 +++++++++ gcc/testsuite/c-c++-common/Warray-bounds-3.c | 4 +- gcc/testsuite/c-c++-common/Warray-bounds-4.c | 12 +- gcc/testsuite/c-c++-common/Warray-bounds-9.c | 144 +++++++++++ gcc/testsuite/g++.dg/asan/asan_test.C | 2 +- gcc/testsuite/g++.dg/pr95768.C | 2 +- gcc/testsuite/g++.dg/warn/Warray-bounds-10.C | 4 +- gcc/testsuite/g++.dg/warn/Warray-bounds-11.C | 4 +- gcc/testsuite/g++.dg/warn/Warray-bounds-12.C | 4 +- gcc/testsuite/g++.dg/warn/Warray-bounds-13.C | 4 +- gcc/testsuite/g++.dg/warn/Warray-bounds-17.C | 2 +- gcc/testsuite/g++.dg/warn/Warray-bounds-20.C | 8 +- gcc/testsuite/gcc.dg/Warray-bounds-29.c | 22 +- gcc/testsuite/gcc.dg/Warray-bounds-30.c | 2 +- gcc/testsuite/gcc.dg/Warray-bounds-31.c | 8 +- gcc/testsuite/gcc.dg/Warray-bounds-32.c | 26 +- gcc/testsuite/gcc.dg/Warray-bounds-52.c | 6 +- gcc/testsuite/gcc.dg/Warray-bounds-53.c | 6 +- gcc/testsuite/gcc.dg/Warray-bounds-58.c | 2 +- gcc/testsuite/gcc.dg/Warray-bounds-63.c | 6 +- gcc/testsuite/gcc.dg/Warray-bounds-66.c | 12 +- gcc/testsuite/gcc.dg/Warray-bounds-69.c | 2 +- gcc/testsuite/gcc.dg/Warray-bounds-77.c | 135 +++++++++++ gcc/testsuite/gcc.dg/Warray-bounds-78.c | 109 +++++++++ gcc/testsuite/gcc.dg/Warray-bounds-79.c | 112 +++++++++ gcc/testsuite/gcc.dg/Wstringop-overflow-34.c | 8 +- gcc/testsuite/gcc.dg/Wstringop-overflow-47.c | 14 +- gcc/testsuite/gcc.dg/Wstringop-overflow-61.c | 4 +- 31 files changed, 817 insertions(+), 371 deletions(-) diff --git a/gcc/builtins.c b/gcc/builtins.c index e52fe4291c8..39ab139b7e1 100644 --- a/gcc/builtins.c +++ b/gcc/builtins.c @@ -206,6 +206,7 @@ access_ref::access_ref (tree bound /* = NULL_TREE */, { /* Set to valid. */ offrng[0] = offrng[1] = 0; + offmax[0] = offmax[1] = 0; /* Invalidate. */ sizrng[0] = sizrng[1] = -1; @@ -457,6 +458,21 @@ access_ref::size_remaining (offset_int *pmin /* = NULL */) const return sizrng[1] - or0; } +/* Return true if the offset and object size are in range for SIZE. */ + +bool +access_ref::offset_in_range (const offset_int &size) const +{ + if (size_remaining () < size) + return false; + + if (base0) + return offmax[0] >= 0 && offmax[1] <= sizrng[1]; + + offset_int maxoff = wi::to_offset (TYPE_MAX_VALUE (ptrdiff_type_node)); + return offmax[0] > -maxoff && offmax[1] < maxoff; +} + /* Add the range [MIN, MAX] to the offset range. For known objects (with zero-based offsets) at least one of whose offset's bounds is in range, constrain the other (or both) to the bounds of the object (i.e., zero @@ -493,6 +509,8 @@ void access_ref::add_offset (const offset_int &min, const offset_int &max) if (max >= 0) { offrng[0] = 0; + if (offmax[0] > 0) + offmax[0] = 0; return; } @@ -509,6 +527,12 @@ void access_ref::add_offset (const offset_int &min, const offset_int &max) offrng[0] = 0; } + /* Set the minimum and maximmum computed so far. */ + if (offrng[1] < 0 && offrng[1] < offmax[0]) + offmax[0] = offrng[1]; + if (offrng[0] > 0 && offrng[0] > offmax[1]) + offmax[1] = offrng[0]; + if (!base0) return; @@ -4571,23 +4595,46 @@ access_ref::inform_access (access_mode mode) const return; } + if (mode == access_read_only) + { + if (allocfn == NULL_TREE) + { + if (*offstr) + inform (loc, "at offset %s into source object %qE of size %s", + offstr, ref, sizestr); + else + inform (loc, "source object %qE of size %s", ref, sizestr); + + return; + } + + if (*offstr) + inform (loc, + "at offset %s into source object of size %s allocated by %qE", + offstr, sizestr, allocfn); + else + inform (loc, "source object of size %s allocated by %qE", + sizestr, allocfn); + return; + } + if (allocfn == NULL_TREE) { if (*offstr) - inform (loc, "at offset %s into source object %qE of size %s", + inform (loc, "at offset %s into object %qE of size %s", offstr, ref, sizestr); else - inform (loc, "source object %qE of size %s", ref, sizestr); + inform (loc, "object %qE of size %s", ref, sizestr); return; } if (*offstr) inform (loc, - "at offset %s into source object of size %s allocated by %qE", + "at offset %s into object of size %s allocated by %qE", offstr, sizestr, allocfn); else - inform (loc, "source object of size %s allocated by %qE", + inform (loc, "object of size %s allocated by %qE", sizestr, allocfn); } @@ -5433,16 +5480,16 @@ handle_mem_ref (tree mref, int ostype, access_ref *pref, if (VECTOR_TYPE_P (TREE_TYPE (mref))) { - /* Hack: Give up for MEM_REFs of vector types; those may be - synthesized from multiple assignments to consecutive data - members (see PR 93200 and 96963). + /* Hack: Handle MEM_REFs of vector types as those to complete + objects; those may be synthesized from multiple assignments + to consecutive data members (see PR 93200 and 96963). FIXME: Vectorized assignments should only be present after vectorization so this hack is only necessary after it has run and could be avoided in calls from prior passes (e.g., tree-ssa-strlen.c). FIXME: Deal with this more generally, e.g., by marking up such MEM_REFs at the time they're created. */ - return false; + ostype = 0; } tree mrefop = TREE_OPERAND (mref, 0); @@ -5796,6 +5843,12 @@ compute_objsize_r (tree ptr, int ostype, access_ref *pref, tree rhs = gimple_assign_rhs1 (stmt); + if (code == ASSERT_EXPR) + { + rhs = TREE_OPERAND (rhs, 0); + return compute_objsize_r (rhs, ostype, pref, snlim, qry); + } + if (code == POINTER_PLUS_EXPR && TREE_CODE (TREE_TYPE (rhs)) == POINTER_TYPE) { diff --git a/gcc/builtins.h b/gcc/builtins.h index e71f40c300a..a64ece3f1cd 100644 --- a/gcc/builtins.h +++ b/gcc/builtins.h @@ -222,6 +222,9 @@ struct access_ref argument to the minimum. */ offset_int size_remaining (offset_int * = NULL) const; +/* Return true if the offset and object size are in range for SIZE. */ + bool offset_in_range (const offset_int &) const; + /* Return true if *THIS is an access to a declared object. */ bool ref_declared () const { @@ -261,6 +264,8 @@ struct access_ref /* Range of byte offsets into and sizes of the object(s). */ offset_int offrng[2]; offset_int sizrng[2]; + /* The minimum and maximum offset computed. */ + offset_int offmax[2]; /* Range of the bound of the access: denotes that the access is at least BNDRNG[0] bytes but no more than BNDRNG[1]. For string functions the size of the actual access is diff --git a/gcc/gimple-array-bounds.cc b/gcc/gimple-array-bounds.cc index 13f08685f8f..83b8db9755e 100644 --- a/gcc/gimple-array-bounds.cc +++ b/gcc/gimple-array-bounds.cc @@ -414,269 +414,72 @@ array_bounds_checker::check_mem_ref (location_t location, tree ref, if (warning_suppressed_p (ref, OPT_Warray_bounds)) return false; - tree arg = TREE_OPERAND (ref, 0); - /* The constant and variable offset of the reference. */ - tree cstoff = TREE_OPERAND (ref, 1); - tree varoff = NULL_TREE; - - const offset_int maxobjsize = tree_to_shwi (max_object_size ()); - - /* The zero-based array or string constant bounds in bytes. Initially - set to [-MAXOBJSIZE - 1, MAXOBJSIZE] until a tighter bound is - determined. */ - offset_int arrbounds[2] = { -maxobjsize - 1, maxobjsize }; - - /* The minimum and maximum intermediate offset. For a reference - to be valid, not only does the final offset/subscript must be - in bounds but all intermediate offsets should be as well. - GCC may be able to deal gracefully with such out-of-bounds - offsets so the checking is only enabled at -Warray-bounds=2 - where it may help detect bugs in uses of the intermediate - offsets that could otherwise not be detectable. */ - offset_int ioff = wi::to_offset (fold_convert (ptrdiff_type_node, cstoff)); - offset_int extrema[2] = { 0, wi::abs (ioff) }; - - /* The range of the byte offset into the reference. */ - offset_int offrange[2] = { 0, 0 }; - /* The statement used to allocate the array or null. */ gimple *alloc_stmt = NULL; /* For an allocation statement, the low bound of the size range. */ offset_int minbound = 0; + /* The type and size of the access. */ + tree axstype = TREE_TYPE (ref); + offset_int axssize = 0; + if (TREE_CODE (axstype) != UNION_TYPE) + if (tree access_size = TYPE_SIZE_UNIT (axstype)) + if (TREE_CODE (access_size) == INTEGER_CST) + axssize = wi::to_offset (access_size); - /* Determine the offsets and increment OFFRANGE for the bounds of each. - The loop computes the range of the final offset for expressions such - as (A + i0 + ... + iN)[CSTOFF] where i0 through iN are SSA_NAMEs in - some range. */ - const unsigned limit = param_ssa_name_def_chain_limit; - for (unsigned n = 0; TREE_CODE (arg) == SSA_NAME && n < limit; ++n) - { - gimple *def = SSA_NAME_DEF_STMT (arg); - if (is_gimple_call (def)) - { - /* Determine the byte size of the array from an allocation call. */ - wide_int sizrng[2]; - if (gimple_call_alloc_size (def, sizrng)) - { - arrbounds[0] = 0; - arrbounds[1] = offset_int::from (sizrng[1], UNSIGNED); - minbound = offset_int::from (sizrng[0], UNSIGNED); - alloc_stmt = def; - } - break; - } - - if (gimple_nop_p (def)) - { - /* For a function argument try to determine the byte size - of the array from the current function declaratation - (e.g., attribute access or related). */ - wide_int wr[2]; - tree ref = gimple_parm_array_size (arg, wr); - if (!ref) - break; - arrbounds[0] = offset_int::from (wr[0], UNSIGNED); - arrbounds[1] = offset_int::from (wr[1], UNSIGNED); - arg = ref; - break; - } - - if (!is_gimple_assign (def)) - break; - - tree_code code = gimple_assign_rhs_code (def); - if (code == POINTER_PLUS_EXPR) - { - arg = gimple_assign_rhs1 (def); - varoff = gimple_assign_rhs2 (def); - } - else if (code == ASSERT_EXPR) - { - arg = TREE_OPERAND (gimple_assign_rhs1 (def), 0); - continue; - } - else - return false; - - /* VAROFF should always be a SSA_NAME here (and not even - INTEGER_CST) but there's no point in taking chances. */ - if (TREE_CODE (varoff) != SSA_NAME) - break; - - const value_range* const vr = get_value_range (varoff); - if (!vr || vr->undefined_p () || vr->varying_p ()) - break; - - if (!vr->constant_p ()) - break; - - if (vr->kind () == VR_RANGE) - { - offset_int min - = wi::to_offset (fold_convert (ptrdiff_type_node, vr->min ())); - offset_int max - = wi::to_offset (fold_convert (ptrdiff_type_node, vr->max ())); - if (min < max) - { - offrange[0] += min; - offrange[1] += max; - } - else - { - /* When MIN >= MAX, the offset is effectively in a union - of two ranges: [-MAXOBJSIZE -1, MAX] and [MIN, MAXOBJSIZE]. - Since there is no way to represent such a range across - additions, conservatively add [-MAXOBJSIZE -1, MAXOBJSIZE] - to OFFRANGE. */ - offrange[0] += arrbounds[0]; - offrange[1] += arrbounds[1]; - } - } - else - { - /* For an anti-range, analogously to the above, conservatively - add [-MAXOBJSIZE -1, MAXOBJSIZE] to OFFRANGE. */ - offrange[0] += arrbounds[0]; - offrange[1] += arrbounds[1]; - } - - /* Keep track of the minimum and maximum offset. */ - if (offrange[1] < 0 && offrange[1] < extrema[0]) - extrema[0] = offrange[1]; - if (offrange[0] > 0 && offrange[0] > extrema[1]) - extrema[1] = offrange[0]; - - if (offrange[0] < arrbounds[0]) - offrange[0] = arrbounds[0]; - - if (offrange[1] > arrbounds[1]) - offrange[1] = arrbounds[1]; - } + access_ref aref; + if (!compute_objsize (ref, 1, &aref, ranges)) + return false; - tree reftype = NULL_TREE; - offset_int eltsize = -1; - if (arrbounds[0] >= 0) - { - /* The byte size of the array has already been determined above - based on a pointer ARG. Set ELTSIZE to the size of the type - it points to and REFTYPE to the array with the size, rounded - down as necessary. */ - reftype = TREE_TYPE (TREE_TYPE (arg)); - if (TREE_CODE (reftype) == ARRAY_TYPE) - reftype = TREE_TYPE (reftype); - if (tree refsize = TYPE_SIZE_UNIT (reftype)) - if (TREE_CODE (refsize) == INTEGER_CST) - eltsize = wi::to_offset (refsize); - - if (eltsize < 0) - return false; + if (aref.offset_in_range (axssize)) + return false; - offset_int nelts = arrbounds[1] / eltsize; - reftype = build_printable_array_type (reftype, nelts.to_uhwi ()); - } - else if (TREE_CODE (arg) == ADDR_EXPR) + if (TREE_CODE (aref.ref) == SSA_NAME) { - arg = TREE_OPERAND (arg, 0); - if (TREE_CODE (arg) != STRING_CST - && TREE_CODE (arg) != PARM_DECL - && TREE_CODE (arg) != VAR_DECL) - return false; - - /* The type of the object being referred to. It can be an array, - string literal, or a non-array type when the MEM_REF represents - a reference/subscript via a pointer to an object that is not - an element of an array. Incomplete types are excluded as well - because their size is not known. */ - reftype = TREE_TYPE (arg); - if (POINTER_TYPE_P (reftype) - || !COMPLETE_TYPE_P (reftype) - || TREE_CODE (TYPE_SIZE_UNIT (reftype)) != INTEGER_CST) - return false; - - /* Except in declared objects, references to trailing array members - of structs and union objects are excluded because MEM_REF doesn't - make it possible to identify the member where the reference - originated. */ - if (RECORD_OR_UNION_TYPE_P (reftype) - && (!VAR_P (arg) - || (DECL_EXTERNAL (arg) && array_at_struct_end_p (ref)))) - return false; - - /* FIXME: Should this be 1 for Fortran? */ - arrbounds[0] = 0; - - if (TREE_CODE (reftype) == ARRAY_TYPE) - { - /* Set to the size of the array element (and adjust below). */ - eltsize = wi::to_offset (TYPE_SIZE_UNIT (TREE_TYPE (reftype))); - /* Use log2 of size to convert the array byte size in to its - upper bound in elements. */ - const offset_int eltsizelog2 = wi::floor_log2 (eltsize); - if (tree dom = TYPE_DOMAIN (reftype)) - { - tree bnds[] = { TYPE_MIN_VALUE (dom), TYPE_MAX_VALUE (dom) }; - if (TREE_CODE (arg) == COMPONENT_REF) - { - offset_int size = maxobjsize; - if (tree fldsize = component_ref_size (arg)) - size = wi::to_offset (fldsize); - arrbounds[1] = wi::lrshift (size, eltsizelog2); - } - else if (array_at_struct_end_p (arg) || !bnds[0] || !bnds[1]) - arrbounds[1] = wi::lrshift (maxobjsize, eltsizelog2); - else - arrbounds[1] = (wi::to_offset (bnds[1]) - wi::to_offset (bnds[0]) - + 1) * eltsize; - } - else - arrbounds[1] = wi::lrshift (maxobjsize, eltsizelog2); - - /* Determine a tighter bound of the non-array element type. */ - tree eltype = TREE_TYPE (reftype); - while (TREE_CODE (eltype) == ARRAY_TYPE) - eltype = TREE_TYPE (eltype); - eltsize = wi::to_offset (TYPE_SIZE_UNIT (eltype)); - } - else + gimple *def = SSA_NAME_DEF_STMT (aref.ref); + if (is_gimple_call (def)) { - eltsize = 1; - tree size = TYPE_SIZE_UNIT (reftype); - if (VAR_P (arg)) - if (tree initsize = DECL_SIZE_UNIT (arg)) - if (tree_int_cst_lt (size, initsize)) - size = initsize; - - arrbounds[1] = wi::to_offset (size); + /* Save the allocation call and the low bound on the size. */ + alloc_stmt = def; + minbound = aref.sizrng[0]; } } - else - return false; - - offrange[0] += ioff; - offrange[1] += ioff; + + /* The range of the byte offset into the reference. Adjusted below. */ + offset_int offrange[2] = { aref.offrng[0], aref.offrng[1] }; + + /* The type of the referenced object. */ + tree reftype = TREE_TYPE (aref.ref); + /* The size of the referenced array element. */ + offset_int eltsize = 1; + /* The byte size of the array has already been determined above + based on a pointer ARG. Set ELTSIZE to the size of the type + it points to and REFTYPE to the array with the size, rounded + down as necessary. */ + if (POINTER_TYPE_P (reftype)) + reftype = TREE_TYPE (reftype); + if (TREE_CODE (reftype) == ARRAY_TYPE) + reftype = TREE_TYPE (reftype); + if (tree refsize = TYPE_SIZE_UNIT (reftype)) + if (TREE_CODE (refsize) == INTEGER_CST) + eltsize = wi::to_offset (refsize); + + const offset_int nelts = aref.sizrng[1] / eltsize; + reftype = build_printable_array_type (reftype, nelts.to_uhwi ()); /* Compute the more permissive upper bound when IGNORE_OFF_BY_ONE is set (when taking the address of the one-past-last element of an array) but always use the stricter bound in diagnostics. */ - offset_int ubound = arrbounds[1]; + offset_int ubound = aref.sizrng[1]; if (ignore_off_by_one) ubound += eltsize; - bool warned = false; /* Set if the lower bound of the subscript is out of bounds. */ - const bool lboob = (arrbounds[0] == arrbounds[1] + const bool lboob = (aref.sizrng[1] == 0 || offrange[0] >= ubound - || offrange[1] < arrbounds[0]); + || offrange[1] < 0); /* Set if only the upper bound of the subscript is out of bounds. This can happen when using a bigger type to index into an array of a smaller type, as is common with unsigned char. */ - tree axstype = TREE_TYPE (ref); - offset_int axssize = 0; - if (TREE_CODE (axstype) != UNION_TYPE) - if (tree access_size = TYPE_SIZE_UNIT (axstype)) - if (TREE_CODE (access_size) == INTEGER_CST) - axssize = wi::to_offset (access_size); - const bool uboob = !lboob && offrange[0] + axssize > ubound; if (lboob || uboob) { @@ -689,9 +492,7 @@ array_bounds_checker::check_mem_ref (location_t location, tree ref, to compute the index to print in the diagnostic; arrays in MEM_REF don't mean anything. A type with no size like void is as good as having a size of 1. */ - tree type = TREE_TYPE (ref); - while (TREE_CODE (type) == ARRAY_TYPE) - type = TREE_TYPE (type); + tree type = strip_array_types (TREE_TYPE (ref)); if (tree size = TYPE_SIZE_UNIT (type)) { offrange[0] = offrange[0] / wi::to_offset (size); @@ -699,6 +500,7 @@ array_bounds_checker::check_mem_ref (location_t location, tree ref, } } + bool warned = false; if (lboob) { if (offrange[0] == offrange[1]) @@ -720,7 +522,7 @@ array_bounds_checker::check_mem_ref (location_t location, tree ref, /* If the memory was dynamically allocated refer to it as if it were an untyped array of bytes. */ backtype = build_array_type_nelts (unsigned_char_type_node, - arrbounds[1].to_uhwi ()); + aref.sizrng[1].to_uhwi ()); warned = warning_at (location, OPT_Warray_bounds, "array subscript %<%T[%wi]%> is partly " @@ -730,46 +532,8 @@ array_bounds_checker::check_mem_ref (location_t location, tree ref, if (warned) { - if (DECL_P (arg)) - inform (DECL_SOURCE_LOCATION (arg), "while referencing %qD", arg); - else if (alloc_stmt) - { - location_t loc = gimple_location (alloc_stmt); - if (gimple_call_builtin_p (alloc_stmt, BUILT_IN_ALLOCA_WITH_ALIGN)) - { - if (minbound == arrbounds[1]) - inform (loc, "referencing a variable length array " - "of size %wu", minbound.to_uhwi ()); - else - inform (loc, "referencing a variable length array " - "of size between %wu and %wu", - minbound.to_uhwi (), arrbounds[1].to_uhwi ()); - } - else if (tree fndecl = gimple_call_fndecl (alloc_stmt)) - { - if (minbound == arrbounds[1]) - inform (loc, "referencing an object of size %wu " - "allocated by %qD", - minbound.to_uhwi (), fndecl); - else - inform (loc, "referencing an object of size between " - "%wu and %wu allocated by %qD", - minbound.to_uhwi (), arrbounds[1].to_uhwi (), fndecl); - } - else - { - tree fntype = gimple_call_fntype (alloc_stmt); - if (minbound == arrbounds[1]) - inform (loc, "referencing an object of size %wu " - "allocated by %qT", - minbound.to_uhwi (), fntype); - else - inform (loc, "referencing an object of size between " - "%wu and %wu allocated by %qT", - minbound.to_uhwi (), arrbounds[1].to_uhwi (), fntype); - } - } - + /* TODO: Determine the access from the statement and use it. */ + aref.inform_access (access_none); suppress_warning (ref, OPT_Warray_bounds); return true; } @@ -779,9 +543,9 @@ array_bounds_checker::check_mem_ref (location_t location, tree ref, /* At level 2 check also intermediate offsets. */ int i = 0; - if (extrema[i] < -arrbounds[1] || extrema[i = 1] > ubound) + if (aref.offmax[i] < -aref.sizrng[1] || aref.offmax[i = 1] > ubound) { - HOST_WIDE_INT tmpidx = extrema[i].to_shwi () / eltsize.to_shwi (); + HOST_WIDE_INT tmpidx = aref.offmax[i].to_shwi () / eltsize.to_shwi (); if (warning_at (location, OPT_Warray_bounds, "intermediate array offset %wi is outside array bounds " diff --git a/gcc/testsuite/c-c++-common/Warray-bounds-10.c b/gcc/testsuite/c-c++-common/Warray-bounds-10.c new file mode 100644 index 00000000000..cfe9a383410 --- /dev/null +++ b/gcc/testsuite/c-c++-common/Warray-bounds-10.c @@ -0,0 +1,114 @@ +/* PR tree-optimization/99475 - bogus -Warray-bounds accessing an array + element of empty structs + { dg-do compile } + { dg-options "-O2 -Wall" } */ + +struct S +{ +#if SOME_CONFIG_MACRO + /* Suppose the contents are empty in the development configuration + but non-empty in others. Out of bounds accesses to elements of + the arrays below should be diagnosed in all configurations, + including when S is empty, even if they are folded away. */ + int member; +#endif +}; + +extern struct S sa3[3]; +extern struct S sa2_3[2][3]; +extern struct S sa3_4_5[3][4][5]; + +void sink (void*); + + +void access_sa3 (struct S s) +{ + sa3[0] = s; + sa3[1] = s; + sa3[2] = s; + sa3[3] = s; // { dg-warning "\\\[-Warray-bounds" "pr?????" { xfail *-*-* } } +} + +void access_sa3_ptr (struct S s) +{ + struct S *p = &sa3[0]; + + p[0] = s; // { dg-bogus "\\\[-Warray-bounds" } + p[1] = s; // { dg-bogus "\\\[-Warray-bounds" } + p[2] = s; // { dg-bogus "\\\[-Warray-bounds" } + p[3] = s; // { dg-warning "\\\[-Warray-bounds" "pr?????" { xfail *-*-* } } +} + +void access_sa2_3_ptr (struct S s) +{ + struct S *p = &sa2_3[0][0]; + + p[0] = s; // { dg-bogus "\\\[-Warray-bounds" } + p[1] = s; // { dg-bogus "\\\[-Warray-bounds" } + p[2] = s; // { dg-bogus "\\\[-Warray-bounds" } + p[6] = s; // { dg-warning "\\\[-Warray-bounds" "pr?????" { xfail *-*-* } } +} + +void access_sa3_4_5_ptr (struct S s, int i) +{ + struct S *p = &sa3_4_5[0][0][0]; + + p[0] = s; // { dg-bogus "\\\[-Warray-bounds" } + p[1] = s; // { dg-bogus "\\\[-Warray-bounds" } + p[2] = s; // { dg-bogus "\\\[-Warray-bounds" } + p[60] = s; // { dg-warning "\\\[-Warray-bounds" "pr?????" { xfail *-*-* } } +} + + +void access_vla3 (struct S s, unsigned n) +{ + struct S vla3[3 < n ? 3 : n]; + + vla3[0] = s; + vla3[1] = s; + vla3[2] = s; + vla3[3] = s; // { dg-warning "\\\[-Warray-bounds" "pr?????" { xfail *-*-* } } + + sink (vla3); +} + +void access_vla3_ptr (struct S s, unsigned n) +{ + struct S vla3[3 < n ? 3 : n]; + struct S *p = &vla3[0]; + + p[0] = s; // { dg-bogus "\\\[-Warray-bounds" } + p[1] = s; // { dg-bogus "\\\[-Warray-bounds" } + p[2] = s; // { dg-bogus "\\\[-Warray-bounds" } + p[3] = s; // { dg-warning "\\\[-Warray-bounds" "pr?????" { xfail *-*-* } } + + sink (vla3); +} + +void access_vla2_3_ptr (struct S s, unsigned n) +{ + struct S vla2_3[2 < n ? 2 : n][3 < n ? 3 : n]; + struct S *p = &vla2_3[0][0]; + + p[0] = s; // { dg-bogus "\\\[-Warray-bounds" } + p[1] = s; // { dg-bogus "\\\[-Warray-bounds" } + p[2] = s; // { dg-bogus "\\\[-Warray-bounds" } + p[6] = s; // { dg-warning "\\\[-Warray-bounds" "pr?????" { xfail *-*-* } } + + sink (vla2_3); +} + +void access_vla3_4_5_ptr (struct S s, unsigned n) +{ + struct S vla3_4_5[3 < n ? 3 : n][4 < n ? 4 : n][5 < n ? 5 : n]; + struct S *p = &vla3_4_5[0][0][0]; + + p[0] = s; // { dg-bogus "\\\[-Warray-bounds" } + p[1] = s; // { dg-bogus "\\\[-Warray-bounds" } + p[2] = s; // { dg-bogus "\\\[-Warray-bounds" } + p[60] = s; // { dg-warning "\\\[-Warray-bounds" "pr?????" { xfail *-*-* } } + + sink (vla3_4_5); +} + +// { dg-prune-output "empty struct has size 0 in C" } diff --git a/gcc/testsuite/c-c++-common/Warray-bounds-3.c b/gcc/testsuite/c-c++-common/Warray-bounds-3.c index aae4999ea13..3d7c7687374 100644 --- a/gcc/testsuite/c-c++-common/Warray-bounds-3.c +++ b/gcc/testsuite/c-c++-common/Warray-bounds-3.c @@ -158,7 +158,7 @@ void test_memcpy_overflow (char *d, const char *s, size_t n) but known access size is detected. This works except with small sizes that are powers of 2 due to bug . */ T (char, 1, arr + SR (DIFF_MAX - 1, DIFF_MAX), s, 1); - T (char, 1, arr + SR (DIFF_MAX - 1, DIFF_MAX), s, 2); /* { dg-warning "pointer overflow between offset \\\[\[0-9\]+, \[0-9\]+] and size 2 accessing array " "bug " { xfail non_strict_align } } */ + T (char, 1, arr + SR (DIFF_MAX - 1, DIFF_MAX), s, 2); /* { dg-warning "\\\[-Warray-bounds" } */ T (char, 1, arr + SR (DIFF_MAX - 2, DIFF_MAX), s, 3); /* { dg-warning "pointer overflow between offset \\\[\[0-9\]+, \[0-9\]+] and size 3 accessing array " "memcpy" } */ T (char, 1, arr + SR (DIFF_MAX - 4, DIFF_MAX), s, 5); /* { dg-warning "pointer overflow between offset \\\[\[0-9\]+, \[0-9\]+] and size 5 accessing array " "memcpy" } */ } @@ -178,7 +178,7 @@ void test_memcpy_bounds_memarray_range (void) TM (ma.a5, ma.a5 + i, ma.a5, 1); TM (ma.a5, ma.a5 + i, ma.a5, 3); - TM (ma.a5, ma.a5 + i, ma.a5, 5); + TM (ma.a5, ma.a5 + i, ma.a5, 5); /* { dg-warning "\\\[-Warray-bounds" } */ TM (ma.a5, ma.a5 + i, ma.a5, 7); /* diagnosed with -Warray-bounds=2 */ } diff --git a/gcc/testsuite/c-c++-common/Warray-bounds-4.c b/gcc/testsuite/c-c++-common/Warray-bounds-4.c index 22a23a12651..1f73f11943f 100644 --- a/gcc/testsuite/c-c++-common/Warray-bounds-4.c +++ b/gcc/testsuite/c-c++-common/Warray-bounds-4.c @@ -43,7 +43,17 @@ void test_memcpy_bounds_memarray_range (void) TM (ma.a5, ma.a5 + j, ma.a5, 1); TM (ma.a5, ma.a5 + j, ma.a5, 3); - TM (ma.a5, ma.a5 + j, ma.a5, 5); + + /* The copy below is invalid for two reasons: 1) it overlaps and 2) it + writes past the end of ma.a5. The warning is a little cryptic here + because the GIMPLE is: + _4 = &ma.a5 + prephitmp_14; + MEM <unsigned char[5]> [(char * {ref-all})_4] + = MEM <unsigned char[5]> [(char * {ref-all})&ma]; + and could be improved. Just verify that one is issued but not its + full text. */ + TM (ma.a5, ma.a5 + j, ma.a5, 5); /* { dg-warning "\\\[-Warray-bounds" } */ + TM (ma.a5, ma.a5 + j, ma.a5, 7); /* { dg-warning "offset \\\[5, 7] from the object at .ma. is out of the bounds of referenced subobject .$MA::$?a5. with type .char ?\\\[5]. at offset 0" } */ TM (ma.a5, ma.a5 + j, ma.a5, 9); /* { dg-warning "offset \\\[5, 9] from the object at .ma. is out of the bounds of referenced subobject .$MA::$?a5. with type .char ?\\\[5]. at offset 0" } */ } diff --git a/gcc/testsuite/c-c++-common/Warray-bounds-9.c b/gcc/testsuite/c-c++-common/Warray-bounds-9.c new file mode 100644 index 00000000000..be05775fa91 --- /dev/null +++ b/gcc/testsuite/c-c++-common/Warray-bounds-9.c @@ -0,0 +1,144 @@ +/* PR tree-optimization/99121 - ICE in -Warray-bounds on a multidimensional + VLA + { dg-do compile } + { dg-options "-O2 -Wall -ftrack-macro-expansion=0" } */ + +#define NOIPA __attribute__ ((noipa)) + +void sink (void*, ...); +#define T(a, x) sink (a, x) + + +NOIPA void a_0_n (int n) +{ + int a[0][n]; + + sink (a); + + T (a, ((int *) a)[0]); // { dg-warning "\\\[-Warray-bounds" } + T (a, ((char *) a)[1]); // { dg-warning "\\\[-Warray-bounds" } + T (a, ((float *) a)[n]); // { dg-warning "\\\[-Warray-bounds" } +} + +NOIPA void a_n_0 (int n) +{ + int a[n][0]; + + sink (a); + + T (a, ((int *) a)[0]); // { dg-warning "\\\[-Warray-bounds" } + T (a, ((char *) a)[1]); // { dg-warning "\\\[-Warray-bounds" } + T (a, ((float *) a)[n]); // { dg-warning "\\\[-Warray-bounds" } +} + + +NOIPA void a_1_n_0 (int n) +{ + int a[1][n][0]; + + sink (a); + + T (a, ((int *) a)[0]); // { dg-warning "\\\[-Warray-bounds" } + T (a, ((char *) a)[1]); // { dg-warning "\\\[-Warray-bounds" } + T (a, ((float *) a)[n]); // { dg-warning "\\\[-Warray-bounds" } +} + +NOIPA void a_1_0_n (int n) +{ + int a[1][0][n]; + + sink (a); + + T (a, ((int *) a)[0]); // { dg-warning "\\\[-Warray-bounds" } + T (a, ((char *) a)[1]); // { dg-warning "\\\[-Warray-bounds" } + T (a, ((float *) a)[n]); // { dg-warning "\\\[-Warray-bounds" } +} + +NOIPA void a_0_1_n (int n) +{ + int a[0][1][n]; + + sink (a); + + T (a, ((int *) a)[0]); // { dg-warning "\\\[-Warray-bounds" } + T (a, ((char *) a)[1]); // { dg-warning "\\\[-Warray-bounds" } + T (a, ((float *) a)[n]); // { dg-warning "\\\[-Warray-bounds" } +} + +NOIPA void a_0_n_1 (int n) +{ + int a[0][n][1]; + + sink (a); + + T (a, ((int *) a)[0]); // { dg-warning "\\\[-Warray-bounds" } + T (a, ((char *) a)[1]); // { dg-warning "\\\[-Warray-bounds" } + T (a, ((float *) a)[n]); // { dg-warning "\\\[-Warray-bounds" } +} + +NOIPA void a_n_0_n (int n) +{ + int a[n][0][n]; + + sink (a); + + T (a, ((int *) a)[0]); // { dg-warning "\\\[-Warray-bounds" } + T (a, ((char *) a)[1]); // { dg-warning "\\\[-Warray-bounds" } + T (a, ((float *) a)[n]); // { dg-warning "\\\[-Warray-bounds" } +} + +NOIPA void a_n_n_0 (int n) +{ + int a[n][n][0]; + + sink (a); + + T (a, ((int *) a)[0]); // { dg-warning "\\\[-Warray-bounds" } + T (a, ((char *) a)[1]); // { dg-warning "\\\[-Warray-bounds" } + T (a, ((float *) a)[n]); // { dg-warning "\\\[-Warray-bounds" } +} + +NOIPA void a_0_n_n (int n) +{ + int a[0][n][n]; + + sink (a); + + T (a, ((int *) a)[0]); // { dg-warning "\\\[-Warray-bounds" } + T (a, ((char *) a)[1]); // { dg-warning "\\\[-Warray-bounds" } + T (a, ((float *) a)[n]); // { dg-warning "\\\[-Warray-bounds" } +} + +NOIPA void a_0_0_n (int n) +{ + int a[0][0][n]; + + sink (a); + + T (a, ((int *) a)[0]); // { dg-warning "\\\[-Warray-bounds" } + T (a, ((char *) a)[1]); // { dg-warning "\\\[-Warray-bounds" } + T (a, ((float *) a)[n]); // { dg-warning "\\\[-Warray-bounds" } +} + +NOIPA void a_n_0_0 (int n) +{ + int a[n][0][0]; + + sink (a); + + T (a, ((int *) a)[0]); // { dg-warning "\\\[-Warray-bounds" } + T (a, ((char *) a)[1]); // { dg-warning "\\\[-Warray-bounds" } + T (a, ((float *) a)[n]); // { dg-warning "\\\[-Warray-bounds" } +} + +NOIPA void a_n_n_n (int n) +{ + int a[n][n][n]; + + sink (a); + + T (a, ((int *) a)[-1]); // { dg-warning "\\\[-Warray-bounds" "pr99140" } + T (a, ((int *) a)[0]); + T (a, ((char *) a)[1]); + T (a, ((float *) a)[n]); +} diff --git a/gcc/testsuite/g++.dg/asan/asan_test.C b/gcc/testsuite/g++.dg/asan/asan_test.C index c62568f48ec..49933ab8e4d 100644 --- a/gcc/testsuite/g++.dg/asan/asan_test.C +++ b/gcc/testsuite/g++.dg/asan/asan_test.C @@ -2,7 +2,7 @@ // { dg-skip-if "" { *-*-* } { "*" } { "-O2" } } // { dg-skip-if "" { *-*-* } { "-flto" } { "" } } // { dg-additional-sources "asan_globals_test-wrapper.cc" } -// { dg-options "-std=c++11 -fsanitize=address -fno-builtin -Wall -Werror -Wno-alloc-size-larger-than -Wno-stringop-overflow -g -DASAN_UAR=0 -DASAN_HAS_EXCEPTIONS=1 -DASAN_HAS_BLACKLIST=0 -DSANITIZER_USE_DEJAGNU_GTEST=1 -lasan -lpthread" } +// { dg-options "-std=c++11 -fsanitize=address -fno-builtin -Wall -Werror -Wno-alloc-size-larger-than -Wno-array-bounds -Wno-stringop-overflow -g -DASAN_UAR=0 -DASAN_HAS_EXCEPTIONS=1 -DASAN_HAS_BLACKLIST=0 -DSANITIZER_USE_DEJAGNU_GTEST=1 -lasan -lpthread" } // { dg-additional-options "-ldl" { target { ! *-*-freebsd* } } } // { dg-additional-options "-DASAN_NEEDS_SEGV=1" { target { ! arm*-*-* } } } // { dg-additional-options "-DASAN_LOW_MEMORY=1 -DASAN_NEEDS_SEGV=0" { target arm*-*-* } } diff --git a/gcc/testsuite/g++.dg/pr95768.C b/gcc/testsuite/g++.dg/pr95768.C index 5e2c8c44ad0..d34d5133134 100644 --- a/gcc/testsuite/g++.dg/pr95768.C +++ b/gcc/testsuite/g++.dg/pr95768.C @@ -1,6 +1,6 @@ /* PR c++/95768 - pretty-printer ICE on -Wuninitialized with allocated storage { dg-do compile } - { dg-options "-O2 -Wall" } */ + { dg-options "-O2 -Wall -Wno-array-bounds" } */ </cut>

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[TCWG CI] Regression caused by gcc: phiopt: Optimize partial_ordering spaceship >= 0 -ffinite-math-only [PR94589]

by ci_notify＠linaro.org

[TCWG CI] Regression caused by gcc: phiopt: Optimize partial_ordering spaceship >= 0 -ffinite-math-only [PR94589]: commit 65061ea287a80cfb214e402cfd2373a14bfec95a Author: Jakub Jelinek <jakub(a)redhat.com> phiopt: Optimize partial_ordering spaceship >= 0 -ffinite-math-only [PR94589] Results regressed to # reset_artifacts: -10 # build_abe binutils: -9 # build_abe stage1: -5 # build_abe qemu: -2 # linux_n_obj: 33 # First few build errors in logs: # 00:01:16 cc1plus: fatal error: ./include/generated/utsrelease.h: No such file or directory # 00:01:16 cc1plus: fatal error: ./include/generated/utsrelease.h: No such file or directory # 00:01:16 cc1plus: fatal error: ./include/generated/utsrelease.h: No such file or directory # 00:01:16 make[2]: *** [scripts/gcc-plugins/stackleak_plugin.so] Error 1 # 00:01:16 make[2]: *** [scripts/gcc-plugins/latent_entropy_plugin.so] Error 1 # 00:01:16 make[2]: *** [scripts/gcc-plugins/randomize_layout_plugin.so] Error 1 # 00:01:16 make[1]: *** [scripts/gcc-plugins] Error 2 # 00:01:17 make: *** [scripts] Error 2 from # reset_artifacts: -10 # build_abe binutils: -9 # build_abe stage1: -5 # build_abe qemu: -2 # linux_n_obj: 21070 # linux build successful: all THIS IS THE END OF INTERESTING STUFF. BELOW ARE LINKS TO BUILDS, REPRODUCTION INSTRUCTIONS, AND THE RAW COMMIT. This commit has regressed these CI configurations: - tcwg_kernel/gnu-release-aarch64-next-allyesconfig First_bad build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-next-a… Last_good build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-next-a… Baseline build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-next-a… Even more details: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-next-a… Reproduce builds: <cut> mkdir investigate-gcc-65061ea287a80cfb214e402cfd2373a14bfec95a cd investigate-gcc-65061ea287a80cfb214e402cfd2373a14bfec95a # Fetch scripts git clone https://git.linaro.org/toolchain/jenkins-scripts # Fetch manifests and test.sh script mkdir -p artifacts/manifests curl -o artifacts/manifests/build-baseline.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-next-a… --fail curl -o artifacts/manifests/build-parameters.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-next-a… --fail curl -o artifacts/test.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-aarch64-next-a… --fail chmod +x artifacts/test.sh # Reproduce the baseline build (build all pre-requisites) ./jenkins-scripts/tcwg_kernel-build.sh @@ artifacts/manifests/build-baseline.sh # Save baseline build state (which is then restored in artifacts/test.sh) mkdir -p ./bisect rsync -a --del --delete-excluded --exclude /bisect/ --exclude /artifacts/ --exclude /gcc/ ./ ./bisect/baseline/ cd gcc # Reproduce first_bad build git checkout --detach 65061ea287a80cfb214e402cfd2373a14bfec95a ../artifacts/test.sh # Reproduce last_good build git checkout --detach b2a09773155892e426b90ce8367e2ed6996b44ef ../artifacts/test.sh cd .. </cut> Full commit (up to 1000 lines): <cut> commit 65061ea287a80cfb214e402cfd2373a14bfec95a Author: Jakub Jelinek <jakub(a)redhat.com> Date: Tue May 18 10:08:51 2021 +0200 phiopt: Optimize partial_ordering spaceship >= 0 -ffinite-math-only [PR94589] As mentioned earlier, spaceship_replacement didn't optimize partial_ordering >= 0 comparisons, because the possible values are -1, 0, 1, 2 and the >= comparison is implemented as (res & 1) == res to choose the 0 and 1 cases from that. As we optimize that only with -ffinite-math-only, the 2 case is assumed not to happen and my earlier match.pd change optimizes (res & 1) == res into (res & ~1) == 0, so this patch pattern matches that case and handles it like res >= 0. 2021-05-18 Jakub Jelinek <jakub(a)redhat.com> PR tree-optimization/94589 * tree-ssa-phiopt.c (spaceship_replacement): Pattern match phi result used in (res & ~1) == 0 comparison as res >= 0 as res == 2 would be UB with -ffinite-math-only. * g++.dg/opt/pr94589-2.C: Adjust scan-tree-dump count from 14 to 12. --- gcc/testsuite/g++.dg/opt/pr94589-2.C | 4 +- gcc/tree-ssa-phiopt.c | 72 +++++++++++++++++++++++++++++++----- 2 files changed, 65 insertions(+), 11 deletions(-) diff --git a/gcc/testsuite/g++.dg/opt/pr94589-2.C b/gcc/testsuite/g++.dg/opt/pr94589-2.C index dda947e22b1..e9ef84b1912 100644 --- a/gcc/testsuite/g++.dg/opt/pr94589-2.C +++ b/gcc/testsuite/g++.dg/opt/pr94589-2.C @@ -1,8 +1,8 @@ // PR tree-optimization/94589 // { dg-do compile { target c++20 } } // { dg-options "-O2 -g0 -ffast-math -fdump-tree-optimized" } -// { dg-final { scan-tree-dump-times "\[ij]_\[0-9]+\$D\$ (?:<|<=|==|!=|>|>=) \[ij]_\[0-9]+\$D\$" 14 "optimized" } } -// { dg-final { scan-tree-dump-times "i_\[0-9]+\$D\$ (?:<|<=|==|!=|>|>=) 5\\.0" 14 "optimized" } } +// { dg-final { scan-tree-dump-times "\[ij]_\[0-9]+\$D\$ (?:<|<=|==|!=|>|>=) \[ij]_\[0-9]+\$D\$" 12 "optimized" } } +// { dg-final { scan-tree-dump-times "i_\[0-9]+\$D\$ (?:<|<=|==|!=|>|>=) 5\\.0" 12 "optimized" } } #include <compare> diff --git a/gcc/tree-ssa-phiopt.c b/gcc/tree-ssa-phiopt.c index e0a41d41fba..8e8a08bc679 100644 --- a/gcc/tree-ssa-phiopt.c +++ b/gcc/tree-ssa-phiopt.c @@ -1887,8 +1887,9 @@ spaceship_replacement (basic_block cond_bb, basic_block middle_bb, edge e0, edge e1, gphi *phi, tree arg0, tree arg1) { - if (!INTEGRAL_TYPE_P (TREE_TYPE (PHI_RESULT (phi))) - || TYPE_UNSIGNED (TREE_TYPE (PHI_RESULT (phi))) + tree phires = PHI_RESULT (phi); + if (!INTEGRAL_TYPE_P (TREE_TYPE (phires)) + || TYPE_UNSIGNED (TREE_TYPE (phires)) || !tree_fits_shwi_p (arg0) || !tree_fits_shwi_p (arg1) || !IN_RANGE (tree_to_shwi (arg0), -1, 2) @@ -1902,12 +1903,32 @@ spaceship_replacement (basic_block cond_bb, basic_block middle_bb, use_operand_p use_p; gimple *use_stmt; - if (SSA_NAME_OCCURS_IN_ABNORMAL_PHI (PHI_RESULT (phi))) + if (SSA_NAME_OCCURS_IN_ABNORMAL_PHI (phires)) return false; - if (!single_imm_use (PHI_RESULT (phi), &use_p, &use_stmt)) + if (!single_imm_use (phires, &use_p, &use_stmt)) return false; enum tree_code cmp; tree lhs, rhs; + gimple *orig_use_stmt = use_stmt; + tree orig_use_lhs = NULL_TREE; + int prec = TYPE_PRECISION (TREE_TYPE (phires)); + if (is_gimple_assign (use_stmt) + && gimple_assign_rhs_code (use_stmt) == BIT_AND_EXPR + && TREE_CODE (gimple_assign_rhs2 (use_stmt)) == INTEGER_CST + && (wi::to_wide (gimple_assign_rhs2 (use_stmt)) + == wi::shifted_mask (1, prec - 1, false, prec))) + { + /* For partial_ordering result operator>= with unspec as second + argument is (res & 1) == res, folded by match.pd into + (res & ~1) == 0. */ + orig_use_lhs = gimple_assign_lhs (use_stmt); + if (SSA_NAME_OCCURS_IN_ABNORMAL_PHI (orig_use_lhs)) + return false; + if (EDGE_COUNT (phi_bb->preds) != 4) + return false; + if (!single_imm_use (orig_use_lhs, &use_p, &use_stmt)) + return false; + } if (gimple_code (use_stmt) == GIMPLE_COND) { cmp = gimple_cond_code (use_stmt); @@ -1948,10 +1969,19 @@ spaceship_replacement (basic_block cond_bb, basic_block middle_bb, default: return false; } - if (lhs != PHI_RESULT (phi) + if (lhs != (orig_use_lhs ? orig_use_lhs : phires) || !tree_fits_shwi_p (rhs) || !IN_RANGE (tree_to_shwi (rhs), -1, 1)) return false; + if (orig_use_lhs) + { + if ((cmp != EQ_EXPR && cmp != NE_EXPR) || !integer_zerop (rhs)) + return false; + /* As for -ffast-math we assume the 2 return to be + impossible, canonicalize (res & ~1) == 0 into + res >= 0 and (res & ~1) != 0 as res < 0. */ + cmp = cmp == EQ_EXPR ? GE_EXPR : LT_EXPR; + } if (!empty_block_p (middle_bb)) return false; @@ -2092,7 +2122,7 @@ spaceship_replacement (basic_block cond_bb, basic_block middle_bb, ? EDGE_TRUE_VALUE : EDGE_FALSE_VALUE)) == 0) return false; - /* lhs1 one_cmp rhs1 results in PHI_RESULT (phi) of 1. */ + /* lhs1 one_cmp rhs1 results in phires of 1. */ enum tree_code one_cmp; if ((cmp1 == LT_EXPR) ^ (!integer_onep ((e1->flags & EDGE_TRUE_VALUE) ? arg1 : arg0))) @@ -2185,13 +2215,29 @@ spaceship_replacement (basic_block cond_bb, basic_block middle_bb, use_operand_p use_p; imm_use_iterator iter; bool has_debug_uses = false; - FOR_EACH_IMM_USE_FAST (use_p, iter, PHI_RESULT (phi)) + FOR_EACH_IMM_USE_FAST (use_p, iter, phires) { gimple *use_stmt = USE_STMT (use_p); + if (orig_use_lhs && use_stmt == orig_use_stmt) + continue; gcc_assert (is_gimple_debug (use_stmt)); has_debug_uses = true; break; } + if (orig_use_lhs) + { + if (!has_debug_uses) + FOR_EACH_IMM_USE_FAST (use_p, iter, orig_use_lhs) + { + gimple *use_stmt = USE_STMT (use_p); + gcc_assert (is_gimple_debug (use_stmt)); + has_debug_uses = true; + } + gimple_stmt_iterator gsi = gsi_for_stmt (orig_use_stmt); + tree zero = build_zero_cst (TREE_TYPE (orig_use_lhs)); + gimple_assign_set_rhs_with_ops (&gsi, INTEGER_CST, zero); + update_stmt (orig_use_stmt); + } if (has_debug_uses) { @@ -2203,7 +2249,7 @@ spaceship_replacement (basic_block cond_bb, basic_block middle_bb, Ignore the value of 2, because if NaNs aren't expected, all floating point numbers should be comparable. */ gimple_stmt_iterator gsi = gsi_after_labels (gimple_bb (phi)); - tree type = TREE_TYPE (PHI_RESULT (phi)); + tree type = TREE_TYPE (phires); tree temp1 = make_node (DEBUG_EXPR_DECL); DECL_ARTIFICIAL (temp1) = 1; TREE_TYPE (temp1) = type; @@ -2221,10 +2267,18 @@ spaceship_replacement (basic_block cond_bb, basic_block middle_bb, t = build3 (COND_EXPR, type, t, build_zero_cst (type), temp1); g = gimple_build_debug_bind (temp2, t, phi); gsi_insert_before (&gsi, g, GSI_SAME_STMT); - replace_uses_by (PHI_RESULT (phi), temp2); + replace_uses_by (phires, temp2); + if (orig_use_lhs) + replace_uses_by (orig_use_lhs, temp2); } } + if (orig_use_lhs) + { + gimple_stmt_iterator gsi = gsi_for_stmt (orig_use_stmt); + gsi_remove (&gsi, true); + } + gimple_stmt_iterator psi = gsi_for_stmt (phi); remove_phi_node (&psi, true); </cut>

3 years, 1 month

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[TCWG CI] Regression caused by gcc: c++: value-init vs zero-init in expand_aggr_init_1 [PR65816]

by ci_notify＠linaro.org

[TCWG CI] Regression caused by gcc: c++: value-init vs zero-init in expand_aggr_init_1 [PR65816]: commit ac0bc21bd634a334ba8f323c39a11f01dfdc2aae Author: Patrick Palka <ppalka(a)redhat.com> c++: value-init vs zero-init in expand_aggr_init_1 [PR65816] Results regressed to # reset_artifacts: -10 # build_abe binutils: -9 # build_abe stage1: -5 # build_abe qemu: -2 # linux_n_obj: 33 # First few build errors in logs: # 00:01:23 cc1plus: fatal error: ./include/generated/utsrelease.h: No such file or directory # 00:01:23 make[2]: *** [scripts/gcc-plugins/latent_entropy_plugin.so] Error 1 # 00:01:23 cc1plus: fatal error: ./include/generated/utsrelease.h: No such file or directory # 00:01:23 make[2]: *** [scripts/gcc-plugins/randomize_layout_plugin.so] Error 1 # 00:01:23 make[1]: *** [scripts/gcc-plugins] Error 2 # 00:01:24 make: *** [scripts] Error 2 from # reset_artifacts: -10 # build_abe binutils: -9 # build_abe stage1: -5 # build_abe qemu: -2 # linux_n_obj: 22769 THIS IS THE END OF INTERESTING STUFF. BELOW ARE LINKS TO BUILDS, REPRODUCTION INSTRUCTIONS, AND THE RAW COMMIT. This commit has regressed these CI configurations: - tcwg_kernel/gnu-release-arm-next-allmodconfig First_bad build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-arm-next-allmo… Last_good build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-arm-next-allmo… Baseline build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-arm-next-allmo… Even more details: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-arm-next-allmo… Reproduce builds: <cut> mkdir investigate-gcc-ac0bc21bd634a334ba8f323c39a11f01dfdc2aae cd investigate-gcc-ac0bc21bd634a334ba8f323c39a11f01dfdc2aae # Fetch scripts git clone https://git.linaro.org/toolchain/jenkins-scripts # Fetch manifests and test.sh script mkdir -p artifacts/manifests curl -o artifacts/manifests/build-baseline.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-arm-next-allmo… --fail curl -o artifacts/manifests/build-parameters.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-arm-next-allmo… --fail curl -o artifacts/test.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-arm-next-allmo… --fail chmod +x artifacts/test.sh # Reproduce the baseline build (build all pre-requisites) ./jenkins-scripts/tcwg_kernel-build.sh @@ artifacts/manifests/build-baseline.sh # Save baseline build state (which is then restored in artifacts/test.sh) mkdir -p ./bisect rsync -a --del --delete-excluded --exclude /bisect/ --exclude /artifacts/ --exclude /gcc/ ./ ./bisect/baseline/ cd gcc # Reproduce first_bad build git checkout --detach ac0bc21bd634a334ba8f323c39a11f01dfdc2aae ../artifacts/test.sh # Reproduce last_good build git checkout --detach 9f55df63154a39d67ef5b24def7044bf87300831 ../artifacts/test.sh cd .. </cut> Full commit (up to 1000 lines): <cut> commit ac0bc21bd634a334ba8f323c39a11f01dfdc2aae Author: Patrick Palka <ppalka(a)redhat.com> Date: Tue Jun 1 12:23:49 2021 -0400 c++: value-init vs zero-init in expand_aggr_init_1 [PR65816] In the case of value-initializing an object of class type T, [dcl.init.general]/8 says: - if T has either no default constructor ([class.default.ctor]) or a default constructor that is user-provided or deleted, then the object is default-initialized; - otherwise, the object is zero-initialized and ... if T has a non-trivial default constructor, the object is default-initialized; But when determining whether to first zero-initialize the object, expand_aggr_init_1 incorrectly considers the user-providedness of _all_ constructors rather than only that of the _default_ constructors. This causes us to skip the zero-initialization step when the class type has a defaulted default constructor alongside a user-defined constructor. It seems the predicate type_has_non_user_provided_default_constructor accurately captures the above rule for when to first perform a zero-initialization during value-initialization, so this patch adjusts expand_aggr_init_1 to use this predicate instead. PR c++/65816 gcc/cp/ChangeLog: * init.c (expand_aggr_init_1): Check type_has_non_user_provided_default_constructor instead of type_has_user_provided_constructor. gcc/testsuite/ChangeLog: * g++.dg/cpp0x/constexpr-delegating3.C: New test. * g++.dg/cpp0x/dc10.C: New test. * g++.dg/cpp0x/initlist-base4.C: New test. * g++.dg/cpp2a/constexpr-init22.C: New test. libstdc++-v3/ChangeLog: * testsuite/23_containers/deque/allocator/default_init.cc, testsuite/23_containers/forward_list/allocator/default_init.cc, testsuite/23_containers/list/allocator/default_init.cc, testsuite/23_containers/map/allocator/default_init.cc, testsuite/23_containers/set/allocator/default_init.cc, testsuite/23_containers/vector/allocator/default_init.cc, testsuite/23_containers/vector/bool/allocator/default_init.cc: Remove xfail. --- gcc/cp/init.c | 4 ++-- gcc/testsuite/g++.dg/cpp0x/constexpr-delegating3.C | 10 +++++++++ gcc/testsuite/g++.dg/cpp0x/dc10.C | 19 ++++++++++++++++ gcc/testsuite/g++.dg/cpp0x/initlist-base4.C | 26 ++++++++++++++++++++++ gcc/testsuite/g++.dg/cpp2a/constexpr-init22.C | 14 ++++++++++++ .../23_containers/deque/allocator/default_init.cc | 1 - .../forward_list/allocator/default_init.cc | 1 - .../23_containers/list/allocator/default_init.cc | 1 - .../23_containers/map/allocator/default_init.cc | 1 - .../23_containers/set/allocator/default_init.cc | 1 - .../23_containers/vector/allocator/default_init.cc | 1 - .../vector/bool/allocator/default_init.cc | 1 - 12 files changed, 71 insertions(+), 9 deletions(-) diff --git a/gcc/cp/init.c b/gcc/cp/init.c index 04d495807ef..b1123287300 100644 --- a/gcc/cp/init.c +++ b/gcc/cp/init.c @@ -2078,9 +2078,9 @@ expand_aggr_init_1 (tree binfo, tree true_exp, tree exp, tree init, int flags, that's value-initialization. */ if (init == void_type_node) { - /* If the type has data but no user-provided ctor, we need to zero + /* If the type has data but no user-provided default ctor, we need to zero out the object. */ - if (!type_has_user_provided_constructor (type) + if (type_has_non_user_provided_default_constructor (type) && !is_really_empty_class (type, /*ignore_vptr*/true)) { tree field_size = NULL_TREE; diff --git a/gcc/testsuite/g++.dg/cpp0x/constexpr-delegating3.C b/gcc/testsuite/g++.dg/cpp0x/constexpr-delegating3.C new file mode 100644 index 00000000000..2263ec89488 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp0x/constexpr-delegating3.C @@ -0,0 +1,10 @@ +// PR c++/65816 +// { dg-do compile { target c++11 } } + +struct test { + int m; + test() = default; + constexpr test(int) : test() {} +}; + +static_assert(test(0).m == 0, ""); diff --git a/gcc/testsuite/g++.dg/cpp0x/dc10.C b/gcc/testsuite/g++.dg/cpp0x/dc10.C new file mode 100644 index 00000000000..c008a1703e8 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp0x/dc10.C @@ -0,0 +1,19 @@ +// PR c++/65816 +// { dg-do run { target c++11 } } + +void* operator new(decltype(sizeof(int)), void* ptr) { return ptr; } + +struct test { + int i; + test() = default; + test(int) : test() {} +}; + +int main() { + alignas(test) unsigned char space[sizeof(test)]; + for (auto& c : space) c = 0xff; + + auto ptr = ::new(&space) test(42); + int& i = static_cast<test&>(*ptr).i; + if (i != 0) __builtin_abort(); +} diff --git a/gcc/testsuite/g++.dg/cpp0x/initlist-base4.C b/gcc/testsuite/g++.dg/cpp0x/initlist-base4.C new file mode 100644 index 00000000000..4a02af92799 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp0x/initlist-base4.C @@ -0,0 +1,26 @@ +// PR c++/65816 +// { dg-do run { target c++11 } } + +void* operator new(decltype(sizeof(int)), void* ptr) { return ptr; } + +struct item { int i; }; + +struct collector : item { + int j; + collector() = default; + collector(int) {} +}; + +struct tuple : collector { + tuple() : collector() {} +}; + +int main() { + alignas(tuple) unsigned char space[sizeof(tuple)]; + for (auto& c : space) c = 0xff; + + auto ptr = ::new(&space) tuple; + int& i = static_cast<tuple&>(*ptr).i; + int& j = static_cast<tuple&>(*ptr).j; + if (i != 0 || j != 0) __builtin_abort(); +} diff --git a/gcc/testsuite/g++.dg/cpp2a/constexpr-init22.C b/gcc/testsuite/g++.dg/cpp2a/constexpr-init22.C new file mode 100644 index 00000000000..50e4a95dbda --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp2a/constexpr-init22.C @@ -0,0 +1,14 @@ +// PR c++/65816 +// { dg-do compile { target c++20 } } + +struct X { + int i; + X() = default; + constexpr X(int) { } +}; + +struct Y : X { + constexpr Y() : X() { } +}; + +static_assert(Y().i == 0); diff --git a/libstdc++-v3/testsuite/23_containers/deque/allocator/default_init.cc b/libstdc++-v3/testsuite/23_containers/deque/allocator/default_init.cc index f51cc5b49b9..9428206f2ef 100644 --- a/libstdc++-v3/testsuite/23_containers/deque/allocator/default_init.cc +++ b/libstdc++-v3/testsuite/23_containers/deque/allocator/default_init.cc @@ -17,7 +17,6 @@ // { dg-do run { target c++11 } } // { dg-options "-O0" } -// { dg-xfail-run-if "PR c++/65816" { *-*-* } } #include <deque> #include <testsuite_hooks.h> diff --git a/libstdc++-v3/testsuite/23_containers/forward_list/allocator/default_init.cc b/libstdc++-v3/testsuite/23_containers/forward_list/allocator/default_init.cc index a60192641d4..4298fa5ffa5 100644 --- a/libstdc++-v3/testsuite/23_containers/forward_list/allocator/default_init.cc +++ b/libstdc++-v3/testsuite/23_containers/forward_list/allocator/default_init.cc @@ -17,7 +17,6 @@ // { dg-do run { target c++11 } } // { dg-options "-O0" } -// { dg-xfail-run-if "PR c++/65816" { *-*-* } } #include <forward_list> #include <testsuite_hooks.h> diff --git a/libstdc++-v3/testsuite/23_containers/list/allocator/default_init.cc b/libstdc++-v3/testsuite/23_containers/list/allocator/default_init.cc index 62bfd78df18..03d8cfc89e8 100644 --- a/libstdc++-v3/testsuite/23_containers/list/allocator/default_init.cc +++ b/libstdc++-v3/testsuite/23_containers/list/allocator/default_init.cc @@ -17,7 +17,6 @@ // { dg-do run { target c++11 } } // { dg-options "-O0" } -// { dg-xfail-run-if "PR c++/65816" { *-*-* } } #include <list> #include <testsuite_hooks.h> diff --git a/libstdc++-v3/testsuite/23_containers/map/allocator/default_init.cc b/libstdc++-v3/testsuite/23_containers/map/allocator/default_init.cc index bc9027703fc..6e3f36d60a4 100644 --- a/libstdc++-v3/testsuite/23_containers/map/allocator/default_init.cc +++ b/libstdc++-v3/testsuite/23_containers/map/allocator/default_init.cc @@ -17,7 +17,6 @@ // { dg-do run { target c++11 } } // { dg-options "-O0" } -// { dg-xfail-run-if "PR c++/65816" { *-*-* } } #include <map> #include <testsuite_hooks.h> diff --git a/libstdc++-v3/testsuite/23_containers/set/allocator/default_init.cc b/libstdc++-v3/testsuite/23_containers/set/allocator/default_init.cc index 8a99b491c25..b031cb81504 100644 --- a/libstdc++-v3/testsuite/23_containers/set/allocator/default_init.cc +++ b/libstdc++-v3/testsuite/23_containers/set/allocator/default_init.cc @@ -17,7 +17,6 @@ // { dg-do run { target c++11 } } // { dg-options "-O0" } -// { dg-xfail-run-if "PR c++/65816" { *-*-* } } #include <set> #include <testsuite_hooks.h> diff --git a/libstdc++-v3/testsuite/23_containers/vector/allocator/default_init.cc b/libstdc++-v3/testsuite/23_containers/vector/allocator/default_init.cc index c16d3b046e4..4673db71b6c 100644 --- a/libstdc++-v3/testsuite/23_containers/vector/allocator/default_init.cc +++ b/libstdc++-v3/testsuite/23_containers/vector/allocator/default_init.cc @@ -17,7 +17,6 @@ // { dg-do run { target c++11 } } // { dg-options "-O0" } -// { dg-xfail-run-if "PR c++/65816" { *-*-* } } #include <vector> #include <testsuite_hooks.h> diff --git a/libstdc++-v3/testsuite/23_containers/vector/bool/allocator/default_init.cc b/libstdc++-v3/testsuite/23_containers/vector/bool/allocator/default_init.cc index 4111e3ac3eb..61cc7859d74 100644 --- a/libstdc++-v3/testsuite/23_containers/vector/bool/allocator/default_init.cc +++ b/libstdc++-v3/testsuite/23_containers/vector/bool/allocator/default_init.cc @@ -17,7 +17,6 @@ // { dg-do run { target c++11 } } // { dg-options "-O0" } -// { dg-xfail-run-if "PR c++/65816" { *-*-* } } #include <vector> #include <testsuite_hooks.h> </cut>

3 years, 1 month

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[TCWG CI] Regression caused by gcc: Fold sign of LSHIFT_EXPR to eliminate no-op conversions.

by ci_notify＠linaro.org

[TCWG CI] Regression caused by gcc: Fold sign of LSHIFT_EXPR to eliminate no-op conversions.: commit 1d244020246cb155e4de62ca3b302b920a1f513f Author: Roger Sayle <roger(a)nextmovesoftware.com> Fold sign of LSHIFT_EXPR to eliminate no-op conversions. Results regressed to # reset_artifacts: -10 # build_abe binutils: -9 # build_abe stage1: -5 # build_abe qemu: -2 # linux_n_obj: 22170 # First few build errors in logs: # 00:17:02 drivers/gpu/drm/amd/amdgpu/amdgpu.h:1238:53: error: ‘<<’ in boolean context, did you mean ‘<’? [-Werror=int-in-bool-context] # 00:17:03 make[4]: *** [drivers/gpu/drm/amd/amdgpu/gmc_v6_0.o] Error 1 # 00:23:50 drivers/net/wireless/intel/iwlwifi/mvm/tx.c:2226:1: error: type mismatch in ‘lshift_expr’ # 00:23:50 drivers/net/wireless/intel/iwlwifi/mvm/tx.c:2226:1: internal compiler error: verify_gimple failed # 00:23:50 make[6]: *** [drivers/net/wireless/intel/iwlwifi/mvm/tx.o] Error 1 # 00:24:56 make[5]: *** [drivers/net/wireless/intel/iwlwifi/mvm] Error 2 # 00:26:51 make[4]: *** [drivers/net/wireless/intel/iwlwifi] Error 2 # 00:26:51 make[3]: *** [drivers/net/wireless/intel] Error 2 # 00:29:27 make[2]: *** [drivers/net/wireless] Error 2 # 00:34:08 make[3]: *** [drivers/gpu/drm/amd/amdgpu] Error 2 from # reset_artifacts: -10 # build_abe binutils: -9 # build_abe stage1: -5 # build_abe qemu: -2 # linux_n_obj: 30479 # linux build successful: all THIS IS THE END OF INTERESTING STUFF. BELOW ARE LINKS TO BUILDS, REPRODUCTION INSTRUCTIONS, AND THE RAW COMMIT. This commit has regressed these CI configurations: - tcwg_kernel/gnu-release-arm-stable-allmodconfig First_bad build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-arm-stable-all… Last_good build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-arm-stable-all… Baseline build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-arm-stable-all… Even more details: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-arm-stable-all… Reproduce builds: <cut> mkdir investigate-gcc-1d244020246cb155e4de62ca3b302b920a1f513f cd investigate-gcc-1d244020246cb155e4de62ca3b302b920a1f513f # Fetch scripts git clone https://git.linaro.org/toolchain/jenkins-scripts # Fetch manifests and test.sh script mkdir -p artifacts/manifests curl -o artifacts/manifests/build-baseline.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-arm-stable-all… --fail curl -o artifacts/manifests/build-parameters.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-arm-stable-all… --fail curl -o artifacts/test.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-release-arm-stable-all… --fail chmod +x artifacts/test.sh # Reproduce the baseline build (build all pre-requisites) ./jenkins-scripts/tcwg_kernel-build.sh @@ artifacts/manifests/build-baseline.sh # Save baseline build state (which is then restored in artifacts/test.sh) mkdir -p ./bisect rsync -a --del --delete-excluded --exclude /bisect/ --exclude /artifacts/ --exclude /gcc/ ./ ./bisect/baseline/ cd gcc # Reproduce first_bad build git checkout --detach 1d244020246cb155e4de62ca3b302b920a1f513f ../artifacts/test.sh # Reproduce last_good build git checkout --detach b320edc0c29c838b0090c3c9be14187d132f73f2 ../artifacts/test.sh cd .. </cut> Full commit (up to 1000 lines): <cut> commit 1d244020246cb155e4de62ca3b302b920a1f513f Author: Roger Sayle <roger(a)nextmovesoftware.com> Date: Mon Aug 23 12:37:04 2021 +0100 Fold sign of LSHIFT_EXPR to eliminate no-op conversions. This short patch teaches fold that it is "safe" to change the sign of a left shift, to reduce the number of type conversions in gimple. As an example: unsigned int foo(unsigned int i) { return (int)i << 8; } is currently optimized to: unsigned int foo (unsigned int i) { int i.0_1; int _2; unsigned int _4; <bb 2> [local count: 1073741824]: i.0_1 = (int) i_3(D); _2 = i.0_1 << 8; _4 = (unsigned int) _2; return _4; } with this patch, this now becomes: unsigned int foo (unsigned int i) { unsigned int _2; <bb 2> [local count: 1073741824]: _2 = i_1(D) << 8; return _2; } which generates exactly the same assembly language. Aside from the reduced memory usage, the real benefit is that no-op conversions tend to interfere with many folding optimizations. For example, unsigned int bar(unsigned char i) { return (i ^ (i<<16)) | (i<<8); } currently gets (tangled in conversions and) optimized to: unsigned int bar (unsigned char i) { unsigned int _1; unsigned int _2; int _3; int _4; unsigned int _6; unsigned int _8; <bb 2> [local count: 1073741824]: _1 = (unsigned int) i_5(D); _2 = _1 * 65537; _3 = (int) i_5(D); _4 = _3 << 8; _8 = (unsigned int) _4; _6 = _2 | _8; return _6; } but with this patch, bar now optimizes down to: unsigned int bar(unsigned char i) { unsigned int _1; unsigned int _4; <bb 2> [local count: 1073741824]: _1 = (unsigned int) i_3(D); _4 = _1 * 65793; return _4; } 2021-08-23 Roger Sayle <roger(a)nextmovesoftware.com> gcc/ChangeLog * match.pd (shift transformations): Change the sign of an LSHIFT_EXPR if it reduces the number of explicit conversions. gcc/testsuite/ChangeLog * gcc.dg/fold-convlshift-1.c: New test case. * gcc.dg/fold-convlshift-2.c: New test case. --- gcc/match.pd | 9 +++++++++ gcc/testsuite/gcc.dg/fold-convlshift-1.c | 20 ++++++++++++++++++++ gcc/testsuite/gcc.dg/fold-convlshift-2.c | 20 ++++++++++++++++++++ 3 files changed, 49 insertions(+) diff --git a/gcc/match.pd b/gcc/match.pd index 0fcfd0ea62c..978a1b0172e 100644 --- a/gcc/match.pd +++ b/gcc/match.pd @@ -3385,6 +3385,15 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) (if (integer_zerop (@2) || integer_all_onesp (@2)) (cmp @0 @2))))) +/* Both signed and unsigned lshift produce the same result, so use + the form that minimizes the number of conversions. */ +(simplify + (convert (lshift:s@0 (convert:s@1 @2) INTEGER_CST@3)) + (if (tree_nop_conversion_p (type, TREE_TYPE (@0)) + && INTEGRAL_TYPE_P (TREE_TYPE (@2)) + && TYPE_PRECISION (TREE_TYPE (@2)) <= TYPE_PRECISION (type)) + (lshift (convert @2) @3))) + /* Simplifications of conversions. */ /* Basic strip-useless-type-conversions / strip_nops. */ diff --git a/gcc/testsuite/gcc.dg/fold-convlshift-1.c b/gcc/testsuite/gcc.dg/fold-convlshift-1.c new file mode 100644 index 00000000000..b6f57f81e72 --- /dev/null +++ b/gcc/testsuite/gcc.dg/fold-convlshift-1.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-optimized" } */ + +unsigned int foo(unsigned int i) +{ + int t1 = i; + int t2 = t1 << 8; + return t2; +} + +int bar(int i) +{ + unsigned int t1 = i; + unsigned int t2 = t1 << 8; + return t2; +} + +/* { dg-final { scan-tree-dump-not "\$int\$" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "\$unsigned int\$" "optimized" } } */ + diff --git a/gcc/testsuite/gcc.dg/fold-convlshift-2.c b/gcc/testsuite/gcc.dg/fold-convlshift-2.c new file mode 100644 index 00000000000..f21358c4584 --- /dev/null +++ b/gcc/testsuite/gcc.dg/fold-convlshift-2.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-optimized" } */ + +unsigned int foo(unsigned char c) +{ + int t1 = c; + int t2 = t1 << 8; + return t2; +} + +int bar(unsigned char c) +{ + unsigned int t1 = c; + unsigned int t2 = t1 << 8; + return t2; +} + +/* { dg-final { scan-tree-dump-times "\$int\$" 1 "optimized" } } */ +/* { dg-final { scan-tree-dump-times "\$unsigned int\$" 1 "optimized" } } */ + </cut>

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[ACTIVITY] Report for week #20

by Thiago Jung Bauermann

Hello, # [GNU-767] Support changing SVE vector length in remote debugging - Rebased my code on current master branch. - Ran into issues with running the GDB testsuite against gdbserver, both on my branch and on master. Currently investigating. - Regarding the ptrace issues I'm running into, at Richard's suggestion I checked the errno and it's ESRCH. This means that the inferior isn't in a state where gdbserver can fetch its registers. So maybe there's a race condition in gdbserver itself and it's trying to do that before the inferior is stopped. Currently investigating. # Sourceware bug 28561 - [gdb/testsuite] Error due to not reading \r\n at end of mi prompt * Luis mentioned this bug so I started investigating it. Tried reproducing it on Ubuntu 20.04 and 22.04 but without success. Also tried setting up an openSUSE Leap 15.3 KVM guest to try to reproduce it there, but the distro's installer hangs. -- Thiago

3 years, 1 month

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[ACTIVITY] report week ending 20 May

by Peter Maydell

Progress: * UM-2 [QEMU upstream maintainership] - Joint Linaro/Arm meeting on the Realm Management Extension (RME). Mostly this was "how the software stack is going to work"; some useful discussion on how this intersects with QEMU, both as a potential emulation platform for software development and also as the VMM for a realm-using KVM virtual machine. - Kicked off a discussion thread on getting rid of the last parts of our "ad-hoc CI" this release cycle. The main thing that's not yet handled by Gitlab CI is FreeBSD and NetBSD hosts. We might be able to do this if we can find an x86 Linux machine to act as a gitlab runner (it needs to be able to run guest BSD VMs). * QEMU-422 [QEMU Arm Neoverse V1 vCPU for TCG] - Several small features have now made it upstream so those subtasks have been closed out - Looking at FEAT_RASv1p1 and FEAT_DoubleFault. The first of these is easy because we only model the minimal "no error records" RAS: I think we can simply bump the ID register fields to indicate support. The second is a little bit more interesting because the new SCR_EL3.EASE bit means we suddenly have a source of physical SErrors (from synchronous external aborts) when we previously could not have any... -- PMM

3 years, 1 month

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[ACTIVITY] Report for week #19

by Thiago Jung Bauermann

Hello, # [GNU-767] Support changing SVE vector length in remote debugging * Continued working on the testsuite regressions introduced by my code. - Found out that the crash I was investigating (which happens when gdbserver thinks that the kernel doesn't support SVE and crashes) only occurs with kernel v5.4 from Ubuntu 20.04 and not with Ubuntu 22.04's v5.15. In the former version, ptrace(PTRACE_GETREGSET, …, NT_ARM_SVE, …) often returns -1 (but not always) and gdbserver interprets this as meaning that SVE isn't supported. The newer kernel always returns successfully from this call. gdbserver still acts weird so there's more digging to do, but at least it doesn't crash. # Misc - Took one day of vacation. -- Thiago

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[TCWG CI] Regression caused by gcc: Make gimple_build main workers more flexible

by ci_notify＠linaro.org

[TCWG CI] Regression caused by gcc: Make gimple_build main workers more flexible: commit ba2068893c37deaa418d9b2126414f6824e66655 Author: Richard Biener <rguenther(a)suse.de> Make gimple_build main workers more flexible Results regressed to # reset_artifacts: -10 # build_abe binutils: -9 # build_abe stage1: -5 # build_abe qemu: -2 # linux_n_obj: 33 # First few build errors in logs: # 00:01:06 /home/tcwg-buildslave/workspace/tcwg_kernel_1/abe/builds/destdir/x86_64-pc-linux-gnu/lib/gcc/arm-linux-gnueabihf/13.0.0/plugin/include/gimple-fold.h:71:11: error: use of enum ‘gsi_iterator_update’ without previous declaration # 00:01:06 /home/tcwg-buildslave/workspace/tcwg_kernel_1/abe/builds/destdir/x86_64-pc-linux-gnu/lib/gcc/arm-linux-gnueabihf/13.0.0/plugin/include/gimple-fold.h:74:11: error: use of enum ‘gsi_iterator_update’ without previous declaration # 00:01:06 /home/tcwg-buildslave/workspace/tcwg_kernel_1/abe/builds/destdir/x86_64-pc-linux-gnu/lib/gcc/arm-linux-gnueabihf/13.0.0/plugin/include/gimple-fold.h:77:11: error: use of enum ‘gsi_iterator_update’ without previous declaration # 00:01:06 /home/tcwg-buildslave/workspace/tcwg_kernel_1/abe/builds/destdir/x86_64-pc-linux-gnu/lib/gcc/arm-linux-gnueabihf/13.0.0/plugin/include/gimple-fold.h:86:30: error: there are no arguments to ‘gsi_last’ that depend on a template parameter, so a declaration of ‘gsi_last’ must be available [-fpermissive] # 00:01:06 /home/tcwg-buildslave/workspace/tcwg_kernel_1/abe/builds/destdir/x86_64-pc-linux-gnu/lib/gcc/arm-linux-gnueabihf/13.0.0/plugin/include/gimple-fold.h:71:11: error: use of enum ‘gsi_iterator_update’ without previous declaration # 00:01:06 /home/tcwg-buildslave/workspace/tcwg_kernel_1/abe/builds/destdir/x86_64-pc-linux-gnu/lib/gcc/arm-linux-gnueabihf/13.0.0/plugin/include/gimple-fold.h:74:11: error: use of enum ‘gsi_iterator_update’ without previous declaration # 00:01:06 /home/tcwg-buildslave/workspace/tcwg_kernel_1/abe/builds/destdir/x86_64-pc-linux-gnu/lib/gcc/arm-linux-gnueabihf/13.0.0/plugin/include/gimple-fold.h:77:11: error: use of enum ‘gsi_iterator_update’ without previous declaration # 00:01:06 /home/tcwg-buildslave/workspace/tcwg_kernel_1/abe/builds/destdir/x86_64-pc-linux-gnu/lib/gcc/arm-linux-gnueabihf/13.0.0/plugin/include/gimple-fold.h:86:30: error: there are no arguments to ‘gsi_last’ that depend on a template parameter, so a declaration of ‘gsi_last’ must be available [-fpermissive] # 00:01:06 /home/tcwg-buildslave/workspace/tcwg_kernel_1/abe/builds/destdir/x86_64-pc-linux-gnu/lib/gcc/arm-linux-gnueabihf/13.0.0/plugin/include/gimple-fold.h:87:37: error: ‘GSI_CONTINUE_LINKING’ was not declared in this scope # 00:01:06 /home/tcwg-buildslave/workspace/tcwg_kernel_1/abe/builds/destdir/x86_64-pc-linux-gnu/lib/gcc/arm-linux-gnueabihf/13.0.0/plugin/include/gimple-fold.h:96:30: error: there are no arguments to ‘gsi_last’ that depend on a template parameter, so a declaration of ‘gsi_last’ must be available [-fpermissive] from # reset_artifacts: -10 # build_abe binutils: -9 # build_abe stage1: -5 # build_abe qemu: -2 # linux_n_obj: 19813 THIS IS THE END OF INTERESTING STUFF. BELOW ARE LINKS TO BUILDS, REPRODUCTION INSTRUCTIONS, AND THE RAW COMMIT. This commit has regressed these CI configurations: - tcwg_kernel/gnu-master-arm-lts-allyesconfig First_bad build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-master-arm-lts-allyesc… Last_good build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-master-arm-lts-allyesc… Baseline build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-master-arm-lts-allyesc… Even more details: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-master-arm-lts-allyesc… Reproduce builds: <cut> mkdir investigate-gcc-ba2068893c37deaa418d9b2126414f6824e66655 cd investigate-gcc-ba2068893c37deaa418d9b2126414f6824e66655 # Fetch scripts git clone https://git.linaro.org/toolchain/jenkins-scripts # Fetch manifests and test.sh script mkdir -p artifacts/manifests curl -o artifacts/manifests/build-baseline.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-master-arm-lts-allyesc… --fail curl -o artifacts/manifests/build-parameters.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-master-arm-lts-allyesc… --fail curl -o artifacts/test.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-master-arm-lts-allyesc… --fail chmod +x artifacts/test.sh # Reproduce the baseline build (build all pre-requisites) ./jenkins-scripts/tcwg_kernel-build.sh @@ artifacts/manifests/build-baseline.sh # Save baseline build state (which is then restored in artifacts/test.sh) mkdir -p ./bisect rsync -a --del --delete-excluded --exclude /bisect/ --exclude /artifacts/ --exclude /gcc/ ./ ./bisect/baseline/ cd gcc # Reproduce first_bad build git checkout --detach ba2068893c37deaa418d9b2126414f6824e66655 ../artifacts/test.sh # Reproduce last_good build git checkout --detach 90a8eab4a1292430467f68b65e5127f7760acc94 ../artifacts/test.sh cd .. </cut> Full commit (up to 1000 lines): <cut> commit ba2068893c37deaa418d9b2126414f6824e66655 Author: Richard Biener <rguenther(a)suse.de> Date: Thu May 12 08:24:12 2022 +0200 Make gimple_build main workers more flexible The following makes the main gimple_build API take a gimple_stmt_iterator, whether to insert before or after and an iterator update argument to make it more convenient to use in certain situations (see the tree-vect-generic.cc hunks for an example). It also makes the case we insert into the IL somewhat distinct from inserting into a standalone sequence in that it simplifies built expressions the same way as inserting and calling fold_stmt (..., follow_all_ssa_edges) would. When inserting into a standalone sequence we restrict simplification to defs within the currently building sequence. The patch only amends the tree_code gimple_build API, I will followup with converting the rest as well. The patch got larger than intended because the template forwarders now use gsi_last which introduces a dependency on gimple-iterator.h requiring mass #include re-org across the tree. There are two frontend specific files including gimple-fold.h just for some padding clearing stuff - I've removed the include and instead moved the declarations to fold-const.h (but not the implementations). Otherwise I'd have to include half of the middle-end headers in those files which I didn't much like. 2022-05-12 Richard Biener <rguenther(a)suse.de> gcc/cp/ * constexpr.cc: Remove gimple-fold.h include. gcc/c-family/ * c-omp.cc: Remove gimple-fold.h include. gcc/analyzer/ * supergraph.cc: Re-order gimple-fold.h include. gcc/ * gimple-fold.cc (gimple_build): Adjust for new main API. * gimple-fold.h (gimple_build): New main APIs with iterator, insert direction and iterator update. (gimple_build): New forwarder template. (clear_padding_type_may_have_padding_p): Remove. (clear_type_padding_in_mask): Likewise. (arith_overflowed_p): Likewise. * fold-const.h (clear_padding_type_may_have_padding_p): Declare. (clear_type_padding_in_mask): Likewise. (arith_overflowed_p): Likewise. * tree-vect-generic.cc (gimplify_build3): Use main gimple_build API. (gimplify_build2): Likewise. (gimplify_build1): Likewise. * ubsan.cc (ubsan_expand_ptr_ifn): Likewise, avoid extra compare stmt. * gengtype.cc (open_base_files): Re-order includes. * builtins.cc: Re-order gimple-fold.h include. * calls.cc: Likewise. * cgraphbuild.cc: Likewise. * cgraphunit.cc: Likewise. * config/rs6000/rs6000-builtin.cc: Likewise. * config/rs6000/rs6000-call.cc: Likewise. * config/rs6000/rs6000.cc: Likewise. * config/s390/s390.cc: Likewise. * expr.cc: Likewise. * fold-const.cc: Likewise. * function-tests.cc: Likewise. * gimple-match-head.cc: Likewise. * gimple-range-fold.cc: Likewise. * gimple-ssa-evrp-analyze.cc: Likewise. * gimple-ssa-evrp.cc: Likewise. * gimple-ssa-sprintf.cc: Likewise. * gimple-ssa-warn-access.cc: Likewise. * gimplify.cc: Likewise. * graphite-isl-ast-to-gimple.cc: Likewise. * ipa-cp.cc: Likewise. * ipa-devirt.cc: Likewise. * ipa-prop.cc: Likewise. * omp-low.cc: Likewise. * pointer-query.cc: Likewise. * range-op.cc: Likewise. * tree-cfg.cc: Likewise. * tree-if-conv.cc: Likewise. * tree-inline.cc: Likewise. * tree-object-size.cc: Likewise. * tree-ssa-ccp.cc: Likewise. * tree-ssa-dom.cc: Likewise. * tree-ssa-forwprop.cc: Likewise. * tree-ssa-ifcombine.cc: Likewise. * tree-ssa-loop-ivcanon.cc: Likewise. * tree-ssa-math-opts.cc: Likewise. * tree-ssa-pre.cc: Likewise. * tree-ssa-propagate.cc: Likewise. * tree-ssa-reassoc.cc: Likewise. * tree-ssa-sccvn.cc: Likewise. * tree-ssa-strlen.cc: Likewise. * tree-ssa.cc: Likewise. * value-pointer-equiv.cc: Likewise. * vr-values.cc: Likewise. gcc/testsuite/ * gcc.dg/plugin/diagnostic_group_plugin.c: Reorder or remove gimple-fold.h include. * gcc.dg/plugin/diagnostic_plugin_show_trees.c: Likewise. * gcc.dg/plugin/diagnostic_plugin_test_inlining.c: Likewise. * gcc.dg/plugin/diagnostic_plugin_test_metadata.c: Likewise. * gcc.dg/plugin/diagnostic_plugin_test_paths.c: Likewise. * gcc.dg/plugin/diagnostic_plugin_test_show_locus.c: Likewise. * gcc.dg/plugin/diagnostic_plugin_test_string_literals.c: Likewise. * gcc.dg/plugin/diagnostic_plugin_test_tree_expression_range.c: Likewise. * gcc.dg/plugin/finish_unit_plugin.c: Likewise. * gcc.dg/plugin/ggcplug.c: Likewise. * gcc.dg/plugin/must_tail_call_plugin.c: Likewise. * gcc.dg/plugin/one_time_plugin.c: Likewise. * gcc.dg/plugin/selfassign.c: Likewise. * gcc.dg/plugin/start_unit_plugin.c: Likewise. * g++.dg/plugin/selfassign.c: Likewise. --- gcc/analyzer/supergraph.cc | 4 +- gcc/builtins.cc | 2 +- gcc/c-family/c-omp.cc | 1 - gcc/calls.cc | 1 + gcc/cgraphbuild.cc | 2 +- gcc/cgraphunit.cc | 2 +- gcc/config/rs6000/rs6000-builtin.cc | 2 +- gcc/config/rs6000/rs6000-call.cc | 2 +- gcc/config/rs6000/rs6000.cc | 2 +- gcc/config/s390/s390.cc | 1 + gcc/cp/constexpr.cc | 1 - gcc/expr.cc | 1 + gcc/fold-const.cc | 1 + gcc/fold-const.h | 5 ++ gcc/function-tests.cc | 3 +- gcc/gengtype.cc | 6 +- gcc/gimple-fold.cc | 93 ++++++++++++++++++---- gcc/gimple-fold.h | 34 +++++--- gcc/gimple-match-head.cc | 1 + gcc/gimple-range-fold.cc | 1 + gcc/gimple-ssa-evrp-analyze.cc | 2 +- gcc/gimple-ssa-evrp.cc | 2 +- gcc/gimple-ssa-sprintf.cc | 2 +- gcc/gimple-ssa-warn-access.cc | 2 +- gcc/gimplify.cc | 2 +- gcc/graphite-isl-ast-to-gimple.cc | 2 +- gcc/ipa-cp.cc | 1 + gcc/ipa-devirt.cc | 1 + gcc/ipa-prop.cc | 2 +- gcc/omp-low.cc | 2 +- gcc/pointer-query.cc | 1 + gcc/range-op.cc | 2 +- gcc/testsuite/g++.dg/plugin/selfassign.c | 4 +- .../gcc.dg/plugin/diagnostic_group_plugin.c | 4 +- .../gcc.dg/plugin/diagnostic_plugin_show_trees.c | 4 +- .../plugin/diagnostic_plugin_test_inlining.c | 4 +- .../plugin/diagnostic_plugin_test_metadata.c | 4 +- .../gcc.dg/plugin/diagnostic_plugin_test_paths.c | 4 +- .../plugin/diagnostic_plugin_test_show_locus.c | 4 +- .../diagnostic_plugin_test_string_literals.c | 4 +- .../diagnostic_plugin_test_tree_expression_range.c | 4 +- gcc/testsuite/gcc.dg/plugin/finish_unit_plugin.c | 1 - gcc/testsuite/gcc.dg/plugin/ggcplug.c | 1 - .../gcc.dg/plugin/must_tail_call_plugin.c | 1 - gcc/testsuite/gcc.dg/plugin/one_time_plugin.c | 1 - gcc/testsuite/gcc.dg/plugin/selfassign.c | 4 +- gcc/testsuite/gcc.dg/plugin/start_unit_plugin.c | 1 - gcc/tree-cfg.cc | 2 +- gcc/tree-if-conv.cc | 2 +- gcc/tree-inline.cc | 2 +- gcc/tree-object-size.cc | 2 +- gcc/tree-ssa-ccp.cc | 2 +- gcc/tree-ssa-dom.cc | 2 +- gcc/tree-ssa-forwprop.cc | 2 +- gcc/tree-ssa-ifcombine.cc | 2 +- gcc/tree-ssa-loop-ivcanon.cc | 2 +- gcc/tree-ssa-math-opts.cc | 2 +- gcc/tree-ssa-pre.cc | 2 +- gcc/tree-ssa-propagate.cc | 2 +- gcc/tree-ssa-reassoc.cc | 2 +- gcc/tree-ssa-sccvn.cc | 2 +- gcc/tree-ssa-strlen.cc | 2 +- gcc/tree-ssa.cc | 2 +- gcc/tree-vect-generic.cc | 15 +--- gcc/ubsan.cc | 9 +-- gcc/value-pointer-equiv.cc | 2 +- gcc/vr-values.cc | 2 +- 67 files changed, 180 insertions(+), 111 deletions(-) diff --git a/gcc/analyzer/supergraph.cc b/gcc/analyzer/supergraph.cc index 466f9245181..f023c533a09 100644 --- a/gcc/analyzer/supergraph.cc +++ b/gcc/analyzer/supergraph.cc @@ -29,13 +29,13 @@ along with GCC; see the file COPYING3. If not see #include "ggc.h" #include "basic-block.h" #include "function.h" +#include "gimple.h" +#include "gimple-iterator.h" #include "gimple-fold.h" #include "tree-eh.h" #include "gimple-expr.h" #include "is-a.h" #include "timevar.h" -#include "gimple.h" -#include "gimple-iterator.h" #include "gimple-pretty-print.h" #include "tree-pretty-print.h" #include "graphviz.h" diff --git a/gcc/builtins.cc b/gcc/builtins.cc index 5b085e3a14f..5fc89adf01b 100644 --- a/gcc/builtins.cc +++ b/gcc/builtins.cc @@ -67,13 +67,13 @@ along with GCC; see the file COPYING3. If not see #include "asan.h" #include "internal-fn.h" #include "case-cfn-macros.h" +#include "gimple-iterator.h" #include "gimple-fold.h" #include "intl.h" #include "file-prefix-map.h" /* remap_macro_filename() */ #include "gomp-constants.h" #include "omp-general.h" #include "tree-dfa.h" -#include "gimple-iterator.h" #include "gimple-ssa.h" #include "tree-ssa-live.h" #include "tree-outof-ssa.h" diff --git a/gcc/c-family/c-omp.cc b/gcc/c-family/c-omp.cc index 987ba7d724a..01ef4ee4023 100644 --- a/gcc/c-family/c-omp.cc +++ b/gcc/c-family/c-omp.cc @@ -36,7 +36,6 @@ along with GCC; see the file COPYING3. If not see #include "gimplify.h" #include "langhooks.h" #include "bitmap.h" -#include "gimple-fold.h" /* Complete a #pragma oacc wait construct. LOC is the location of diff --git a/gcc/calls.cc b/gcc/calls.cc index 4d0bc45be28..bbaf69c2d67 100644 --- a/gcc/calls.cc +++ b/gcc/calls.cc @@ -55,6 +55,7 @@ along with GCC; see the file COPYING3. If not see #include "hash-traits.h" #include "attribs.h" #include "builtins.h" +#include "gimple-iterator.h" #include "gimple-fold.h" #include "attr-fnspec.h" #include "value-query.h" diff --git a/gcc/cgraphbuild.cc b/gcc/cgraphbuild.cc index 138484c2767..fdd17aa5a2d 100644 --- a/gcc/cgraphbuild.cc +++ b/gcc/cgraphbuild.cc @@ -26,8 +26,8 @@ along with GCC; see the file COPYING3. If not see #include "gimple.h" #include "tree-pass.h" #include "cgraph.h" -#include "gimple-fold.h" #include "gimple-iterator.h" +#include "gimple-fold.h" #include "gimple-walk.h" #include "ipa-utils.h" #include "except.h" diff --git a/gcc/cgraphunit.cc b/gcc/cgraphunit.cc index bc3dc754481..e77bf97bea3 100644 --- a/gcc/cgraphunit.cc +++ b/gcc/cgraphunit.cc @@ -179,9 +179,9 @@ along with GCC; see the file COPYING3. If not see #include "stor-layout.h" #include "output.h" #include "cfgcleanup.h" +#include "gimple-iterator.h" #include "gimple-fold.h" #include "gimplify.h" -#include "gimple-iterator.h" #include "gimplify-me.h" #include "tree-cfg.h" #include "tree-into-ssa.h" diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc index e925ba9fad9..b60dde9dfbc 100644 --- a/gcc/config/rs6000/rs6000-builtin.cc +++ b/gcc/config/rs6000/rs6000-builtin.cc @@ -45,8 +45,8 @@ #include "expr.h" #include "langhooks.h" #include "gimplify.h" -#include "gimple-fold.h" #include "gimple-iterator.h" +#include "gimple-fold.h" #include "ssa.h" #include "tree-ssa-propagate.h" #include "builtins.h" diff --git a/gcc/config/rs6000/rs6000-call.cc b/gcc/config/rs6000/rs6000-call.cc index f06c69252b2..6011fe8d3c5 100644 --- a/gcc/config/rs6000/rs6000-call.cc +++ b/gcc/config/rs6000/rs6000-call.cc @@ -55,8 +55,8 @@ #include "common/common-target.h" #include "langhooks.h" #include "gimplify.h" -#include "gimple-fold.h" #include "gimple-iterator.h" +#include "gimple-fold.h" #include "ssa.h" #include "tree-ssa-propagate.h" #include "builtins.h" diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 5cb8a53e9ce..d4defc855d0 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -58,8 +58,8 @@ #include "reload.h" #include "sched-int.h" #include "gimplify.h" -#include "gimple-fold.h" #include "gimple-iterator.h" +#include "gimple-fold.h" #include "gimple-walk.h" #include "ssa.h" #include "tree-vectorizer.h" diff --git a/gcc/config/s390/s390.cc b/gcc/config/s390/s390.cc index 7c3bd6cbe7f..45bbb6c3d70 100644 --- a/gcc/config/s390/s390.cc +++ b/gcc/config/s390/s390.cc @@ -70,6 +70,7 @@ along with GCC; see the file COPYING3. If not see #include "debug.h" #include "langhooks.h" #include "internal-fn.h" +#include "gimple-iterator.h" #include "gimple-fold.h" #include "tree-eh.h" #include "gimplify.h" diff --git a/gcc/cp/constexpr.cc b/gcc/cp/constexpr.cc index e560d842e8c..433fa767c03 100644 --- a/gcc/cp/constexpr.cc +++ b/gcc/cp/constexpr.cc @@ -31,7 +31,6 @@ along with GCC; see the file COPYING3. If not see #include "builtins.h" #include "tree-inline.h" #include "ubsan.h" -#include "gimple-fold.h" #include "timevar.h" #include "fold-const-call.h" #include "stor-layout.h" diff --git a/gcc/expr.cc b/gcc/expr.cc index 5f7142b975a..18060911793 100644 --- a/gcc/expr.cc +++ b/gcc/expr.cc @@ -60,6 +60,7 @@ along with GCC; see the file COPYING3. If not see #include "tree-ssa-address.h" #include "builtins.h" #include "ccmp.h" +#include "gimple-iterator.h" #include "gimple-fold.h" #include "rtx-vector-builder.h" #include "tree-pretty-print.h" diff --git a/gcc/fold-const.cc b/gcc/fold-const.cc index a57ad0739fb..7bf12315293 100644 --- a/gcc/fold-const.cc +++ b/gcc/fold-const.cc @@ -70,6 +70,7 @@ along with GCC; see the file COPYING3. If not see #include "tree-dfa.h" #include "builtins.h" #include "generic-match.h" +#include "gimple-iterator.h" #include "gimple-fold.h" #include "tree-into-ssa.h" #include "md5.h" diff --git a/gcc/fold-const.h b/gcc/fold-const.h index a4ff55418a5..fe78a4d0a58 100644 --- a/gcc/fold-const.h +++ b/gcc/fold-const.h @@ -245,6 +245,11 @@ extern tree fold_build_pointer_plus_hwi_loc (location_t loc, tree ptr, HOST_WIDE #define fold_build_pointer_plus_hwi(p,o) \ fold_build_pointer_plus_hwi_loc (UNKNOWN_LOCATION, p, o) +/* In gimple-fold.cc. */ +extern void clear_type_padding_in_mask (tree, unsigned char *); +extern bool clear_padding_type_may_have_padding_p (tree); +extern bool arith_overflowed_p (enum tree_code, const_tree, const_tree, + const_tree); /* Class used to compare gimple operands. */ diff --git a/gcc/function-tests.cc b/gcc/function-tests.cc index 7d7761569ad..1f983e87032 100644 --- a/gcc/function-tests.cc +++ b/gcc/function-tests.cc @@ -47,6 +47,8 @@ along with GCC; see the file COPYING3. If not see #include "basic-block.h" #include "tree-ssa-alias.h" #include "internal-fn.h" +#include "gimple.h" +#include "gimple-iterator.h" #include "gimple-fold.h" #include "gimple-expr.h" #include "toplev.h" @@ -67,7 +69,6 @@ along with GCC; see the file COPYING3. If not see #include "internal-fn.h" #include "gimple-expr.h" #include "is-a.h" -#include "gimple.h" #include "tree-pass.h" #include "context.h" #include "hash-map.h" diff --git a/gcc/gengtype.cc b/gcc/gengtype.cc index e11da9e46d0..19676251fdb 100644 --- a/gcc/gengtype.cc +++ b/gcc/gengtype.cc @@ -1703,9 +1703,9 @@ open_base_files (void) "alias.h", "insn-config.h", "flags.h", "expmed.h", "dojump.h", "explow.h", "calls.h", "memmodel.h", "emit-rtl.h", "varasm.h", "stmt.h", "expr.h", "alloc-pool.h", "cselib.h", "insn-addr.h", - "optabs.h", "libfuncs.h", "debug.h", "internal-fn.h", "gimple-fold.h", - "value-range.h", - "tree-eh.h", "gimple-iterator.h", "gimple-ssa.h", "tree-cfg.h", + "optabs.h", "libfuncs.h", "debug.h", "internal-fn.h", + "gimple-iterator.h", "gimple-fold.h", "value-range.h", + "tree-eh.h", "gimple-ssa.h", "tree-cfg.h", "tree-vrp.h", "tree-phinodes.h", "ssa-iterators.h", "stringpool.h", "tree-ssanames.h", "tree-ssa-loop.h", "tree-ssa-loop-ivopts.h", "tree-ssa-loop-manip.h", "tree-ssa-loop-niter.h", "tree-into-ssa.h", diff --git a/gcc/gimple-fold.cc b/gcc/gimple-fold.cc index 7baec119ba3..e086b0310ef 100644 --- a/gcc/gimple-fold.cc +++ b/gcc/gimple-fold.cc @@ -37,9 +37,9 @@ along with GCC; see the file COPYING3. If not see #include "expr.h" #include "stor-layout.h" #include "dumpfile.h" +#include "gimple-iterator.h" #include "gimple-fold.h" #include "gimplify.h" -#include "gimple-iterator.h" #include "tree-into-ssa.h" #include "tree-dfa.h" #include "tree-object-size.h" @@ -8669,14 +8669,23 @@ gimple_build_valueize (tree op) /* Build the expression CODE OP0 of type TYPE with location LOC, simplifying it first if possible. Returns the built - expression value and appends statements possibly defining it - to SEQ. */ + expression value and inserts statements possibly defining it + before GSI if BEFORE is true or after GSI if false and advance + the iterator accordingly. + If gsi refers to a basic block simplifying is allowed to look + at all SSA defs while when it does not it is restricted to + SSA defs that are not associated with a basic block yet, + indicating they belong to the currently building sequence. */ tree -gimple_build (gimple_seq *seq, location_t loc, - enum tree_code code, tree type, tree op0) +gimple_build (gimple_stmt_iterator *gsi, + bool before, gsi_iterator_update update, + location_t loc, enum tree_code code, tree type, tree op0) { - tree res = gimple_simplify (code, type, op0, seq, gimple_build_valueize); + gimple_seq seq = NULL; + tree res + = gimple_simplify (code, type, op0, &seq, + gsi->bb ? follow_all_ssa_edges : gimple_build_valueize); if (!res) { res = create_tmp_reg_or_ssa_name (type); @@ -8688,7 +8697,21 @@ gimple_build (gimple_seq *seq, location_t loc, else stmt = gimple_build_assign (res, code, op0); gimple_set_location (stmt, loc); - gimple_seq_add_stmt_without_update (seq, stmt); + gimple_seq_add_stmt_without_update (&seq, stmt); + } + if (before) + { + if (gsi->bb) + gsi_insert_seq_before (gsi, seq, update); + else + gsi_insert_seq_before_without_update (gsi, seq, update); + } + else + { + if (gsi->bb) + gsi_insert_seq_after (gsi, seq, update); + else + gsi_insert_seq_after_without_update (gsi, seq, update); } return res; } @@ -8699,16 +8722,35 @@ gimple_build (gimple_seq *seq, location_t loc, to SEQ. */ tree -gimple_build (gimple_seq *seq, location_t loc, - enum tree_code code, tree type, tree op0, tree op1) +gimple_build (gimple_stmt_iterator *gsi, + bool before, gsi_iterator_update update, + location_t loc, enum tree_code code, tree type, + tree op0, tree op1) { - tree res = gimple_simplify (code, type, op0, op1, seq, gimple_build_valueize); + gimple_seq seq = NULL; + tree res + = gimple_simplify (code, type, op0, op1, &seq, + gsi->bb ? follow_all_ssa_edges : gimple_build_valueize); if (!res) { res = create_tmp_reg_or_ssa_name (type); gimple *stmt = gimple_build_assign (res, code, op0, op1); gimple_set_location (stmt, loc); - gimple_seq_add_stmt_without_update (seq, stmt); + gimple_seq_add_stmt_without_update (&seq, stmt); + } + if (before) + { + if (gsi->bb) + gsi_insert_seq_before (gsi, seq, update); + else + gsi_insert_seq_before_without_update (gsi, seq, update); + } + else + { + if (gsi->bb) + gsi_insert_seq_after (gsi, seq, update); + else + gsi_insert_seq_after_without_update (gsi, seq, update); } return res; } @@ -8719,11 +8761,16 @@ gimple_build (gimple_seq *seq, location_t loc, to SEQ. */ tree -gimple_build (gimple_seq *seq, location_t loc, - enum tree_code code, tree type, tree op0, tree op1, tree op2) +gimple_build (gimple_stmt_iterator *gsi, + bool before, gsi_iterator_update update, + location_t loc, enum tree_code code, tree type, + tree op0, tree op1, tree op2) { - tree res = gimple_simplify (code, type, op0, op1, op2, - seq, gimple_build_valueize); + + gimple_seq seq = NULL; + tree res + = gimple_simplify (code, type, op0, op1, op2, &seq, + gsi->bb ? follow_all_ssa_edges : gimple_build_valueize); if (!res) { res = create_tmp_reg_or_ssa_name (type); @@ -8734,7 +8781,21 @@ gimple_build (gimple_seq *seq, location_t loc, else stmt = gimple_build_assign (res, code, op0, op1, op2); gimple_set_location (stmt, loc); - gimple_seq_add_stmt_without_update (seq, stmt); + gimple_seq_add_stmt_without_update (&seq, stmt); + } + if (before) + { + if (gsi->bb) + gsi_insert_seq_before (gsi, seq, update); + else + gsi_insert_seq_before_without_update (gsi, seq, update); + } + else + { + if (gsi->bb) + gsi_insert_seq_after (gsi, seq, update); + else + gsi_insert_seq_after_without_update (gsi, seq, update); } return res; } diff --git a/gcc/gimple-fold.h b/gcc/gimple-fold.h index 850f917bbc1..520fde861e3 100644 --- a/gcc/gimple-fold.h +++ b/gcc/gimple-fold.h @@ -38,12 +38,8 @@ extern tree maybe_fold_and_comparisons (tree, enum tree_code, tree, tree, extern tree maybe_fold_or_comparisons (tree, enum tree_code, tree, tree, enum tree_code, tree, tree, basic_block = nullptr); -extern bool clear_padding_type_may_have_padding_p (tree); -extern void clear_type_padding_in_mask (tree, unsigned char *); extern bool optimize_atomic_compare_exchange_p (gimple *); extern void fold_builtin_atomic_compare_exchange (gimple_stmt_iterator *); -extern bool arith_overflowed_p (enum tree_code, const_tree, const_tree, - const_tree); extern tree no_follow_ssa_edges (tree); extern tree follow_single_use_edges (tree); extern tree follow_all_ssa_edges (tree); @@ -71,19 +67,35 @@ extern tree tree_vec_extract (gimple_stmt_iterator *, tree, tree, tree, tree); /* gimple_build, functionally matching fold_buildN, outputs stmts int the provided sequence, matching and simplifying them on-the-fly. Supposed to replace force_gimple_operand (fold_buildN (...), ...). */ -extern tree gimple_build (gimple_seq *, location_t, - enum tree_code, tree, tree); -extern tree gimple_build (gimple_seq *, location_t, - enum tree_code, tree, tree, tree); -extern tree gimple_build (gimple_seq *, location_t, - enum tree_code, tree, tree, tree, tree); +extern tree gimple_build (gimple_stmt_iterator *, bool, + enum gsi_iterator_update, + location_t, enum tree_code, tree, tree); +extern tree gimple_build (gimple_stmt_iterator *, bool, + enum gsi_iterator_update, + location_t, enum tree_code, tree, tree, tree); +extern tree gimple_build (gimple_stmt_iterator *, bool, + enum gsi_iterator_update, + location_t, enum tree_code, tree, tree, tree, tree); +template<class ...Args> +inline tree +gimple_build (gimple_seq *seq, location_t loc, + enum tree_code code, tree type, Args ...ops) +{ + static_assert (sizeof...(ops) > 0 && sizeof...(ops) <= 3, + "Number of operands must be from one to three"); + gimple_stmt_iterator gsi = gsi_last (*seq); + return gimple_build (&gsi, false, GSI_CONTINUE_LINKING, + loc, code, type, ops...); +} template<class ...Args> inline tree gimple_build (gimple_seq *seq, enum tree_code code, tree type, Args ...ops) { static_assert (sizeof...(ops) > 0 && sizeof...(ops) <= 3, "Number of operands must be from one to three"); - return gimple_build (seq, UNKNOWN_LOCATION, code, type, ops...); + gimple_stmt_iterator gsi = gsi_last (*seq); + return gimple_build (&gsi, false, GSI_CONTINUE_LINKING, + UNKNOWN_LOCATION, code, type, ops...); } extern tree gimple_build (gimple_seq *, location_t, combined_fn, tree); diff --git a/gcc/gimple-match-head.cc b/gcc/gimple-match-head.cc index 1c74d38088f..4c80d77f8ba 100644 --- a/gcc/gimple-match-head.cc +++ b/gcc/gimple-match-head.cc @@ -31,6 +31,7 @@ along with GCC; see the file COPYING3. If not see #include "fold-const.h" #include "fold-const-call.h" #include "stor-layout.h" +#include "gimple-iterator.h" #include "gimple-fold.h" #include "calls.h" #include "tree-dfa.h" diff --git a/gcc/gimple-range-fold.cc b/gcc/gimple-range-fold.cc index 3169e29b5de..08d791a0418 100644 --- a/gcc/gimple-range-fold.cc +++ b/gcc/gimple-range-fold.cc @@ -29,6 +29,7 @@ along with GCC; see the file COPYING3. If not see #include "ssa.h" #include "gimple-pretty-print.h" #include "optabs-tree.h" +#include "gimple-iterator.h" #include "gimple-fold.h" #include "wide-int.h" #include "fold-const.h" diff --git a/gcc/gimple-ssa-evrp-analyze.cc b/gcc/gimple-ssa-evrp-analyze.cc index fec6e87ba80..16e5a75b1db 100644 --- a/gcc/gimple-ssa-evrp-analyze.cc +++ b/gcc/gimple-ssa-evrp-analyze.cc @@ -27,9 +27,9 @@ along with GCC; see the file COPYING3. If not see #include "ssa.h" #include "gimple-pretty-print.h" #include "cfganal.h" +#include "gimple-iterator.h" #include "gimple-fold.h" #include "tree-eh.h" -#include "gimple-iterator.h" #include "tree-cfg.h" #include "tree-ssa-loop-manip.h" #include "tree-ssa-loop.h" diff --git a/gcc/gimple-ssa-evrp.cc b/gcc/gimple-ssa-evrp.cc index 2baaed6d978..92dbdd5df95 100644 --- a/gcc/gimple-ssa-evrp.cc +++ b/gcc/gimple-ssa-evrp.cc @@ -27,9 +27,9 @@ along with GCC; see the file COPYING3. If not see #include "ssa.h" #include "gimple-pretty-print.h" #include "cfganal.h" +#include "gimple-iterator.h" #include "gimple-fold.h" #include "tree-eh.h" -#include "gimple-iterator.h" #include "tree-cfg.h" #include "tree-ssa-loop-manip.h" #include "tree-ssa-loop.h" diff --git a/gcc/gimple-ssa-sprintf.cc b/gcc/gimple-ssa-sprintf.cc index 9a84fffed1a..961c1b739da 100644 --- a/gcc/gimple-ssa-sprintf.cc +++ b/gcc/gimple-ssa-sprintf.cc @@ -53,11 +53,11 @@ along with GCC; see the file COPYING3. If not see #include "gimple.h" #include "tree-pass.h" #include "ssa.h" +#include "gimple-iterator.h" #include "gimple-fold.h" #include "gimple-pretty-print.h" #include "diagnostic-core.h" #include "fold-const.h" -#include "gimple-iterator.h" #include "tree-ssa.h" #include "tree-object-size.h" #include "tree-cfg.h" diff --git a/gcc/gimple-ssa-warn-access.cc b/gcc/gimple-ssa-warn-access.cc index 39aa8186de6..c4204241c8c 100644 --- a/gcc/gimple-ssa-warn-access.cc +++ b/gcc/gimple-ssa-warn-access.cc @@ -36,8 +36,8 @@ #include "gimple-ssa-warn-restrict.h" #include "diagnostic-core.h" #include "fold-const.h" -#include "gimple-fold.h" #include "gimple-iterator.h" +#include "gimple-fold.h" #include "langhooks.h" #include "memmodel.h" #include "target.h" diff --git a/gcc/gimplify.cc b/gcc/gimplify.cc index 13413d019c4..2f6d995c385 100644 --- a/gcc/gimplify.cc +++ b/gcc/gimplify.cc @@ -42,10 +42,10 @@ along with GCC; see the file COPYING3. If not see #include "varasm.h" #include "stmt.h" #include "expr.h" +#include "gimple-iterator.h" #include "gimple-fold.h" #include "tree-eh.h" #include "gimplify.h" -#include "gimple-iterator.h" #include "stor-layout.h" #include "print-tree.h" #include "tree-iterator.h" diff --git a/gcc/graphite-isl-ast-to-gimple.cc b/gcc/graphite-isl-ast-to-gimple.cc index ea1129f0da3..45ed7704807 100644 --- a/gcc/graphite-isl-ast-to-gimple.cc +++ b/gcc/graphite-isl-ast-to-gimple.cc @@ -32,8 +32,8 @@ along with GCC; see the file COPYING3. If not see #include "gimple.h" #include "ssa.h" #include "fold-const.h" -#include "gimple-fold.h" #include "gimple-iterator.h" +#include "gimple-fold.h" #include "gimplify.h" #include "gimplify-me.h" #include "tree-eh.h" diff --git a/gcc/ipa-cp.cc b/gcc/ipa-cp.cc index 11f4a327b99..152fe7244f7 100644 --- a/gcc/ipa-cp.cc +++ b/gcc/ipa-cp.cc @@ -113,6 +113,7 @@ along with GCC; see the file COPYING3. If not see #include "cgraph.h" #include "diagnostic.h" #include "fold-const.h" +#include "gimple-iterator.h" #include "gimple-fold.h" #include "symbol-summary.h" #include "tree-vrp.h" diff --git a/gcc/ipa-devirt.cc b/gcc/ipa-devirt.cc index 6cba2085f1a..9f1442dc3cc 100644 --- a/gcc/ipa-devirt.cc +++ b/gcc/ipa-devirt.cc @@ -120,6 +120,7 @@ along with GCC; see the file COPYING3. If not see #include "print-tree.h" #include "calls.h" #include "ipa-utils.h" +#include "gimple-iterator.h" #include "gimple-fold.h" #include "symbol-summary.h" #include "tree-vrp.h" diff --git a/gcc/ipa-prop.cc b/gcc/ipa-prop.cc index 80e67e93e12..c6c745f84a0 100644 --- a/gcc/ipa-prop.cc +++ b/gcc/ipa-prop.cc @@ -31,13 +31,13 @@ along with GCC; see the file COPYING3. If not see #include "cgraph.h" #include "diagnostic.h" #include "fold-const.h" +#include "gimple-iterator.h" #include "gimple-fold.h" #include "tree-eh.h" #include "calls.h" #include "stor-layout.h" #include "print-tree.h" #include "gimplify.h" -#include "gimple-iterator.h" #include "gimplify-me.h" #include "gimple-walk.h" #include "symbol-summary.h" diff --git a/gcc/omp-low.cc b/gcc/omp-low.cc index e7818a9af5f..8aebaeecd42 100644 --- a/gcc/omp-low.cc +++ b/gcc/omp-low.cc @@ -37,9 +37,9 @@ along with GCC; see the file COPYING3. If not see #include "fold-const.h" #include "stor-layout.h" #include "internal-fn.h" +#include "gimple-iterator.h" #include "gimple-fold.h" #include "gimplify.h" -#include "gimple-iterator.h" #include "gimplify-me.h" #include "gimple-walk.h" #include "tree-iterator.h" diff --git a/gcc/pointer-query.cc b/gcc/pointer-query.cc index d93657f3206..646606e6344 100644 --- a/gcc/pointer-query.cc +++ b/gcc/pointer-query.cc @@ -33,6 +33,7 @@ #include "langhooks.h" #include "stringpool.h" #include "attribs.h" +#include "gimple-iterator.h" #include "gimple-fold.h" #include "gimple-ssa.h" #include "intl.h" diff --git a/gcc/range-op.cc b/gcc/range-op.cc index 47c6dff8f3e..eaa02309d70 100644 --- a/gcc/range-op.cc +++ b/gcc/range-op.cc @@ -38,9 +38,9 @@ along with GCC; see the file COPYING3. If not see #include "stor-layout.h" #include "calls.h" #include "cfganal.h" +#include "gimple-iterator.h" #include "gimple-fold.h" #include "tree-eh.h" -#include "gimple-iterator.h" #include "gimple-walk.h" #include "tree-cfg.h" #include "wide-int.h" diff --git a/gcc/testsuite/g++.dg/plugin/selfassign.c b/gcc/testsuite/g++.dg/plugin/selfassign.c index 2c60c1810de..fd78f574307 100644 --- a/gcc/testsuite/g++.dg/plugin/selfassign.c +++ b/gcc/testsuite/g++.dg/plugin/selfassign.c @@ -17,12 +17,12 @@ #include "basic-block.h" #include "tree-ssa-alias.h" #include "internal-fn.h" +#include "gimple.h" +#include "gimple-iterator.h" #include "gimple-fold.h" #include "tree-eh.h" #include "gimple-expr.h" #include "is-a.h" -#include "gimple.h" -#include "gimple-iterator.h" #include "tree.h" #include "tree-pass.h" #include "intl.h" diff --git a/gcc/testsuite/gcc.dg/plugin/diagnostic_group_plugin.c b/gcc/testsuite/gcc.dg/plugin/diagnostic_group_plugin.c index 67ca701adfa..3396b384163 100644 --- a/gcc/testsuite/gcc.dg/plugin/diagnostic_group_plugin.c +++ b/gcc/testsuite/gcc.dg/plugin/diagnostic_group_plugin.c @@ -15,12 +15,12 @@ #include "basic-block.h" #include "tree-ssa-alias.h" #include "internal-fn.h" +#include "gimple.h" +#include "gimple-iterator.h" #include "gimple-fold.h" #include "tree-eh.h" #include "gimple-expr.h" #include "is-a.h" -#include "gimple.h" -#include "gimple-iterator.h" #include "tree.h" #include "tree-pass.h" #include "intl.h" diff --git a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_show_trees.c b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_show_trees.c index ac72503d92e..d81fa571c97 100644 --- a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_show_trees.c +++ b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_show_trees.c @@ -17,12 +17,12 @@ #include "basic-block.h" #include "tree-ssa-alias.h" #include "internal-fn.h" +#include "gimple.h" +#include "gimple-iterator.h" #include "gimple-fold.h" #include "tree-eh.h" #include "gimple-expr.h" #include "is-a.h" -#include "gimple.h" -#include "gimple-iterator.h" #include "tree.h" #include "tree-pass.h" #include "intl.h" diff --git a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_inlining.c b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_inlining.c index d2bfca092a7..3627f7a2b7f 100644 --- a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_inlining.c +++ b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_inlining.c @@ -15,12 +15,12 @@ #include "basic-block.h" #include "tree-ssa-alias.h" #include "internal-fn.h" +#include "gimple.h" +#include "gimple-iterator.h" #include "gimple-fold.h" #include "tree-eh.h" #include "gimple-expr.h" #include "is-a.h" -#include "gimple.h" -#include "gimple-iterator.h" #include "tree.h" #include "tree-pass.h" #include "intl.h" diff --git a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_metadata.c b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_metadata.c index a6108919b24..4b13afc093d 100644 --- a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_metadata.c +++ b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_metadata.c @@ -15,12 +15,12 @@ #include "basic-block.h" #include "tree-ssa-alias.h" #include "internal-fn.h" +#include "gimple.h" +#include "gimple-iterator.h" #include "gimple-fold.h" #include "tree-eh.h" #include "gimple-expr.h" #include "is-a.h" -#include "gimple.h" -#include "gimple-iterator.h" #include "tree.h" #include "tree-pass.h" #include "intl.h" diff --git a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_paths.c b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_paths.c index 5c2da021553..8d97fe8e8d9 100644 --- a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_paths.c +++ b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_paths.c @@ -21,12 +21,12 @@ #include "basic-block.h" #include "tree-ssa-alias.h" #include "internal-fn.h" +#include "gimple.h" +#include "gimple-iterator.h" #include "gimple-fold.h" #include "tree-eh.h" #include "gimple-expr.h" #include "is-a.h" -#include "gimple.h" -#include "gimple-iterator.h" #include "tree.h" #include "tree-pass.h" #include "intl.h" diff --git a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_show_locus.c b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_show_locus.c index 482dbda47f7..baa6b629b83 100644 --- a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_show_locus.c +++ b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_show_locus.c @@ -47,12 +47,12 @@ #include "basic-block.h" #include "tree-ssa-alias.h" #include "internal-fn.h" +#include "gimple.h" +#include "gimple-iterator.h" #include "gimple-fold.h" #include "tree-eh.h" #include "gimple-expr.h" #include "is-a.h" -#include "gimple.h" -#include "gimple-iterator.h" #include "tree.h" #include "tree-pass.h" #include "intl.h" diff --git a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_string_literals.c b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_string_literals.c index aa73dcae820..0269f728a93 100644 --- a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_string_literals.c +++ b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_string_literals.c @@ -17,12 +17,12 @@ #include "basic-block.h" #include "tree-ssa-alias.h" #include "internal-fn.h" +#include "gimple.h" +#include "gimple-iterator.h" #include "gimple-fold.h" #include "tree-eh.h" #include "gimple-expr.h" #include "is-a.h" -#include "gimple.h" -#include "gimple-iterator.h" #include "tree.h" #include "tree-pass.h" #include "intl.h" diff --git a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_tree_expression_range.c b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_tree_expression_range.c index 4a89d846dce..f5468636e06 100644 --- a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_tree_expression_range.c +++ b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_tree_expression_range.c @@ -17,12 +17,12 @@ #include "basic-block.h" #include "tree-ssa-alias.h" </cut>

3 years, 1 month

2
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[ACTIVITY] report week ending 13 May

by Peter Maydell

Progress: * UM-2 [QEMU upstream maintainership] + had a look at adding an option to allow semihosting from userspace (handy for some test case purposes); have a working prototype which I used to test the FEAT_IDST patch, but probably won't pursue further until some refactoring of the whole semihosting code has landed, to avoid conflicts + reading through the Realm Management Extension documentation: there's a Linaro Kernel Working Group sprint in Cambridge next week, and possible QEMU RME support is on the agenda + back before QEMU 6.0 we tried to fix a bug where QEMU always provided 4 PMU counters, not the number the emulated CPU really has. We had to revert that change before the 6.0 release, but then forgot to go back and revisit it afterwards. Alex reminded me of it this week, so I rebased it, fixed the problem that meant it got reverted, and sent it out for review. * QEMU-422 [QEMU Arm Neoverse V1 vCPU for TCG] + sent patch implementing FEAT_IDST + next up: FEAT_DoubleFault (likely a no-op for us, as we don't ever have physical SErrors) -- PMM

3 years, 1 month

1
0
0 0

[ACTIVITY] Report for week #18

by Thiago Jung Bauermann

Hello, # [GNU-767] Support changing SVE vector length in remote debugging * Continued working on the testsuite regressions introduced by my code. - Currently investigating a crash that happens when for some reason gdbserver thinks that the kernel doesn't support SVE and crashes while building the internal representation of the regular vector registers. # Misc - Attended Google's Fuchsia boot camp. -- Thiago

3 years, 1 month

1
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[ACTIVITY] report week ending 6 May

by Peter Maydell

Progress: * UM-2 [QEMU upstream maintainership] + tracked down the UEFI crash with KVM on AArch64 to a combination of (a) host system was heterogenous and user hadn't restricted QEMU to only running on one set of cores and (b) QEMU silently throws away the error it gets from KVM in this situation, resulting in most things seeming to work except that vcpu power on/off state isn't written to KVM and so the guest starts with all vcpus running instead of just the primary. We should really improve the error handling, but I worry that that might break previously functional setups... + tidied up some patches I wrote while doing the GICv4 work that fix an odd inconsistency in our GIC emulation where we correctly implement the right number of virtual priority bits for the CPU but always provide 8 bits of physical priority regardless of what the real CPU implementation should have, and sent them out for review + usual code review and pullreq management * QEMU-422 [QEMU Arm Neoverse V1 vCPU for TCG] + Implemented support for FEAT_S2FWB and sent patches to the list + Next up is probably FEAT_IDST (ID space trap handling) -- PMM

3 years, 1 month

1
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clang-aarch64-sve-vls-2stage builder is red for about a month

by Galina Kistanova

Hello Linaro Toolchain Working Group. clang-aarch64-sve-vls-2stage builder is red for about a month. Is anybody looking at the issue? Thanks Galina

3 years, 1 month

2
2
0 0

[ACTIVITY] Report for week #17

by Thiago Jung Bauermann

Hello, # [GNU-767] Support changing SVE vector length in remote debugging * Continued working on the testsuite regressions introduced by my code. - Realised that gdbserver uses “thread->tdesc != NULL” as a proxy of whether it has already attached to the inferior process. My change to track the target description per-thread instead of per-process invalidated this equivalence. Fixed a few places to use “proc->attached” instead, which is the direct way of testing that condition. - Now looking into an issue with gdbserver loading libthread_db.so. # Misc - Reviewed Tom Tromey's “[PATCH 00/36] C++-ify breakpoints” patch series¹. Spotted one bug. -- Thiago ¹ https://sourceware.org/pipermail/gdb-patches/2022-January/185256.html msgid:20220118194007.2853108-1-tom@tromey.com

3 years, 2 months

1
0
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[ACTIVITY] week ending May. 1 2022

by Alex Bennée

Project Stratos =============== - posted [RFC PATCH] xen/arm: p2m don't fall over on FEAT_LPA enabled hw Message-Id: <20220426160548.2020794-1-alex.bennee(a)linaro.org> - posted [PATCH v2] xen/arm: p2m don't fall over on FEAT_LPA enabled hw Message-Id: <20220428103410.2723837-1-alex.bennee(a)linaro.org> vhost-device maintainer effort ([UM-196]) - adopted [PATCH 0/2] virtio: Add vhost-user-gpio device's support Message-Id: <5f560cab92d0d789b1c94295ec74b9952907d69d.1641987128.git.viresh.kumar(a)linaro.org> - posted [RFC PATCH v2] tests/qtest: attempt to enable tests for virtio-gpio (!working) Message-Id: <20220408155704.2777166-1-alex.bennee(a)linaro.org> QEMU Upstream Work ([UM-2]) =========================== - posted [PATCH v1 00/15] testing, docs, tracepoints and cputlb hacks Message-Id: <20220408164742.2844631-1-alex.bennee(a)linaro.org> - posted [RFC PATCH] target/i386: avoid copying junk to extended ZMMReg fields Message-Id: <20220411145609.3932882-1-alex.bennee(a)linaro.org> - posted [RFC PATCH] gdb/gic: expose cpu_index via MxTxAttrs Message-Id: <20220412104519.201655-1-alex.bennee(a)linaro.org> - posted [RFC PATCH] tests/guest-debug: better handle gdb crashes Message-Id: <20220413121115.639610-1-alex.bennee(a)linaro.org> [UM-2] <https://linaro.atlassian.net/browse/UM-2> Completed Reviews [5/5] ======================= [PATCH for-7.1 v2 00/39] Logging cleanup and per-thread logfiles Message-Id: <20220326132534.543738-1-richard.henderson(a)linaro.org> [PATCH 00/17] tests/docker and tests/tcg cleanup and diet Message-Id: <20220401141326.1244422-1-pbonzini(a)redhat.com> [PATCH v1] virtio/virtio.c: include virtio prefix in error message Message-Id: <20220414112902.41390-1-codeguy.moteen(a)gmail.com> [PATCH v3 00/39] Logging cleanup and per-thread logfiles Message-Id: <20220417183019.755276-1-richard.henderson(a)linaro.org> [PATCH v3 00/60] target/arm: Cleanups, new features, new cpus Message-Id: <20220417174426.711829-1-richard.henderson(a)linaro.org> - or at least a chunk of it Absences ======== - finally got hit with COVID Current Review Queue ==================== TODO [PATCH 0/9] Record/replay refactoring and stuff Message-Id: <165062838915.526882.13230207960407998257.stgit@pasha-ThinkPad-X280> ==================================================================================================================================== TODO [RFC PATCH 0/6] virtio: Solution to restrict memory access under Xen using xen-virtio DMA ops layer Message-Id: <1649963973-22879-1-git-send-email-olekstysh(a)gmail.com> =========================================================================================================================================================================== TODO [PATCH 0/5] Vhost-user: add Virtio RSS support Message-Id: <20220408122813.1357045-1-maxime.coquelin(a)redhat.com> ==================================================================================================================== -- Alex Bennée

3 years, 2 months

1
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[ACTIVITY] report week ending 28 Apr

by Peter Maydell

Progress: * UM-2 [QEMU upstream maintainership] + investigating a bug report about the guest UEFI crashing on startup when using KVM on AArch64 with an SMP guest (sadly I haven't been able to repro it myself thus far) * QEMU-422 [QEMU Arm Neoverse V1 vCPU for TCG] + audited code to check we can enable FEAT_TTL in QEMU (ie we ignore the new TTL hint field in TLB invalidate operations) + audited code to check we can enable FEAT_BBM level 2 in QEMU (our TLB implementation never allows multiple clashing TLB entries) + audited code to check we can enable SMMUv3.2-BBML2 in our SMMUv3 (our SMMU TLB does allow multiple entries but will always select the one for the lowest level and ignore the others) + sent patches to advertise FEAT_TTL, FEAT_BBM, SMMUv3.2-BBML2 in CPU and SMMU ID registers -- PMM

3 years, 2 months

1
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0 0

[ACTIVITY] Report for week #16

by Thiago Jung Bauermann

Hello, # [GNU-767] Support changing SVE vector length in remote debugging * Found and fixed problem with the gdbserver prototype: it didn't clear the registers cache when the target description changed. The prototype is working now. * Turned my attention to the testsuite regressions introduced by my changes. Fixed one where gdbserver was crashing when debugging multi-threaded programs, and now investigating one where gdbserver returns an error when handling the ‘vRun’ remote protocol packet. # Misc * Public holiday on Thursday — but I took it on Friday instead. -- Thiago

3 years, 2 months

1
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0 0

[ACTIVITY] report week ending 22 Apr

by Peter Maydell

Progress (two half-weeks): * UM-2 [QEMU upstream maintainership] + Got the 7.0 release out of the door and handed over pullrequest processing to RTH for the 7.1 cycle \o/ + Code review backlog now pretty nearly empty (worked through several large patchsets from RTH as well as some smaller things) + two arm pullreqs for 7.1 sent out already * QEMU-420 [GICv4 emulation] + The GICv4 emulation has now made it through code review and since we've released 7.0 it is now in upstream git for 7.1 + The GICv4.1 work has been moved to a new epic QEMU-479, as we're not going to do that immediately + This epic is therefore closed! -- PMM

3 years, 2 months

1
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[ACTIVITY] Report for week #15

by Thiago Jung Bauermann

Hello, # [GNU-767] Support changing SVE vector length in remote debugging * Implemented prototype of GDB and gdbserver changing the target description in sync when the vg pseudo-register changes. The GDB side seems to be working, but gdbserver still has issues which I'm currently debugging. # Misc * Public holiday on Friday. -- Thiago

3 years, 2 months

1
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0 0

[ACTIVITY] week ending Apr. 17 2022

by Alex Bennée

Project Stratos =============== - syncs with Takihiro on VFIO networking vhost-device maintainer effort ([UM-196]) - adopted [PATCH 0/2] virtio: Add vhost-user-gpio device's support Message-Id: <5f560cab92d0d789b1c94295ec74b9952907d69d.1641987128.git.viresh.kumar(a)linaro.org> - posted [RFC PATCH v2] tests/qtest: attempt to enable tests for virtio-gpio (!working) Message-Id: <20220408155704.2777166-1-alex.bennee(a)linaro.org> QEMU Upstream Work ([UM-2]) =========================== - posted [PATCH v1 00/15] testing, docs, tracepoints and cputlb hacks Message-Id: <20220408164742.2844631-1-alex.bennee(a)linaro.org> - posted [RFC PATCH] target/i386: avoid copying junk to extended ZMMReg fields Message-Id: <20220411145609.3932882-1-alex.bennee(a)linaro.org> - posted [RFC PATCH] gdb/gic: expose cpu_index via MxTxAttrs Message-Id: <20220412104519.201655-1-alex.bennee(a)linaro.org> - posted [RFC PATCH] tests/guest-debug: better handle gdb crashes Message-Id: <20220413121115.639610-1-alex.bennee(a)linaro.org> [UM-2] <https://linaro.atlassian.net/browse/UM-2> Completed Reviews [3/3] ======================= [PATCH for-7.1 v2 00/39] Logging cleanup and per-thread logfiles Message-Id: <20220326132534.543738-1-richard.henderson(a)linaro.org> [PATCH 00/17] tests/docker and tests/tcg cleanup and diet Message-Id: <20220401141326.1244422-1-pbonzini(a)redhat.com> [PATCH v1] virtio/virtio.c: include virtio prefix in error message Message-Id: <20220414112902.41390-1-codeguy.moteen(a)gmail.com> Absences ======== - finally got hit with COVID Current Review Queue ==================== TODO [RFC PATCH 0/6] virtio: Solution to restrict memory access under Xen using xen-virtio DMA ops layer Message-Id: <1649963973-22879-1-git-send-email-olekstysh(a)gmail.com> =========================================================================================================================================================================== TODO [PATCH 0/5] Vhost-user: add Virtio RSS support Message-Id: <20220408122813.1357045-1-maxime.coquelin(a)redhat.com> ==================================================================================================================== TODO [PATCH 0/3] vhost-user: Fixes for VHOST_USER_ADD/REM_MEM_REG Message-Id: <20220407133657.155281-1-kwolf(a)redhat.com> ======================================================================================================================= -- Alex Bennée

3 years, 2 months

1
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[TCWG CI] Regression caused by gcc: tree.cc: Add tree_builtin_call_types_compatible_p [PR105150]

by ci_notify＠linaro.org

[TCWG CI] Regression caused by gcc: tree.cc: Add tree_builtin_call_types_compatible_p [PR105150]: commit 973a2ce71f8dab559fbbfc34b59e39e047df74a6 Author: Jakub Jelinek <jakub(a)redhat.com> tree.cc: Add tree_builtin_call_types_compatible_p [PR105150] Results regressed to # reset_artifacts: -10 # build_abe binutils: -9 # build_abe stage1: -5 # build_abe qemu: -2 # linux_n_obj: 7205 # First few build errors in logs: # 00:11:32 make[1]: *** [scripts/Makefile.modpost:134: modules-only.symvers] Error 1 # 00:11:32 make: *** [Makefile:1749: modules] Error 2 from # reset_artifacts: -10 # build_abe binutils: -9 # build_abe stage1: -5 # build_abe qemu: -2 # linux_n_obj: 8131 # linux build successful: all # linux boot successful: boot THIS IS THE END OF INTERESTING STUFF. BELOW ARE LINKS TO BUILDS, REPRODUCTION INSTRUCTIONS, AND THE RAW COMMIT. This commit has regressed these CI configurations: - tcwg_kernel/gnu-master-aarch64-mainline-defconfig First_bad build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-master-aarch64-mainlin… Last_good build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-master-aarch64-mainlin… Baseline build: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-master-aarch64-mainlin… Even more details: https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-master-aarch64-mainlin… Reproduce builds: <cut> mkdir investigate-gcc-973a2ce71f8dab559fbbfc34b59e39e047df74a6 cd investigate-gcc-973a2ce71f8dab559fbbfc34b59e39e047df74a6 # Fetch scripts git clone https://git.linaro.org/toolchain/jenkins-scripts # Fetch manifests and test.sh script mkdir -p artifacts/manifests curl -o artifacts/manifests/build-baseline.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-master-aarch64-mainlin… --fail curl -o artifacts/manifests/build-parameters.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-master-aarch64-mainlin… --fail curl -o artifacts/test.sh https://ci.linaro.org/job/tcwg_kernel-gnu-bisect-gnu-master-aarch64-mainlin… --fail chmod +x artifacts/test.sh # Reproduce the baseline build (build all pre-requisites) ./jenkins-scripts/tcwg_kernel-build.sh @@ artifacts/manifests/build-baseline.sh # Save baseline build state (which is then restored in artifacts/test.sh) mkdir -p ./bisect rsync -a --del --delete-excluded --exclude /bisect/ --exclude /artifacts/ --exclude /gcc/ ./ ./bisect/baseline/ cd gcc # Reproduce first_bad build git checkout --detach 973a2ce71f8dab559fbbfc34b59e39e047df74a6 ../artifacts/test.sh # Reproduce last_good build git checkout --detach 54ed6563d22694aa3e1935f89641a4f696a3a9f7 ../artifacts/test.sh cd .. </cut> Full commit (up to 1000 lines): <cut> commit 973a2ce71f8dab559fbbfc34b59e39e047df74a6 Author: Jakub Jelinek <jakub(a)redhat.com> Date: Thu Apr 7 09:10:58 2022 +0200 tree.cc: Add tree_builtin_call_types_compatible_p [PR105150] And here is the follow-up patch that does the argument checking on GENERIC. It ensures TYPE_MAIN_VARIANT == TYPE_MAIN_VARIANT compatibility on the arguments, except for pointer arguments where both builtin's prototype and actual arguments have to be pointers and satisfy tree_nop_conversion_p, and for promoted char/short arguments where argument need to have integral signed type tree_nop_conversion_p compatible with integer_type_node. 2022-04-07 Jakub Jelinek <jakub(a)redhat.com> PR tree-optimization/105150 * tree.cc (tree_builtin_call_types_compatible_p): New function. (get_call_combined_fn): Use it. * gcc.dg/pr105150.c: New test. --- gcc/testsuite/gcc.dg/pr105150.c | 8 ++++++ gcc/tree.cc | 57 ++++++++++++++++++++++++++++++++++++++++- 2 files changed, 64 insertions(+), 1 deletion(-) diff --git a/gcc/testsuite/gcc.dg/pr105150.c b/gcc/testsuite/gcc.dg/pr105150.c new file mode 100644 index 00000000000..900460c1555 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr105150.c @@ -0,0 +1,8 @@ +/* PR tree-optimization/105150 */ +/* { dg-options "-w -Ofast" } */ + +#define A(name) __typeof (__builtin_##name (0)) name (); \ + float name##1 () { return !name (1); } \ + double name##2 () { return name (1.0L); } +#define B(name) A(name) A(name##l) +B (sqrt) diff --git a/gcc/tree.cc b/gcc/tree.cc index ec200e9a7eb..8f83ea1aae3 100644 --- a/gcc/tree.cc +++ b/gcc/tree.cc @@ -8406,6 +8406,59 @@ get_callee_fndecl (const_tree call) return NULL_TREE; } +/* Return true when STMTs arguments and return value match those of FNDECL, + a decl of a builtin function. */ + +static bool +tree_builtin_call_types_compatible_p (const_tree call, tree fndecl) +{ + gcc_checking_assert (DECL_BUILT_IN_CLASS (fndecl) != NOT_BUILT_IN); + + if (DECL_BUILT_IN_CLASS (fndecl) == BUILT_IN_NORMAL) + if (tree decl = builtin_decl_explicit (DECL_FUNCTION_CODE (fndecl))) + fndecl = decl; + + if (TYPE_MAIN_VARIANT (TREE_TYPE (call)) + != TYPE_MAIN_VARIANT (TREE_TYPE (TREE_TYPE (fndecl)))) + return false; + + tree targs = TYPE_ARG_TYPES (TREE_TYPE (fndecl)); + unsigned nargs = call_expr_nargs (call); + for (unsigned i = 0; i < nargs; ++i, targs = TREE_CHAIN (targs)) + { + /* Variadic args follow. */ + if (!targs) + return true; + tree arg = CALL_EXPR_ARG (call, i); + tree type = TREE_VALUE (targs); + if (TYPE_MAIN_VARIANT (type) != TYPE_MAIN_VARIANT (TREE_TYPE (arg))) + { + /* For pointer arguments be more forgiving, e.g. due to + FILE * vs. fileptr_type_node, or say char * vs. const char * + differences etc. */ + if (POINTER_TYPE_P (type) + && POINTER_TYPE_P (TREE_TYPE (arg)) + && tree_nop_conversion_p (type, TREE_TYPE (arg))) + continue; + /* char/short integral arguments are promoted to int + by several frontends if targetm.calls.promote_prototypes + is true. Allow such promotion too. */ + if (INTEGRAL_TYPE_P (type) + && TYPE_PRECISION (type) < TYPE_PRECISION (integer_type_node) + && INTEGRAL_TYPE_P (TREE_TYPE (arg)) + && !TYPE_UNSIGNED (TREE_TYPE (arg)) + && targetm.calls.promote_prototypes (TREE_TYPE (fndecl)) + && tree_nop_conversion_p (integer_type_node, + TREE_TYPE (arg))) + continue; + return false; + } + } + if (targs && !VOID_TYPE_P (TREE_VALUE (targs))) + return false; + return true; +} + /* If CALL_EXPR CALL calls a normal built-in function or an internal function, return the associated function code, otherwise return CFN_LAST. */ @@ -8419,7 +8472,9 @@ get_call_combined_fn (const_tree call) return as_combined_fn (CALL_EXPR_IFN (call)); tree fndecl = get_callee_fndecl (call); - if (fndecl && fndecl_built_in_p (fndecl, BUILT_IN_NORMAL)) + if (fndecl + && fndecl_built_in_p (fndecl, BUILT_IN_NORMAL) + && tree_builtin_call_types_compatible_p (call, fndecl)) return as_combined_fn (DECL_FUNCTION_CODE (fndecl)); return CFN_LAST; </cut>

3 years, 2 months

1
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[ACTIVITY] Report for week #14

by Thiago Jung Bauermann

Hello, # [GNU-767] Support changing SVE vector length in remote debugging * Got prototype of variable length vectors in GDB target descriptions barely working, but fell down a rabbit hole trying to fix an issue with the vector register size being misreported by ‘sizeof()’. Decided to change tack and implement the simpler aim of updating the client and server target descriptions in sync when the vector length changes. This is Luis' idea from 2020¹, and closer to how native GDB debugging currently works in this scenario. -- Thiago ¹ https://sourceware.org/pipermail/gdb/2020-January/048341.html

3 years, 2 months

1
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[ACTIVITY] week ending Apr. 10 2022

by Alex Bennée

Project Stratos =============== vhost-device maintainer effort ([UM-196]) - maintainer review work - adopted [PATCH 0/2] virtio: Add vhost-user-gpio device's support Message-Id: <5f560cab92d0d789b1c94295ec74b9952907d69d.1641987128.git.viresh.kumar(a)linaro.org> - posted [RFC PATCH v2] tests/qtest: attempt to enable tests for virtio-gpio (!working) Message-Id: <20220408155704.2777166-1-alex.bennee(a)linaro.org> [UM-196] <https://linaro.atlassian.net/browse/UM-196> Linux RPMB Sub-system and virtio-driver ([STR-40]) - posted [PATCH v2 0/4] rpmb subsystem, uapi and virtio-rpmb driver Message-Id: <20220405093759.1126835-1-alex.bennee(a)linaro.org> - posted [RFC PATCH] tests/qtest: properly initialise the vring used idx Message-Id: <20220406173356.1891500-1-alex.bennee(a)linaro.org> [STR-40] <https://linaro.atlassian.net/browse/STR-40> QEMU Upstream Work ([UM-2]) =========================== - posted [RFC PATCH] tests/qtest: pass stdout/stderr down to subtests Message-Id: <20220407150042.2338562-1-alex.bennee(a)linaro.org> - posted [PATCH v1 00/15] testing, docs, tracepoints and cputlb hacks Message-Id: <20220408164742.2844631-1-alex.bennee(a)linaro.org> [UM-2] <https://linaro.atlassian.net/browse/UM-2> Completed Reviews [3/3] ======================= [PATCH 00/15] tests/docker and tests/tcg cleanup and diet Message-Id: <87czi6xbzo.fsf(a)linaro.org> [PATCH] plugins: Assert mmu_idx in range before use in qemu_plugin_get_hwaddr Message-Id: <20220401190233.329360-1-richard.henderson(a)linaro.org> [PATCH v3 0/5] qtests/libqos: Allow PCI tests to be run with virt-machine Message-Id: <20220210145254.157790-1-eric.auger(a)redhat.com> Absences ======== - dodging COVID while the rest of the household has it Current Review Queue ==================== TODO [PATCH v9 00/45] CXl 2.0 emulation Support Message-Id: <20220404151445.10955-19-Jonathan.Cameron(a)huawei.com> ================================================================================================================ TODO [PATCH for-7.1 v2 00/39] Logging cleanup and per-thread logfiles Message-Id: <20220326132534.543738-1-richard.henderson(a)linaro.org> ======================================================================================================================================= TODO [PATCH 00/11] edk2: update to stable202202 Message-Id: <20220308145521.3106395-1-kraxel(a)redhat.com> ======================================================================================================= -- Alex Bennée

3 years, 2 months

1
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[weekly][linaro] report week ending 8 Apr

by Peter Maydell

Progress: * UM-2 [QEMU upstream maintainership] + Finished sorting out the exynos4210 SoC interrupt wiring and sent a patchset that cleans it up and makes it stop using qemu_split_irq() + rc3 tagged this week. We will need an rc4 next week for a couple of late-breaking security fixes. * QEMU-420 [GICv4 emulation] + Finished the last bits of debugging and wiring up GICv4 support on the virt board, and sent initial patchset to the list for review: https://patchew.org/QEMU/20220408141550.1271295-1-peter.maydell@linaro.org/ -- PMM

3 years, 2 months

1
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[ACTIVITY] Report for week #13

by Thiago Jung Bauermann

Hello, # [GNU-767] Support changing SVE vector length in remote debugging * Moved tracking of this work from GNU-732 (GDB support for SME) to more specific story GNU-767. * Started writing prototype of variable length vectors in GDB target descriptions. # Basic setup / onboarding - Read a couple more Linaro processes documents. # Misc * Attended Linaro Connect Tech Day: Core Technologies. -- Thiago

3 years, 3 months

1
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[ACTIVITY] week ending Apr. 3 2022

by Alex Bennée

Project Stratos =============== - more follow-up on Re: Understanding osdep_xenforeignmemory_map mmap behaviour Message-Id: <alpine.DEB.2.22.394.2203231838130.2910984@ubuntu-linux-20-04-desktop> - various Stratos sync-ups vhost-device maintainer effort ([UM-196]) - bit of maintainer review work Linux RPMB Sub-system and virtio-driver ([STR-40]) - got [kernel] and [vhost-user] daemon passing all tests with multi-block reads/writes - will clean-up series next week for posting to the lists [STR-40] <https://linaro.atlassian.net/browse/STR-40> [kernel] <https://git.linaro.org/people/alex.bennee/linux.git/tag/?h=testing/vrpmb-re…> [vhost-user] <https://github.com/stsquad/qemu/tree/virtio/vhost-user-rpmb-v2> QEMU Upstream Work ([UM-2]) =========================== - posted [PATCH v1 0/2] some tests and plugin tweaks for SVE Message-Id: <20220328152614.2452259-1-alex.bennee(a)linaro.org> - posted [PATCH v3] tests/avocado: update aarch64_virt test to exercise -cpu max Message-Id: <20220328161357.2464572-1-alex.bennee(a)linaro.org> - posted [RFC PATCH] docs/devel: add some notes on the binfmt-image-debian targets Message-Id: <20220329095041.2758355-1-alex.bennee(a)linaro.org> [UM-2] <https://linaro.atlassian.net/browse/UM-2> Other ===== - Presented [LTD 2022 QEMU talk] - attneded some others [LTD 2022 QEMU talk] <https://resources.linaro.org/en/resource/tL9M2yyti73StqK1d9ap8f> Completed Reviews [1/1] ======================= [PATCH 00/15] tests/docker and tests/tcg cleanup and diet Message-Id: <87czi6xbzo.fsf(a)linaro.org> Absences ======== Current Review Queue ==================== TODO [PATCH 00/17] tests/docker and tests/tcg cleanup and diet Message-Id: <20220401141326.1244422-1-pbonzini(a)redhat.com> ======================================================================================================================== TODO [RFC PATCH 0/6] softfloat 128-bit integer support Message-Id: <20220328201442.175206-1-matheus.ferst(a)eldorado.org.br> ========================================================================================================================= TODO [PATCH for-7.1 v2 00/39] Logging cleanup and per-thread logfiles Message-Id: <20220326132534.543738-1-richard.henderson(a)linaro.org> ======================================================================================================================================= -- Alex Bennée

3 years, 3 months

1
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[ACTIVITY] report week ending 1 Apr

by Peter Maydell

Progress (short week, 2 days): * UM-2 [QEMU upstream maintainership] + More of the usual freeze-related work + Tracked down and fixed assertion when running with clang sanitizers + We finally got a Coverity Scan run through for the first time in a month or two, and it was full of new issues. Spent some time going through them and marking false positives or reporting the problems back to original code authors to be fixed + Looking at the tangle of interrupt lines in our exynos4210 SoC model -- this needs a refactoring and cleanup so we can get rid of its uses of an obsolete function -- PMM

3 years, 3 months

1
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Re: [TCWG CI] 456.hmmer grew in size by 9% after llvm: Extend the `uwtable` attribute with unwind table kind

by Maxim Kuvyrkov

Hi Momchil, Your patch seems to significantly increase code-size of several benchmarks — by up to 9%. Would you please investigate whether this can be avoided? Please let us know if you need assistance with reproducing the regressions. Thank you, -- Maxim Kuvyrkov https://www.linaro.org > On 25 Mar 2022, at 14:45, ci_notify(a)linaro.org wrote: > > After llvm commit 6398903ac8c141820a84f3063b7956abe1742500 > Author: Momchil Velikov <momchil.velikov(a)arm.com> > > Extend the `uwtable` attribute with unwind table kind > > the following benchmarks grew in size by more than 1%: > - 456.hmmer grew in size by 9% from 104960 to 113912 bytes > - 403.gcc grew in size by 9% from 2191632 to 2394404 bytes > - 400.perlbench grew in size by 9% from 803690 to 879478 bytes > - 458.sjeng grew in size by 5% from 102355 to 107719 bytes > - 401.bzip2 grew in size by 3% from 43428 to 44772 bytes > > Below reproducer instructions can be used to re-build both "first_bad" and "last_good" cross-toolchains used in this bisection. Naturally, the scripts will fail when triggerring benchmarking jobs if you don't have access to Linaro TCWG CI. > > For your convenience, we have uploaded tarballs with pre-processed source and assembly files at: > - First_bad save-temps: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-… > - Last_good save-temps: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-… > - Baseline save-temps: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-… > > Configuration: > - Benchmark: SPEC CPU2006 > - Toolchain: Clang + Glibc + LLVM Linker > - Version: all components were built from their tip of trunk > - Target: aarch64-linux-gnu > - Compiler flags: -Oz -flto > - Hardware: APM Mustang 8x X-Gene1 > > This benchmarking CI is work-in-progress, and we welcome feedback and suggestions at linaro-toolchain(a)lists.linaro.org . In our improvement plans is to add support for SPEC CPU2017 benchmarks and provide "perf report/annotate" data behind these reports. > > THIS IS THE END OF INTERESTING STUFF. BELOW ARE LINKS TO BUILDS, REPRODUCTION INSTRUCTIONS, AND THE RAW COMMIT. > > This commit has regressed these CI configurations: > - tcwg_bmk_llvm_apm/llvm-master-aarch64-spec2k6-Oz_LTO > > First_bad build: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-… > Last_good build: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-… > Baseline build: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-… > Even more details: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-… > > Reproduce builds: > <cut> > mkdir investigate-llvm-6398903ac8c141820a84f3063b7956abe1742500 > cd investigate-llvm-6398903ac8c141820a84f3063b7956abe1742500 > > # Fetch scripts > git clone https://git.linaro.org/toolchain/jenkins-scripts > > # Fetch manifests and test.sh script > mkdir -p artifacts/manifests > curl -o artifacts/manifests/build-baseline.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-… --fail > curl -o artifacts/manifests/build-parameters.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-… --fail > curl -o artifacts/test.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-… --fail > chmod +x artifacts/test.sh > > # Reproduce the baseline build (build all pre-requisites) > ./jenkins-scripts/tcwg_bmk-build.sh @@ artifacts/manifests/build-baseline.sh > > # Save baseline build state (which is then restored in artifacts/test.sh) > mkdir -p ./bisect > rsync -a --del --delete-excluded --exclude /bisect/ --exclude /artifacts/ --exclude /llvm/ ./ ./bisect/baseline/ > > cd llvm > > # Reproduce first_bad build > git checkout --detach 6398903ac8c141820a84f3063b7956abe1742500 > ../artifacts/test.sh > > # Reproduce last_good build > git checkout --detach 48f188433335846bba4cf3e5e9fa2150d4c0253b > ../artifacts/test.sh > > cd .. > </cut> > > Full commit (up to 1000 lines): > <cut> > commit 6398903ac8c141820a84f3063b7956abe1742500 > Author: Momchil Velikov <momchil.velikov(a)arm.com> > Date: Mon Feb 14 13:41:34 2022 +0000 > > Extend the `uwtable` attribute with unwind table kind > > We have the `clang -cc1` command-line option `-funwind-tables=1|2` and > the codegen option `VALUE_CODEGENOPT(UnwindTables, 2, 0) ///< Unwind > tables (1) or asynchronous unwind tables (2)`. However, this is > encoded in LLVM IR by the presence or the absence of the `uwtable` > attribute, i.e. we lose the information whether to generate want just > some unwind tables or asynchronous unwind tables. > > Asynchronous unwind tables take more space in the runtime image, I'd > estimate something like 80-90% more, as the difference is adding > roughly the same number of CFI directives as for prologues, only a bit > simpler (e.g. `.cfi_offset reg, off` vs. `.cfi_restore reg`). Or even > more, if you consider tail duplication of epilogue blocks. > Asynchronous unwind tables could also restrict code generation to > having only a finite number of frame pointer adjustments (an example > of *not* having a finite number of `SP` adjustments is on AArch64 when > untagging the stack (MTE) in some cases the compiler can modify `SP` > in a loop). > Having the CFI precise up to an instruction generally also means one > cannot bundle together CFI instructions once the prologue is done, > they need to be interspersed with ordinary instructions, which means > extra `DW_CFA_advance_loc` commands, further increasing the unwind > tables size. > > That is to say, async unwind tables impose a non-negligible overhead, > yet for the most common use cases (like C++ exceptions), they are not > even needed. > > This patch extends the `uwtable` attribute with an optional > value: > - `uwtable` (default to `async`) > - `uwtable(sync)`, synchronous unwind tables > - `uwtable(async)`, asynchronous (instruction precise) unwind tables > > Reviewed By: MaskRay > > Differential Revision: https://reviews.llvm.org/D114543 > --- > clang/lib/CodeGen/CGExpr.cpp | 2 +- > clang/lib/CodeGen/CodeGenModule.cpp | 4 +- > clang/test/CodeGen/asan-globals.cpp | 2 +- > clang/test/CodeGen/uwtable-attr.c | 30 +++++ > llvm/bindings/go/llvm/ir_test.go | 1 - > llvm/docs/LangRef.rst | 12 +- > llvm/include/llvm/AsmParser/LLParser.h | 1 + > llvm/include/llvm/AsmParser/LLToken.h | 2 + > llvm/include/llvm/IR/Attributes.h | 13 +++ > llvm/include/llvm/IR/Attributes.td | 2 +- > llvm/include/llvm/IR/Function.h | 12 +- > llvm/include/llvm/IR/Module.h | 4 +- > llvm/include/llvm/Support/CodeGen.h | 8 +- > llvm/lib/AsmParser/LLLexer.cpp | 2 + > llvm/lib/AsmParser/LLParser.cpp | 23 ++++ > llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 4 + > llvm/lib/CodeGen/MachineOutliner.cpp | 9 ++ > llvm/lib/IR/AttributeImpl.h | 1 + > llvm/lib/IR/Attributes.cpp | 50 ++++++++ > llvm/lib/IR/Function.cpp | 5 +- > llvm/lib/IR/Module.cpp | 11 +- > llvm/test/Assembler/uwtable-1.ll | 7 ++ > llvm/test/Assembler/uwtable-2.ll | 4 + > llvm/test/Bitcode/attributes.ll | 11 ++ > llvm/test/CodeGen/Thumb2/pacbti-m-outliner-1.ll | 4 +- > llvm/test/CodeGen/Thumb2/pacbti-m-outliner-3.ll | 5 +- > .../AddressSanitizer/module-flags.ll | 2 +- > .../Attributor/ArgumentPromotion/X86/attributes.ll | 34 +++--- > .../X86/min-legal-vector-width.ll | 128 ++++++++++----------- > llvm/test/Transforms/Attributor/align.ll | 48 ++++---- > llvm/test/Transforms/Attributor/allow_list.ll | 4 +- > .../Transforms/Attributor/cb_liveness_disabled.ll | 4 +- > .../Transforms/Attributor/cb_liveness_enabled.ll | 4 +- > .../test/Transforms/Attributor/internal-noalias.ll | 28 ++--- > llvm/test/Transforms/Attributor/liveness.ll | 12 +- > llvm/test/Transforms/Attributor/nocapture-2.ll | 48 ++++---- > llvm/test/Transforms/Attributor/nofree.ll | 38 +++--- > llvm/test/Transforms/Attributor/noreturn.ll | 12 +- > llvm/test/Transforms/Attributor/nosync.ll | 28 ++--- > llvm/test/Transforms/Attributor/returned.ll | 48 ++++---- > .../Attributor/value-simplify-pointer-info.ll | 14 +-- > llvm/test/Transforms/Attributor/willreturn.ll | 56 ++++----- > llvm/test/Transforms/FunctionAttrs/atomic.ll | 4 +- > .../Transforms/FunctionAttrs/nofree-attributor.ll | 2 +- > llvm/test/Transforms/FunctionAttrs/nofree.ll | 2 +- > llvm/test/Transforms/FunctionAttrs/nosync.ll | 16 +-- > llvm/test/Transforms/GCOVProfiling/module-flags.ll | 2 +- > .../Inputs/check_attrs.ll.funcattrs.expected | 2 +- > llvm/unittests/IR/VerifierTest.cpp | 3 +- > 49 files changed, 473 insertions(+), 295 deletions(-) > > diff --git a/clang/lib/CodeGen/CGExpr.cpp b/clang/lib/CodeGen/CGExpr.cpp > index fa45554bb54f..e0e1dd5df586 100644 > --- a/clang/lib/CodeGen/CGExpr.cpp > +++ b/clang/lib/CodeGen/CGExpr.cpp > @@ -3188,7 +3188,7 @@ static void emitCheckHandlerCall(CodeGenFunction &CGF, > B.addAttribute(llvm::Attribute::NoReturn) > .addAttribute(llvm::Attribute::NoUnwind); > } > - B.addAttribute(llvm::Attribute::UWTable); > + B.addUWTableAttr(llvm::UWTableKind::Default); > > llvm::FunctionCallee Fn = CGF.CGM.CreateRuntimeFunction( > FnType, FnName, > diff --git a/clang/lib/CodeGen/CodeGenModule.cpp b/clang/lib/CodeGen/CodeGenModule.cpp > index 772059a436d1..c99fd899ac93 100644 > --- a/clang/lib/CodeGen/CodeGenModule.cpp > +++ b/clang/lib/CodeGen/CodeGenModule.cpp > @@ -828,7 +828,7 @@ void CodeGenModule::Release() { > if (CodeGenOpts.NoPLT) > getModule().setRtLibUseGOT(); > if (CodeGenOpts.UnwindTables) > - getModule().setUwtable(); > + getModule().setUwtable(llvm::UWTableKind(CodeGenOpts.UnwindTables)); > > switch (CodeGenOpts.getFramePointer()) { > case CodeGenOptions::FramePointerKind::None: > @@ -1839,7 +1839,7 @@ void CodeGenModule::SetLLVMFunctionAttributesForDefinition(const Decl *D, > llvm::AttrBuilder B(F->getContext()); > > if (CodeGenOpts.UnwindTables) > - B.addAttribute(llvm::Attribute::UWTable); > + B.addUWTableAttr(llvm::UWTableKind(CodeGenOpts.UnwindTables)); > > if (CodeGenOpts.StackClashProtector) > B.addAttribute("probe-stack", "inline-asm"); > diff --git a/clang/test/CodeGen/asan-globals.cpp b/clang/test/CodeGen/asan-globals.cpp > index a77060b124e9..2cea167d0ea5 100644 > --- a/clang/test/CodeGen/asan-globals.cpp > +++ b/clang/test/CodeGen/asan-globals.cpp > @@ -48,7 +48,7 @@ void func() { > // RUN: %clang_cc1 -emit-llvm -fsanitize=address -funwind-tables=2 -o - %s | FileCheck %s --check-prefixes=UWTABLE > // UWTABLE: define internal void @asan.module_dtor() #[[#ATTR:]] { > // UWTABLE: attributes #[[#ATTR]] = { nounwind uwtable } > -// UWTABLE: ![[#]] = !{i32 7, !"uwtable", i32 1} > +// UWTABLE: ![[#]] = !{i32 7, !"uwtable", i32 2} > > // CHECK: !llvm.asan.globals = !{![[EXTRA_GLOBAL:[0-9]+]], ![[GLOBAL:[0-9]+]], ![[DYN_INIT_GLOBAL:[0-9]+]], ![[ATTR_GLOBAL:[0-9]+]], ![[IGNORELISTED_GLOBAL:[0-9]+]], ![[SECTIONED_GLOBAL:[0-9]+]], ![[SPECIAL_GLOBAL:[0-9]+]], ![[STATIC_VAR:[0-9]+]], ![[LITERAL:[0-9]+]]} > // CHECK: ![[EXTRA_GLOBAL]] = !{{{.*}} ![[EXTRA_GLOBAL_LOC:[0-9]+]], !"extra_global", i1 false, i1 false} > diff --git a/clang/test/CodeGen/uwtable-attr.c b/clang/test/CodeGen/uwtable-attr.c > new file mode 100644 > index 000000000000..7436db979b6b > --- /dev/null > +++ b/clang/test/CodeGen/uwtable-attr.c > @@ -0,0 +1,30 @@ > +// Test that function and modules attributes react on the command-line options, > +// it does not state the current behaviour makes sense in all cases (it does not). > + > +// RUN: %clang -S -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,DEFAULT > +// RUN: %clang -S -emit-llvm -o - %s -funwind-tables -fno-asynchronous-unwind-tables | FileCheck %s -check-prefixes=CHECK,TABLES > +// RUN: %clang -S -emit-llvm -o - %s -fno-unwind-tables -fno-asynchronous-unwind-tables | FileCheck %s -check-prefixes=CHECK,NO_TABLES > + > +// RUN: %clang -S -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,DEFAULT > +// RUN: %clang -S -emit-llvm -o - -x c++ %s -funwind-tables -fno-asynchronous-unwind-tables | FileCheck %s -check-prefixes=CHECK,TABLES > +// RUN: %clang -S -emit-llvm -o - -x c++ %s -fno-exceptions -fno-unwind-tables -fno-asynchronous-unwind-tables | FileCheck %s -check-prefixes=CHECK,NO_TABLES > + > +#ifdef __cplusplus > +extern "C" void g(void); > +struct S { ~S(); }; > +extern "C" int f() { S s; g(); return 0;}; > +#else > +void g(void); > +int f() { g(); return 0; }; > +#endif > + > +// CHECK: define {{.*}} @f() #[[#F:]] > +// CHECK: declare {{.*}} @g() #[[#]] > + > +// DEFAULT: attributes #[[#F]] = { {{.*}} uwtable{{ }}{{.*}} } > +// DEFAULT: ![[#]] = !{i32 7, !"uwtable", i32 2} > + > +// TABLES: attributes #[[#F]] = { {{.*}} uwtable(sync){{.*}} } > +// TABLES: ![[#]] = !{i32 7, !"uwtable", i32 1} > + > +// NO_TABLES-NOT: uwtable > diff --git a/llvm/bindings/go/llvm/ir_test.go b/llvm/bindings/go/llvm/ir_test.go > index 71c47d94a0ec..61b482f2ef9a 100644 > --- a/llvm/bindings/go/llvm/ir_test.go > +++ b/llvm/bindings/go/llvm/ir_test.go > @@ -83,7 +83,6 @@ func TestAttributes(t *testing.T) { > "sspstrong", > "sanitize_thread", > "sanitize_memory", > - "uwtable", > "zeroext", > "cold", > "nocf_check", > diff --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst > index 6b44b7e7355c..1a212c661597 100644 > --- a/llvm/docs/LangRef.rst > +++ b/llvm/docs/LangRef.rst > @@ -2108,12 +2108,15 @@ example: > function with a tail call. The prototype of a thunk should not be used for > optimization purposes. The caller is expected to cast the thunk prototype to > match the thunk target prototype. > -``uwtable`` > +``uwtable[(sync|async)]`` > This attribute indicates that the ABI being targeted requires that > an unwind table entry be produced for this function even if we can > show that no exceptions passes by it. This is normally the case for > the ELF x86-64 abi, but it can be disabled for some compilation > - units. > + units. The optional parameter describes what kind of unwind tables > + to generate: ``sync`` for normal unwind tables, ``async`` for asynchronous > + (instruction precise) unwind tables. Without the parameter, the attribute > + ``uwtable`` is equivalent to ``uwtable(async)``. > ``nocf_check`` > This attribute indicates that no control-flow check will be performed on > the attributed entity. It disables -fcf-protection=<> for a specific > @@ -7215,8 +7218,9 @@ functions is small. > - "frame-pointer": **Max**. The value can be 0, 1, or 2. A synthesized function > will get the "frame-pointer" function attribute, with value being "none", > "non-leaf", or "all", respectively. > -- "uwtable": **Max**. The value can be 0 or 1. If the value is 1, a synthesized > - function will get the ``uwtable`` function attribute. > +- "uwtable": **Max**. The value can be 0, 1, or 2. If the value is 1, a synthesized > + function will get the ``uwtable(sync)`` function attribute, if the value is 2, > + a synthesized function will get the ``uwtable(async)`` function attribute. > > Objective-C Garbage Collection Module Flags Metadata > ---------------------------------------------------- > diff --git a/llvm/include/llvm/AsmParser/LLParser.h b/llvm/include/llvm/AsmParser/LLParser.h > index 62af3afbc142..b2f7b9ebb721 100644 > --- a/llvm/include/llvm/AsmParser/LLParser.h > +++ b/llvm/include/llvm/AsmParser/LLParser.h > @@ -263,6 +263,7 @@ namespace llvm { > bool parseOptionalAlignment(MaybeAlign &Alignment, > bool AllowParens = false); > bool parseOptionalDerefAttrBytes(lltok::Kind AttrKind, uint64_t &Bytes); > + bool parseOptionalUWTableKind(UWTableKind &Kind); > bool parseScopeAndOrdering(bool IsAtomic, SyncScope::ID &SSID, > AtomicOrdering &Ordering); > bool parseScope(SyncScope::ID &SSID); > diff --git a/llvm/include/llvm/AsmParser/LLToken.h b/llvm/include/llvm/AsmParser/LLToken.h > index 78ebb35e0ea4..faac67ebbab9 100644 > --- a/llvm/include/llvm/AsmParser/LLToken.h > +++ b/llvm/include/llvm/AsmParser/LLToken.h > @@ -252,6 +252,8 @@ enum Kind { > kw_immarg, > kw_byref, > kw_mustprogress, > + kw_sync, > + kw_async, > > kw_type, > kw_opaque, > diff --git a/llvm/include/llvm/IR/Attributes.h b/llvm/include/llvm/IR/Attributes.h > index 74b60f1e3d05..61819b1a07fa 100644 > --- a/llvm/include/llvm/IR/Attributes.h > +++ b/llvm/include/llvm/IR/Attributes.h > @@ -22,6 +22,7 @@ > #include "llvm/ADT/StringRef.h" > #include "llvm/Config/llvm-config.h" > #include "llvm/Support/Alignment.h" > +#include "llvm/Support/CodeGen.h" > #include "llvm/Support/PointerLikeTypeTraits.h" > #include <bitset> > #include <cassert> > @@ -130,6 +131,7 @@ public: > static Attribute getWithByRefType(LLVMContext &Context, Type *Ty); > static Attribute getWithPreallocatedType(LLVMContext &Context, Type *Ty); > static Attribute getWithInAllocaType(LLVMContext &Context, Type *Ty); > + static Attribute getWithUWTableKind(LLVMContext &Context, UWTableKind Kind); > > /// For a typed attribute, return the equivalent attribute with the type > /// changed to \p ReplacementTy. > @@ -223,6 +225,9 @@ public: > /// unknown. > Optional<unsigned> getVScaleRangeMax() const; > > + // Returns the unwind table kind. > + UWTableKind getUWTableKind() const; > + > /// The Attribute is converted to a string of equivalent mnemonic. This > /// is, presumably, for writing out the mnemonics for the assembly writer. > std::string getAsString(bool InAttrGrp = false) const; > @@ -353,6 +358,7 @@ public: > std::pair<unsigned, Optional<unsigned>> getAllocSizeArgs() const; > unsigned getVScaleRangeMin() const; > Optional<unsigned> getVScaleRangeMax() const; > + UWTableKind getUWTableKind() const; > std::string getAsString(bool InAttrGrp = false) const; > > /// Return true if this attribute set belongs to the LLVMContext. > @@ -841,6 +847,9 @@ public: > /// arg. > uint64_t getParamDereferenceableOrNullBytes(unsigned ArgNo) const; > > + /// Get the unwind table kind requested for the function. > + UWTableKind getUWTableKind() const; > + > /// Return the attributes at the index as a string. > std::string getAsString(unsigned Index, bool InAttrGrp = false) const; > > @@ -1190,6 +1199,10 @@ public: > /// Attribute.getIntValue(). > AttrBuilder &addVScaleRangeAttrFromRawRepr(uint64_t RawVScaleRangeRepr); > > + /// This turns the unwind table kind into the form used internally in > + /// Attribute. > + AttrBuilder &addUWTableAttr(UWTableKind Kind); > + > ArrayRef<Attribute> attrs() const { return Attrs; } > > bool operator==(const AttrBuilder &B) const; > diff --git a/llvm/include/llvm/IR/Attributes.td b/llvm/include/llvm/IR/Attributes.td > index a03e5441827c..d7a79f90e05e 100644 > --- a/llvm/include/llvm/IR/Attributes.td > +++ b/llvm/include/llvm/IR/Attributes.td > @@ -273,7 +273,7 @@ def SwiftSelf : EnumAttr<"swiftself", [ParamAttr]>; > def SwiftAsync : EnumAttr<"swiftasync", [ParamAttr]>; > > /// Function must be in a unwind table. > -def UWTable : EnumAttr<"uwtable", [FnAttr]>; > +def UWTable : IntAttr<"uwtable", [FnAttr]>; > > /// Minimum/Maximum vscale value for function. > def VScaleRange : IntAttr<"vscale_range", [FnAttr]>; > diff --git a/llvm/include/llvm/IR/Function.h b/llvm/include/llvm/IR/Function.h > index 90095cd1bc77..1b9843e08b28 100644 > --- a/llvm/include/llvm/IR/Function.h > +++ b/llvm/include/llvm/IR/Function.h > @@ -623,15 +623,19 @@ public: > bool willReturn() const { return hasFnAttribute(Attribute::WillReturn); } > void setWillReturn() { addFnAttr(Attribute::WillReturn); } > > + /// Get what kind of unwind table entry to generate for this function. > + UWTableKind getUWTableKind() const { > + return AttributeSets.getUWTableKind(); > + } > + > /// True if the ABI mandates (or the user requested) that this > /// function be in a unwind table. > bool hasUWTable() const { > - return hasFnAttribute(Attribute::UWTable); > + return getUWTableKind() != UWTableKind::None; > } > - void setHasUWTable() { > - addFnAttr(Attribute::UWTable); > + void setUWTableKind(UWTableKind K) { > + addFnAttr(Attribute::getWithUWTableKind(getContext(), K)); > } > - > /// True if this function needs an unwind table. > bool needsUnwindTableEntry() const { > return hasUWTable() || !doesNotThrow() || hasPersonalityFn(); > diff --git a/llvm/include/llvm/IR/Module.h b/llvm/include/llvm/IR/Module.h > index 9385ecab83d2..0414adfaee4d 100644 > --- a/llvm/include/llvm/IR/Module.h > +++ b/llvm/include/llvm/IR/Module.h > @@ -888,8 +888,8 @@ public: > void setRtLibUseGOT(); > > /// Get/set whether synthesized functions should get the uwtable attribute. > - bool getUwtable() const; > - void setUwtable(); > + UWTableKind getUwtable() const; > + void setUwtable(UWTableKind Kind); > > /// Get/set whether synthesized functions should get the "frame-pointer" > /// attribute. > diff --git a/llvm/include/llvm/Support/CodeGen.h b/llvm/include/llvm/Support/CodeGen.h > index ef5cc5d19fc5..71d0ddbfe05e 100644 > --- a/llvm/include/llvm/Support/CodeGen.h > +++ b/llvm/include/llvm/Support/CodeGen.h > @@ -97,6 +97,12 @@ namespace llvm { > }; > } // namespace ZeroCallUsedRegs > > -} // end llvm namespace > + enum class UWTableKind { > + None = 0, ///< No unwind table requested > + Sync = 1, ///< "Synchronous" unwind tables > + Async = 2, ///< "Asynchronous" unwind tables (instr precise) > + Default = 2, > + }; > + } // namespace llvm > > #endif > diff --git a/llvm/lib/AsmParser/LLLexer.cpp b/llvm/lib/AsmParser/LLLexer.cpp > index e3bf41c9721b..a508660edfa5 100644 > --- a/llvm/lib/AsmParser/LLLexer.cpp > +++ b/llvm/lib/AsmParser/LLLexer.cpp > @@ -708,6 +708,8 @@ lltok::Kind LLLexer::LexIdentifier() { > KEYWORD(immarg); > KEYWORD(byref); > KEYWORD(mustprogress); > + KEYWORD(sync); > + KEYWORD(async); > > KEYWORD(type); > KEYWORD(opaque); > diff --git a/llvm/lib/AsmParser/LLParser.cpp b/llvm/lib/AsmParser/LLParser.cpp > index 4281193caf85..769601c7e633 100644 > --- a/llvm/lib/AsmParser/LLParser.cpp > +++ b/llvm/lib/AsmParser/LLParser.cpp > @@ -1333,6 +1333,13 @@ bool LLParser::parseEnumAttribute(Attribute::AttrKind Attr, AttrBuilder &B, > B.addDereferenceableOrNullAttr(Bytes); > return false; > } > + case Attribute::UWTable: { > + UWTableKind Kind; > + if (parseOptionalUWTableKind(Kind)) > + return true; > + B.addUWTableAttr(Kind); > + return false; > + } > default: > B.addAttribute(Attr); > Lex.Lex(); > @@ -1996,6 +2003,22 @@ bool LLParser::parseOptionalDerefAttrBytes(lltok::Kind AttrKind, > return false; > } > > +bool LLParser::parseOptionalUWTableKind(UWTableKind &Kind) { > + Lex.Lex(); > + Kind = UWTableKind::Default; > + if (!EatIfPresent(lltok::lparen)) > + return false; > + LocTy KindLoc = Lex.getLoc(); > + if (Lex.getKind() == lltok::kw_sync) > + Kind = UWTableKind::Sync; > + else if (Lex.getKind() == lltok::kw_async) > + Kind = UWTableKind::Async; > + else > + return error(KindLoc, "expected unwind table kind"); > + Lex.Lex(); > + return parseToken(lltok::rparen, "expected ')'"); > +} > + > /// parseOptionalCommaAlign > /// ::= > /// ::= ',' align 4 > diff --git a/llvm/lib/Bitcode/Reader/BitcodeReader.cpp b/llvm/lib/Bitcode/Reader/BitcodeReader.cpp > index 3d4b1f64b11c..5f6d980708a5 100644 > --- a/llvm/lib/Bitcode/Reader/BitcodeReader.cpp > +++ b/llvm/lib/Bitcode/Reader/BitcodeReader.cpp > @@ -1628,6 +1628,8 @@ Error BitcodeReader::parseAttributeGroupBlock() { > B.addStructRetAttr(nullptr); > else if (Kind == Attribute::InAlloca) > B.addInAllocaAttr(nullptr); > + else if (Kind == Attribute::UWTable) > + B.addUWTableAttr(UWTableKind::Default); > else if (Attribute::isEnumAttrKind(Kind)) > B.addAttribute(Kind); > else > @@ -1650,6 +1652,8 @@ Error BitcodeReader::parseAttributeGroupBlock() { > B.addAllocSizeAttrFromRawRepr(Record[++i]); > else if (Kind == Attribute::VScaleRange) > B.addVScaleRangeAttrFromRawRepr(Record[++i]); > + else if (Kind == Attribute::UWTable) > + B.addUWTableAttr(UWTableKind(Record[++i])); > } else if (Record[i] == 3 || Record[i] == 4) { // String attribute > bool HasValue = (Record[i++] == 4); > SmallString<64> KindStr; > diff --git a/llvm/lib/CodeGen/MachineOutliner.cpp b/llvm/lib/CodeGen/MachineOutliner.cpp > index 7783b5e0d3cc..d7d098278d2a 100644 > --- a/llvm/lib/CodeGen/MachineOutliner.cpp > +++ b/llvm/lib/CodeGen/MachineOutliner.cpp > @@ -623,6 +623,15 @@ MachineFunction *MachineOutliner::createOutlinedFunction( > > TII.mergeOutliningCandidateAttributes(*F, OF.Candidates); > > + // Set uwtable, so we generate eh_frame. > + UWTableKind UW = std::accumulate( > + OF.Candidates.cbegin(), OF.Candidates.cend(), UWTableKind::None, > + [](UWTableKind K, const outliner::Candidate &C) { > + return std::max(K, C.getMF()->getFunction().getUWTableKind()); > + }); > + if (UW != UWTableKind::None) > + F->setUWTableKind(UW); > + > BasicBlock *EntryBB = BasicBlock::Create(C, "entry", F); > IRBuilder<> Builder(EntryBB); > Builder.CreateRetVoid(); > diff --git a/llvm/lib/IR/AttributeImpl.h b/llvm/lib/IR/AttributeImpl.h > index 1153fb827b56..adf8a4d34a0a 100644 > --- a/llvm/lib/IR/AttributeImpl.h > +++ b/llvm/lib/IR/AttributeImpl.h > @@ -255,6 +255,7 @@ public: > std::pair<unsigned, Optional<unsigned>> getAllocSizeArgs() const; > unsigned getVScaleRangeMin() const; > Optional<unsigned> getVScaleRangeMax() const; > + UWTableKind getUWTableKind() const; > std::string getAsString(bool InAttrGrp) const; > Type *getAttributeType(Attribute::AttrKind Kind) const; > > diff --git a/llvm/lib/IR/Attributes.cpp b/llvm/lib/IR/Attributes.cpp > index 43fde64c3734..5751b99a2807 100644 > --- a/llvm/lib/IR/Attributes.cpp > +++ b/llvm/lib/IR/Attributes.cpp > @@ -205,6 +205,11 @@ Attribute Attribute::getWithInAllocaType(LLVMContext &Context, Type *Ty) { > return get(Context, InAlloca, Ty); > } > > +Attribute Attribute::getWithUWTableKind(LLVMContext &Context, > + UWTableKind Kind) { > + return get(Context, UWTable, uint64_t(Kind)); > +} > + > Attribute > Attribute::getWithAllocSizeArgs(LLVMContext &Context, unsigned ElemSizeArg, > const Optional<unsigned> &NumElemsArg) { > @@ -366,6 +371,12 @@ Optional<unsigned> Attribute::getVScaleRangeMax() const { > return unpackVScaleRangeArgs(pImpl->getValueAsInt()).second; > } > > +UWTableKind Attribute::getUWTableKind() const { > + assert(hasAttribute(Attribute::UWTable) && > + "Trying to get unwind table kind from non-uwtable attribute"); > + return UWTableKind(pImpl->getValueAsInt()); > +} > + > std::string Attribute::getAsString(bool InAttrGrp) const { > if (!pImpl) return {}; > > @@ -426,6 +437,25 @@ std::string Attribute::getAsString(bool InAttrGrp) const { > .str(); > } > > + if (hasAttribute(Attribute::UWTable)) { > + UWTableKind Kind = getUWTableKind(); > + if (Kind != UWTableKind::None) { > + return Kind == UWTableKind::Default > + ? "uwtable" > + : ("uwtable(" + > + Twine(Kind == UWTableKind::Sync ? "sync" : "async") + ")") > + .str(); > + } > + > + if (Kind != UWTableKind::None) { > + if (Kind == UWTableKind::Default) > + return "uwtable"; > + return ("uwtable(" + Twine(Kind == UWTableKind::Sync ? "sync" : "async") + > + ")") > + .str(); > + } > + } > + > // Convert target-dependent attributes to strings of the form: > // > // "kind" > @@ -710,6 +740,10 @@ Optional<unsigned> AttributeSet::getVScaleRangeMax() const { > return SetNode ? SetNode->getVScaleRangeMax() : None; > } > > +UWTableKind AttributeSet::getUWTableKind() const { > + return SetNode ? SetNode->getUWTableKind() : UWTableKind::None; > +} > + > std::string AttributeSet::getAsString(bool InAttrGrp) const { > return SetNode ? SetNode->getAsString(InAttrGrp) : ""; > } > @@ -876,6 +910,12 @@ Optional<unsigned> AttributeSetNode::getVScaleRangeMax() const { > return None; > } > > +UWTableKind AttributeSetNode::getUWTableKind() const { > + if (auto A = findEnumAttribute(Attribute::UWTable)) > + return A->getUWTableKind(); > + return UWTableKind::None; > +} > + > std::string AttributeSetNode::getAsString(bool InAttrGrp) const { > std::string Str; > for (iterator I = begin(), E = end(); I != E; ++I) { > @@ -1428,6 +1468,10 @@ AttributeList::getParamDereferenceableOrNullBytes(unsigned Index) const { > return getParamAttrs(Index).getDereferenceableOrNullBytes(); > } > > +UWTableKind AttributeList::getUWTableKind() const { > + return getFnAttrs().getUWTableKind(); > +} > + > std::string AttributeList::getAsString(unsigned Index, bool InAttrGrp) const { > return getAttributes(Index).getAsString(InAttrGrp); > } > @@ -1649,6 +1693,12 @@ AttrBuilder &AttrBuilder::addVScaleRangeAttrFromRawRepr(uint64_t RawArgs) { > return addRawIntAttr(Attribute::VScaleRange, RawArgs); > } > > +AttrBuilder &AttrBuilder::addUWTableAttr(UWTableKind Kind) { > + if (Kind == UWTableKind::None) > + return *this; > + return addRawIntAttr(Attribute::UWTable, uint64_t(Kind)); > +} > + > Type *AttrBuilder::getTypeAttr(Attribute::AttrKind Kind) const { > assert(Attribute::isTypeAttrKind(Kind) && "Not a type attribute"); > Attribute A = getAttribute(Kind); > diff --git a/llvm/lib/IR/Function.cpp b/llvm/lib/IR/Function.cpp > index 726ba80da41b..6ae3d0b4dcb9 100644 > --- a/llvm/lib/IR/Function.cpp > +++ b/llvm/lib/IR/Function.cpp > @@ -339,8 +339,9 @@ Function *Function::createWithDefaultAttr(FunctionType *Ty, > Module *M) { > auto *F = new Function(Ty, Linkage, AddrSpace, N, M); > AttrBuilder B(F->getContext()); > - if (M->getUwtable()) > - B.addAttribute(Attribute::UWTable); > + UWTableKind UWTable = M->getUwtable(); > + if (UWTable != UWTableKind::None) > + B.addUWTableAttr(UWTable); > switch (M->getFramePointer()) { > case FramePointerKind::None: > // 0 ("none") is the default. > diff --git a/llvm/lib/IR/Module.cpp b/llvm/lib/IR/Module.cpp > index 6156edd99790..b66a99ba17b0 100644 > --- a/llvm/lib/IR/Module.cpp > +++ b/llvm/lib/IR/Module.cpp > @@ -671,12 +671,15 @@ void Module::setRtLibUseGOT() { > addModuleFlag(ModFlagBehavior::Max, "RtLibUseGOT", 1); > } > > -bool Module::getUwtable() const { > - auto *Val = cast_or_null<ConstantAsMetadata>(getModuleFlag("uwtable")); > - return Val && (cast<ConstantInt>(Val->getValue())->getZExtValue() > 0); > +UWTableKind Module::getUwtable() const { > + if (auto *Val = cast_or_null<ConstantAsMetadata>(getModuleFlag("uwtable"))) > + return UWTableKind(cast<ConstantInt>(Val->getValue())->getZExtValue()); > + return UWTableKind::None; > } > > -void Module::setUwtable() { addModuleFlag(ModFlagBehavior::Max, "uwtable", 1); } > +void Module::setUwtable(UWTableKind Kind) { > + addModuleFlag(ModFlagBehavior::Max, "uwtable", uint32_t(Kind)); > +} > > FramePointerKind Module::getFramePointer() const { > auto *Val = cast_or_null<ConstantAsMetadata>(getModuleFlag("frame-pointer")); > diff --git a/llvm/test/Assembler/uwtable-1.ll b/llvm/test/Assembler/uwtable-1.ll > new file mode 100644 > index 000000000000..2e9e3f0cab6d > --- /dev/null > +++ b/llvm/test/Assembler/uwtable-1.ll > @@ -0,0 +1,7 @@ > +; RUN: not llvm-as %s -o /dev/null 2>&1 | FileCheck %s > + > +declare void @f0() uwtable > +declare void @f1() uwtable(sync) > +declare void @f2() uwtable(async) > +declare void @f3() uwtable(unsync) > +; CHECK: :[[#@LINE-1]]:28: error: expected unwind table kind > diff --git a/llvm/test/Assembler/uwtable-2.ll b/llvm/test/Assembler/uwtable-2.ll > new file mode 100644 > index 000000000000..c04228dbf157 > --- /dev/null > +++ b/llvm/test/Assembler/uwtable-2.ll > @@ -0,0 +1,4 @@ > +; RUN: not llvm-as %s -o /dev/null 2>&1 | FileCheck %s > + > +declare void @f() uwtable(sync x > +; CHECK: :[[#@LINE-1]]:32: error: expected ')' > diff --git a/llvm/test/Bitcode/attributes.ll b/llvm/test/Bitcode/attributes.ll > index b2b92bb6e12d..5d3828d2762d 100644 > --- a/llvm/test/Bitcode/attributes.ll > +++ b/llvm/test/Bitcode/attributes.ll > @@ -516,6 +516,16 @@ define void @f83(<4 x i8*> align 32 %0, <vscale x 1 x double*> align 64 %1) { > ret void > } > > +; CHECK: define void @f84() #51 > +define void @f84() uwtable(sync) { > + ret void; > +} > + > +; CHECK: define void @f85() #15 > +define void @f85() uwtable(async) { > + ret void; > +} > + > ; CHECK: attributes #0 = { noreturn } > ; CHECK: attributes #1 = { nounwind } > ; CHECK: attributes #2 = { readnone } > @@ -567,4 +577,5 @@ define void @f83(<4 x i8*> align 32 %0, <vscale x 1 x double*> align 64 %1) { > ; CHECK: attributes #48 = { nosanitize_coverage } > ; CHECK: attributes #49 = { noprofile } > ; CHECK: attributes #50 = { disable_sanitizer_instrumentation } > +; CHECK: attributes #51 = { uwtable(sync) } > ; CHECK: attributes #[[NOBUILTIN]] = { nobuiltin } > diff --git a/llvm/test/CodeGen/Thumb2/pacbti-m-outliner-1.ll b/llvm/test/CodeGen/Thumb2/pacbti-m-outliner-1.ll > index af761a4c37ec..84983411e86c 100644 > --- a/llvm/test/CodeGen/Thumb2/pacbti-m-outliner-1.ll > +++ b/llvm/test/CodeGen/Thumb2/pacbti-m-outliner-1.ll > @@ -137,7 +137,9 @@ attributes #0 = { minsize nofree norecurse nounwind optsize uwtable} > ; UNWIND-NEXT: 0xB0 ; finish > > ; UNWIND-LABEL: FunctionAddress: 0x40 > -; UNWIND: Model: CantUnwind > +; UNWIND: Opcodes [ > +; UNWIND-NEXT: 0xB0 ; finish > + > > ; UNWINND-LABEL: 00000041 {{.*}} OUTLINED_FUNCTION_0 > ; UNWINND-LABEL: 00000001 {{.*}} x > diff --git a/llvm/test/CodeGen/Thumb2/pacbti-m-outliner-3.ll b/llvm/test/CodeGen/Thumb2/pacbti-m-outliner-3.ll > index 9251e1b4ddf6..edbae593ee84 100644 > --- a/llvm/test/CodeGen/Thumb2/pacbti-m-outliner-3.ll > +++ b/llvm/test/CodeGen/Thumb2/pacbti-m-outliner-3.ll > @@ -154,8 +154,9 @@ attributes #0 = { minsize noinline norecurse nounwind optsize readnone uwtable } > ; UNWIND-NEXT: 0xAA ; pop {r4, r5, r6, lr} > > ; UNWIND-LABEL: FunctionAddress: 0x5C > -; UNWIND: Model: CantUnwind > - > +; UNWIND: 0xB4 ; pop ra_auth_code > +; UNWIND: 0x84 0x00 ; pop {lr} > + > ; UNWIND-LABEL: 0000005d {{.*}} OUTLINED_FUNCTION_0 > ; UNWIND-LABEL: 00000005 {{.*}} f > ; UNWIND-LABEL: 00000031 {{.*}} g > diff --git a/llvm/test/Instrumentation/AddressSanitizer/module-flags.ll b/llvm/test/Instrumentation/AddressSanitizer/module-flags.ll > index ca3c6f3051f1..c046592890b4 100644 > --- a/llvm/test/Instrumentation/AddressSanitizer/module-flags.ll > +++ b/llvm/test/Instrumentation/AddressSanitizer/module-flags.ll > @@ -13,7 +13,7 @@ entry: > !llvm.module.flags = !{!0, !1} > > ;; Due to -fasynchronous-unwind-tables. > -!0 = !{i32 7, !"uwtable", i32 1} > +!0 = !{i32 7, !"uwtable", i32 2} > > ;; Due to -fno-omit-frame-pointer. > !1 = !{i32 7, !"frame-pointer", i32 2} > diff --git a/llvm/test/Transforms/Attributor/ArgumentPromotion/X86/attributes.ll b/llvm/test/Transforms/Attributor/ArgumentPromotion/X86/attributes.ll > index b077dd388780..90437f5876d7 100644 > --- a/llvm/test/Transforms/Attributor/ArgumentPromotion/X86/attributes.ll > +++ b/llvm/test/Transforms/Attributor/ArgumentPromotion/X86/attributes.ll > @@ -9,7 +9,7 @@ > target triple = "x86_64-unknown-linux-gnu" > > define internal fastcc void @no_promote_avx2(<4 x i64>* %arg, <4 x i64>* readonly %arg1) #0 { > -; IS________OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn > +; IS________OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind willreturn uwtable > ; IS________OPM-LABEL: define {{[^@]+}}@no_promote_avx2 > ; IS________OPM-SAME: (<4 x i64>* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[ARG:%.*]], <4 x i64>* nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[ARG1:%.*]]) #[[ATTR0:[0-9]+]] { > ; IS________OPM-NEXT: bb: > @@ -17,7 +17,7 @@ define internal fastcc void @no_promote_avx2(<4 x i64>* %arg, <4 x i64>* readonl > ; IS________OPM-NEXT: store <4 x i64> [[TMP]], <4 x i64>* [[ARG]], align 32 > ; IS________OPM-NEXT: ret void > ; > -; IS________NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn > +; IS________NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind willreturn uwtable > ; IS________NPM-LABEL: define {{[^@]+}}@no_promote_avx2 > ; IS________NPM-SAME: (<4 x i64>* noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[ARG:%.*]], <4 x i64>* noalias nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[ARG1:%.*]]) #[[ATTR0:[0-9]+]] { > ; IS________NPM-NEXT: bb: > @@ -32,7 +32,7 @@ bb: > } > > define void @no_promote(<4 x i64>* %arg) #1 { > -; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind uwtable willreturn > +; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind willreturn uwtable > ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@no_promote > ; IS__TUNIT_OPM-SAME: (<4 x i64>* nocapture nofree writeonly [[ARG:%.*]]) #[[ATTR1:[0-9]+]] { > ; IS__TUNIT_OPM-NEXT: bb: > @@ -45,7 +45,7 @@ define void @no_promote(<4 x i64>* %arg) #1 { > ; IS__TUNIT_OPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2 > ; IS__TUNIT_OPM-NEXT: ret void > ; > -; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind uwtable willreturn > +; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn uwtable > ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@no_promote > ; IS__TUNIT_NPM-SAME: (<4 x i64>* nocapture nofree writeonly [[ARG:%.*]]) #[[ATTR1:[0-9]+]] { > ; IS__TUNIT_NPM-NEXT: bb: > @@ -58,7 +58,7 @@ define void @no_promote(<4 x i64>* %arg) #1 { > ; IS__TUNIT_NPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2 > ; IS__TUNIT_NPM-NEXT: ret void > ; > -; IS__CGSCC_OPM: Function Attrs: argmemonly nofree nosync nounwind uwtable willreturn > +; IS__CGSCC_OPM: Function Attrs: argmemonly nofree nosync nounwind willreturn uwtable > ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@no_promote > ; IS__CGSCC_OPM-SAME: (<4 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]]) #[[ATTR1:[0-9]+]] { > ; IS__CGSCC_OPM-NEXT: bb: > @@ -71,7 +71,7 @@ define void @no_promote(<4 x i64>* %arg) #1 { > ; IS__CGSCC_OPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2 > ; IS__CGSCC_OPM-NEXT: ret void > ; > -; IS__CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind uwtable willreturn > +; IS__CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn uwtable > ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@no_promote > ; IS__CGSCC_NPM-SAME: (<4 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]]) #[[ATTR1:[0-9]+]] { > ; IS__CGSCC_NPM-NEXT: bb: > @@ -96,7 +96,7 @@ bb: > } > > define internal fastcc void @promote_avx2(<4 x i64>* %arg, <4 x i64>* readonly %arg1) #0 { > -; IS________OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn > +; IS________OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind willreturn uwtable > ; IS________OPM-LABEL: define {{[^@]+}}@promote_avx2 > ; IS________OPM-SAME: (<4 x i64>* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[ARG:%.*]], <4 x i64>* nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[ARG1:%.*]]) #[[ATTR0]] { > ; IS________OPM-NEXT: bb: > @@ -104,7 +104,7 @@ define internal fastcc void @promote_avx2(<4 x i64>* %arg, <4 x i64>* readonly % > ; IS________OPM-NEXT: store <4 x i64> [[TMP]], <4 x i64>* [[ARG]], align 32 > ; IS________OPM-NEXT: ret void > ; > -; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn > +; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind willreturn uwtable > ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@promote_avx2 > ; IS__TUNIT_NPM-SAME: (<4 x i64>* noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[ARG:%.*]], <4 x i64> [[TMP0:%.*]]) #[[ATTR0]] { > ; IS__TUNIT_NPM-NEXT: bb: > @@ -114,7 +114,7 @@ define internal fastcc void @promote_avx2(<4 x i64>* %arg, <4 x i64>* readonly % > ; IS__TUNIT_NPM-NEXT: store <4 x i64> [[TMP]], <4 x i64>* [[ARG]], align 32 > ; IS__TUNIT_NPM-NEXT: ret void > ; > -; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn > +; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind willreturn uwtable > ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@promote_avx2 > ; IS__CGSCC_NPM-SAME: (<4 x i64>* noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[ARG:%.*]], <4 x i64> [[TMP0:%.*]]) #[[ATTR0]] { > ; IS__CGSCC_NPM-NEXT: bb: > @@ -131,7 +131,7 @@ bb: > } > > define void @promote(<4 x i64>* %arg) #0 { > -; IS__TUNIT_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn > +; IS__TUNIT_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind willreturn uwtable > ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@promote > ; IS__TUNIT_OPM-SAME: (<4 x i64>* nocapture nofree writeonly [[ARG:%.*]]) #[[ATTR0]] { > ; IS__TUNIT_OPM-NEXT: bb: > @@ -144,7 +144,7 @@ define void @promote(<4 x i64>* %arg) #0 { > ; IS__TUNIT_OPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2 > ; IS__TUNIT_OPM-NEXT: ret void > ; > -; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn > +; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind willreturn uwtable > ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@promote > ; IS__TUNIT_NPM-SAME: (<4 x i64>* nocapture nofree writeonly [[ARG:%.*]]) #[[ATTR0]] { > ; IS__TUNIT_NPM-NEXT: bb: > @@ -158,7 +158,7 @@ define void @promote(<4 x i64>* %arg) #0 { > ; IS__TUNIT_NPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2 > ; IS__TUNIT_NPM-NEXT: ret void > ; > -; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn > +; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind willreturn uwtable > ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@promote > ; IS__CGSCC_OPM-SAME: (<4 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]]) #[[ATTR0]] { > ; IS__CGSCC_OPM-NEXT: bb: > @@ -171,7 +171,7 @@ define void @promote(<4 x i64>* %arg) #0 { > ; IS__CGSCC_OPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2 > ; IS__CGSCC_OPM-NEXT: ret void > ; > -; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn > +; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind willreturn uwtable > ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@promote > ; IS__CGSCC_NPM-SAME: (<4 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]]) #[[ATTR0]] { > ; IS__CGSCC_NPM-NEXT: bb: > @@ -203,14 +203,14 @@ attributes #0 = { inlinehint norecurse nounwind uwtable "target-features"="+avx2 > attributes #1 = { nounwind uwtable } > attributes #2 = { argmemonly nounwind } > ;. > -; IS__TUNIT____: attributes #[[ATTR0:[0-9]+]] = { argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn "target-features"="+avx2" } > -; IS__TUNIT____: attributes #[[ATTR1:[0-9]+]] = { argmemonly nofree nosync nounwind uwtable willreturn } > +; IS__TUNIT____: attributes #[[ATTR0:[0-9]+]] = { argmemonly inlinehint nofree norecurse nosync nounwind willreturn uwtable "target-features"="+avx2" } > +; IS__TUNIT____: attributes #[[ATTR1:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn uwtable } > ; IS__TUNIT____: attributes #[[ATTR2:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly } > ; IS__TUNIT____: attributes #[[ATTR3:[0-9]+]] = { willreturn writeonly } > ; IS__TUNIT____: attributes #[[ATTR4:[0-9]+]] = { nofree nosync nounwind willreturn } > ;. > -; IS__CGSCC____: attributes #[[ATTR0:[0-9]+]] = { argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn "target-features"="+avx2" } > -; IS__CGSCC____: attributes #[[ATTR1:[0-9]+]] = { argmemonly nofree nosync nounwind uwtable willreturn } > +; IS__CGSCC____: attributes #[[ATTR0:[0-9]+]] = { argmemonly inlinehint nofree norecurse nosync nounwind willreturn uwtable "target-features"="+avx2" } > +; IS__CGSCC____: attributes #[[ATTR1:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn uwtable } > ; IS__CGSCC____: attributes #[[ATTR2:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly } > ; IS__CGSCC____: attributes #[[ATTR3:[0-9]+]] = { willreturn writeonly } > ; IS__CGSCC____: attributes #[[ATTR4:[0-9]+]] = { nosync nounwind willreturn } > diff --git a/llvm/test/Transforms/Attributor/ArgumentPromotion/X86/min-legal-vector-width.ll b/llvm/test/Transforms/Attributor/ArgumentPromotion/X86/min-legal-vector-width.ll > index a7bcf1e42252..7a2b796cb321 100644 > --- a/llvm/test/Transforms/Attributor/ArgumentPromotion/X86/min-legal-vector-width.ll > +++ b/llvm/test/Transforms/Attributor/ArgumentPromotion/X86/min-legal-vector-width.ll > @@ -11,7 +11,7 @@ target triple = "x86_64-unknown-linux-gnu" > ; This should promote > define internal fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer512(<8 x i64>* %arg, <8 x i64>* readonly %arg1) #0 { > ; > -; IS________OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn > +; IS________OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind willreturn uwtable > ; IS________OPM-LABEL: define {{[^@]+}}@callee_avx512_legal512_prefer512_call_avx512_legal512_prefer512 > ; IS________OPM-SAME: (<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[ARG:%.*]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[ARG1:%.*]]) #[[ATTR0:[0-9]+]] { > ; IS________OPM-NEXT: bb: > @@ -19,7 +19,7 @@ define internal fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal5 > ; IS________OPM-NEXT: store <8 x i64> [[TMP]], <8 x i64>* [[ARG]], align 64 > ; IS________OPM-NEXT: ret void > ; > -; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn > +; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind willreturn uwtable > ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@callee_avx512_legal512_prefer512_call_avx512_legal512_prefer512 > ; IS__TUNIT_NPM-SAME: (<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[ARG:%.*]], <8 x i64> [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] { > ; IS__TUNIT_NPM-NEXT: bb: > @@ -29,7 +29,7 @@ define internal fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal5 > ; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP]], <8 x i64>* [[ARG]], align 64 > ; IS__TUNIT_NPM-NEXT: ret void > ; > -; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn > +; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind willreturn uwtable > ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@callee_avx512_legal512_prefer512_call_avx512_legal512_prefer512 > ; IS__CGSCC_NPM-SAME: (<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[ARG:%.*]], <8 x i64> [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] { > ; IS__CGSCC_NPM-NEXT: bb: > @@ -47,7 +47,7 @@ bb: > > define void @avx512_legal512_prefer512_call_avx512_legal512_prefer512(<8 x i64>* %arg) #0 { > ; > -; IS__TUNIT_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn > +; IS__TUNIT_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind willreturn uwtable > ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer512_call_avx512_legal512_prefer512 > ; IS__TUNIT_OPM-SAME: (<8 x i64>* nocapture nofree writeonly [[ARG:%.*]]) #[[ATTR0]] { > ; IS__TUNIT_OPM-NEXT: bb: > @@ -60,7 +60,7 @@ define void @avx512_legal512_prefer512_call_avx512_legal512_prefer512(<8 x i64>* > ; IS__TUNIT_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 > ; IS__TUNIT_OPM-NEXT: ret void > ; > -; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn > +; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind willreturn uwtable > ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer512_call_avx512_legal512_prefer512 > ; IS__TUNIT_NPM-SAME: (<8 x i64>* nocapture nofree writeonly [[ARG:%.*]]) #[[ATTR0]] { > ; IS__TUNIT_NPM-NEXT: bb: > @@ -74,7 +74,7 @@ define void @avx512_legal512_prefer512_call_avx512_legal512_prefer512(<8 x i64>* > ; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 > ; IS__TUNIT_NPM-NEXT: ret void > ; > -; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn > +; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind willreturn uwtable > ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer512_call_avx512_legal512_prefer512 > ; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) #[[ATTR0]] { > ; IS__CGSCC_OPM-NEXT: bb: > @@ -87,7 +87,7 @@ define void @avx512_legal512_prefer512_call_avx512_legal512_prefer512(<8 x i64>* > ; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 > ; IS__CGSCC_OPM-NEXT: ret void > ; > -; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn > +; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind willreturn uwtable > ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer512_call_avx512_legal512_prefer512 > ; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) #[[ATTR0]] { > ; IS__CGSCC_NPM-NEXT: bb: > @@ -115,7 +115,7 @@ bb: > ; This should promote > define internal fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer256(<8 x i64>* %arg, <8 x i64>* readonly %arg1) #1 { > ; > -; IS________OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn > +; IS________OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind willreturn uwtable > ; IS________OPM-LABEL: define {{[^@]+}}@callee_avx512_legal512_prefer256_call_avx512_legal512_prefer256 > ; IS________OPM-SAME: (<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[ARG:%.*]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[ARG1:%.*]]) #[[ATTR1:[0-9]+]] { > ; IS________OPM-NEXT: bb: > @@ -123,7 +123,7 @@ define internal fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal5 > ; IS________OPM-NEXT: store <8 x i64> [[TMP]], <8 x i64>* [[ARG]], align 64 > ; IS________OPM-NEXT: ret void > ; > -; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn > +; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind willreturn uwtable > ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@callee_avx512_legal512_prefer256_call_avx512_legal512_prefer256 > ; IS__TUNIT_NPM-SAME: (<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[ARG:%.*]], <8 x i64> [[TMP0:%.*]]) #[[ATTR1:[0-9]+]] { > ; IS__TUNIT_NPM-NEXT: bb: > @@ -133,7 +133,7 @@ define internal fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal5 > ; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP]], <8 x i64>* [[ARG]], align 64 > ; IS__TUNIT_NPM-NEXT: ret void > ; > -; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn > +; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind willreturn uwtable > ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@callee_avx512_legal512_prefer256_call_avx512_legal512_prefer256 > ; IS__CGSCC_NPM-SAME: (<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[ARG:%.*]], <8 x i64> [[TMP0:%.*]]) #[[ATTR1:[0-9]+]] { > ; IS__CGSCC_NPM-NEXT: bb: > @@ -151,7 +151,7 @@ bb: > > define void @avx512_legal512_prefer256_call_avx512_legal512_prefer256(<8 x i64>* %arg) #1 { > ; > -; IS__TUNIT_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn > +; IS__TUNIT_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind willreturn uwtable > ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal512_prefer256 > ; IS__TUNIT_OPM-SAME: (<8 x i64>* nocapture nofree writeonly [[ARG:%.*]]) #[[ATTR1]] { > ; IS__TUNIT_OPM-NEXT: bb: > @@ -164,7 +164,7 @@ define void @avx512_legal512_prefer256_call_avx512_legal512_prefer256(<8 x i64>* > ; IS__TUNIT_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 > ; IS__TUNIT_OPM-NEXT: ret void > ; > -; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn > +; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind willreturn uwtable > ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal512_prefer256 > ; IS__TUNIT_NPM-SAME: (<8 x i64>* nocapture nofree writeonly [[ARG:%.*]]) #[[ATTR1]] { > ; IS__TUNIT_NPM-NEXT: bb: > @@ -178,7 +178,7 @@ define void @avx512_legal512_prefer256_call_avx512_legal512_prefer256(<8 x i64>* > ; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 > ; IS__TUNIT_NPM-NEXT: ret void > ; > -; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn > +; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind willreturn uwtable > ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal512_prefer256 > ; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) #[[ATTR1]] { > ; IS__CGSCC_OPM-NEXT: bb: > @@ -191,7 +191,7 @@ define void @avx512_legal512_prefer256_call_avx512_legal512_prefer256(<8 x i64>* > ; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 > ; IS__CGSCC_OPM-NEXT: ret void > ; > -; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn > +; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint nofree norecurse nosync nounwind willreturn uwtable > ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal512_prefer256 > ; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) #[[ATTR1]] { > ; IS__CGSCC_NPM-NEXT: bb: > @@ -219,7 +219,7 @@ bb: > ; This should promote > define internal fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer256(<8 x i64>* %arg, <8 x i64>* readonly %arg1) #1 { > </cut>

3 years, 3 months

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Re: [TCWG CI] 401.bzip2 grew in size by 11% after llvm: [MachineSink] Disable if there are any irreducible cycles

by Maxim Kuvyrkov

Hi Nikita, Your patch seems to increase code-size of 401.bzip2 by 11% at -Oz. This is due to BZ2_decompress() function growing by 56%. Would you please investigate and see if this regression can be avoided? Please let us know if you need help reproducing or analyzing the problem. Regards, -- Maxim Kuvyrkov https://www.linaro.org > On Mar 27, 2022, at 11:26 AM, ci_notify(a)linaro.org wrote: > > After llvm commit 6fde0439512580df793f3f48f95757b47de40d2b > Author: Nikita Popov <npopov(a)redhat.com> > > [MachineSink] Disable if there are any irreducible cycles > > the following benchmarks grew in size by more than 1%: > - 401.bzip2 grew in size by 11% from 36213 to 40325 bytes > - 401.bzip2:[.] BZ2_decompress grew in size by 56% from 7400 to 11560 bytes > > Below reproducer instructions can be used to re-build both "first_bad" and "last_good" cross-toolchains used in this bisection. Naturally, the scripts will fail when triggerring benchmarking jobs if you don't have access to Linaro TCWG CI. > > For your convenience, we have uploaded tarballs with pre-processed source and assembly files at: > - First_bad save-temps: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-… > - Last_good save-temps: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-… > - Baseline save-temps: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-… > > Configuration: > - Benchmark: SPEC CPU2006 > - Toolchain: Clang + Glibc + LLVM Linker > - Version: all components were built from their tip of trunk > - Target: arm-linux-gnueabihf > - Compiler flags: -Oz -mthumb > - Hardware: APM Mustang 8x X-Gene1 > > This benchmarking CI is work-in-progress, and we welcome feedback and suggestions at linaro-toolchain(a)lists.linaro.org . In our improvement plans is to add support for SPEC CPU2017 benchmarks and provide "perf report/annotate" data behind these reports. > > THIS IS THE END OF INTERESTING STUFF. BELOW ARE LINKS TO BUILDS, REPRODUCTION INSTRUCTIONS, AND THE RAW COMMIT. > > This commit has regressed these CI configurations: > - tcwg_bmk_llvm_apm/llvm-master-arm-spec2k6-Oz > - tcwg_bmk_llvm_apm/llvm-master-arm-spec2k6-Oz_LTO > > First_bad build: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-… > Last_good build: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-… > Baseline build: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-… > Even more details: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-… > > Reproduce builds: > <cut> > mkdir investigate-llvm-6fde0439512580df793f3f48f95757b47de40d2b > cd investigate-llvm-6fde0439512580df793f3f48f95757b47de40d2b > > # Fetch scripts > git clone https://git.linaro.org/toolchain/jenkins-scripts > > # Fetch manifests and test.sh script > mkdir -p artifacts/manifests > curl -o artifacts/manifests/build-baseline.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-… --fail > curl -o artifacts/manifests/build-parameters.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-… --fail > curl -o artifacts/test.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_apm-llvm-master-… --fail > chmod +x artifacts/test.sh > > # Reproduce the baseline build (build all pre-requisites) > ./jenkins-scripts/tcwg_bmk-build.sh @@ artifacts/manifests/build-baseline.sh > > # Save baseline build state (which is then restored in artifacts/test.sh) > mkdir -p ./bisect > rsync -a --del --delete-excluded --exclude /bisect/ --exclude /artifacts/ --exclude /llvm/ ./ ./bisect/baseline/ > > cd llvm > > # Reproduce first_bad build > git checkout --detach 6fde0439512580df793f3f48f95757b47de40d2b > ../artifacts/test.sh > > # Reproduce last_good build > git checkout --detach eb27da7dec67f1a36505b589b786ba1a499c274a > ../artifacts/test.sh > > cd .. > </cut> > > Full commit (up to 1000 lines): > <cut> > commit 6fde0439512580df793f3f48f95757b47de40d2b > Author: Nikita Popov <npopov(a)redhat.com> > Date: Thu Feb 24 10:09:49 2022 +0100 > > [MachineSink] Disable if there are any irreducible cycles > > This is an alternative to D120330, which disables MachineSink for > functions with irreducible cycles entirely. This avoids both the > correctness problem, and ensures we don't perform non-profitable > sinks into cycles. At the same time, it may also disable > profitable sinks in the same function. This can be made more > precise by using MachineCycleInfo in the future. > > Fixes https://github.com/llvm/llvm-project/issues/53990. > > Differential Revision: https://reviews.llvm.org/D120800 > --- > llvm/lib/CodeGen/MachineSink.cpp | 12 +++ > llvm/test/CodeGen/X86/callbr-asm-branch-folding.ll | 22 +++-- > llvm/test/CodeGen/X86/pr38795.ll | 93 +++++++++++----------- > .../CodeGen/X86/pr53990-incorrect-machine-sink.ll | 9 +-- > llvm/test/CodeGen/X86/x86-shrink-wrapping.ll | 36 ++++----- > 5 files changed, 87 insertions(+), 85 deletions(-) > > diff --git a/llvm/lib/CodeGen/MachineSink.cpp b/llvm/lib/CodeGen/MachineSink.cpp > index 7ed33f9fdeac..301cc73a0530 100644 > --- a/llvm/lib/CodeGen/MachineSink.cpp > +++ b/llvm/lib/CodeGen/MachineSink.cpp > @@ -18,12 +18,14 @@ > #include "llvm/ADT/DenseSet.h" > #include "llvm/ADT/MapVector.h" > #include "llvm/ADT/PointerIntPair.h" > +#include "llvm/ADT/PostOrderIterator.h" > #include "llvm/ADT/SetVector.h" > #include "llvm/ADT/SmallSet.h" > #include "llvm/ADT/SmallVector.h" > #include "llvm/ADT/SparseBitVector.h" > #include "llvm/ADT/Statistic.h" > #include "llvm/Analysis/AliasAnalysis.h" > +#include "llvm/Analysis/CFG.h" > #include "llvm/CodeGen/MachineBasicBlock.h" > #include "llvm/CodeGen/MachineBlockFrequencyInfo.h" > #include "llvm/CodeGen/MachineBranchProbabilityInfo.h" > @@ -429,6 +431,16 @@ bool MachineSinking::runOnMachineFunction(MachineFunction &MF) { > AA = &getAnalysis<AAResultsWrapperPass>().getAAResults(); > RegClassInfo.runOnMachineFunction(MF); > > + // MachineSink currently uses MachineLoopInfo, which only recognizes natural > + // loops. As such, we could sink instructions into irreducible cycles, which > + // would be non-profitable. > + // WARNING: The current implementation of hasStoreBetween() is incorrect for > + // sinking into irreducible cycles (PR53990), this bailout is currently > + // necessary for correctness, not just profitability. > + ReversePostOrderTraversal<MachineBasicBlock *> RPOT(&*MF.begin()); > + if (containsIrreducibleCFG<MachineBasicBlock *>(RPOT, *LI)) > + return false; > + > bool EverMadeChange = false; > > while (true) { > diff --git a/llvm/test/CodeGen/X86/callbr-asm-branch-folding.ll b/llvm/test/CodeGen/X86/callbr-asm-branch-folding.ll > index 024b6c608aba..f93e181d157c 100644 > --- a/llvm/test/CodeGen/X86/callbr-asm-branch-folding.ll > +++ b/llvm/test/CodeGen/X86/callbr-asm-branch-folding.ll > @@ -24,7 +24,7 @@ define dso_local void @n(i32* %o, i32 %p, i32 %u) nounwind { > ; CHECK-NEXT: movq %r15, %rdi > ; CHECK-NEXT: callq l > ; CHECK-NEXT: testl %eax, %eax > -; CHECK-NEXT: jne .LBB0_10 > +; CHECK-NEXT: jne .LBB0_9 > ; CHECK-NEXT: # %bb.1: # %if.end > ; CHECK-NEXT: movl %ebx, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill > ; CHECK-NEXT: cmpl $0, e(%rip) > @@ -44,21 +44,19 @@ define dso_local void @n(i32* %o, i32 %p, i32 %u) nounwind { > ; CHECK-NEXT: callq i > ; CHECK-NEXT: movl %eax, %ebp > ; CHECK-NEXT: orl %r14d, %ebp > -; CHECK-NEXT: testl %r13d, %r13d > -; CHECK-NEXT: je .LBB0_6 > -; CHECK-NEXT: # %bb.5: > ; CHECK-NEXT: andl $4, %ebx > -; CHECK-NEXT: jmp .LBB0_3 > -; CHECK-NEXT: .LBB0_6: # %if.end12 > +; CHECK-NEXT: testl %r13d, %r13d > +; CHECK-NEXT: jne .LBB0_3 > +; CHECK-NEXT: # %bb.5: # %if.end12 > ; CHECK-NEXT: testl %ebp, %ebp > -; CHECK-NEXT: je .LBB0_9 > -; CHECK-NEXT: # %bb.7: # %if.then14 > +; CHECK-NEXT: je .LBB0_8 > +; CHECK-NEXT: # %bb.6: # %if.then14 > ; CHECK-NEXT: movl {{[-0-9]+}}(%r{{[sb]}}p), %eax # 4-byte Reload > ; CHECK-NEXT: #APP > ; CHECK-NEXT: #NO_APP > -; CHECK-NEXT: jmp .LBB0_10 > +; CHECK-NEXT: jmp .LBB0_9 > ; CHECK-NEXT: .Ltmp0: # Block address taken > -; CHECK-NEXT: # %bb.8: # %if.then20.critedge > +; CHECK-NEXT: # %bb.7: # %if.then20.critedge > ; CHECK-NEXT: movl j(%rip), %edi > ; CHECK-NEXT: movslq %eax, %rcx > ; CHECK-NEXT: movl $1, %esi > @@ -71,9 +69,9 @@ define dso_local void @n(i32* %o, i32 %p, i32 %u) nounwind { > ; CHECK-NEXT: popq %r15 > ; CHECK-NEXT: popq %rbp > ; CHECK-NEXT: jmp k # TAILCALL > -; CHECK-NEXT: .LBB0_9: # %if.else > +; CHECK-NEXT: .LBB0_8: # %if.else > ; CHECK-NEXT: incq 0 > -; CHECK-NEXT: .LBB0_10: # %cleanup > +; CHECK-NEXT: .LBB0_9: # %cleanup > ; CHECK-NEXT: addq $8, %rsp > ; CHECK-NEXT: popq %rbx > ; CHECK-NEXT: popq %r12 > diff --git a/llvm/test/CodeGen/X86/pr38795.ll b/llvm/test/CodeGen/X86/pr38795.ll > index d805dcad8b6e..b526e4f471b1 100644 > --- a/llvm/test/CodeGen/X86/pr38795.ll > +++ b/llvm/test/CodeGen/X86/pr38795.ll > @@ -32,13 +32,14 @@ define dso_local void @fn() { > ; CHECK-NEXT: # implicit-def: $ebp > ; CHECK-NEXT: jmp .LBB0_1 > ; CHECK-NEXT: .p2align 4, 0x90 > -; CHECK-NEXT: .LBB0_16: # %for.inc > +; CHECK-NEXT: .LBB0_15: # %for.inc > ; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1 > +; CHECK-NEXT: movl %esi, %ecx > ; CHECK-NEXT: movb %dl, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill > ; CHECK-NEXT: movb %dh, %dl > ; CHECK-NEXT: .LBB0_1: # %for.cond > ; CHECK-NEXT: # =>This Loop Header: Depth=1 > -; CHECK-NEXT: # Child Loop BB0_20 Depth 2 > +; CHECK-NEXT: # Child Loop BB0_19 Depth 2 > ; CHECK-NEXT: cmpb $8, %dl > ; CHECK-NEXT: movb %dl, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill > ; CHECK-NEXT: ja .LBB0_3 > @@ -55,7 +56,7 @@ define dso_local void @fn() { > ; CHECK-NEXT: movb %cl, %dh > ; CHECK-NEXT: movl $0, h > ; CHECK-NEXT: cmpb $8, %dl > -; CHECK-NEXT: jg .LBB0_8 > +; CHECK-NEXT: jg .LBB0_9 > ; CHECK-NEXT: # %bb.5: # %if.then13 > ; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1 > ; CHECK-NEXT: movl %eax, %esi > @@ -64,12 +65,10 @@ define dso_local void @fn() { > ; CHECK-NEXT: calll printf > ; CHECK-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %dh # 1-byte Reload > ; CHECK-NEXT: testb %bl, %bl > -; CHECK-NEXT: movl %esi, %ecx > ; CHECK-NEXT: # implicit-def: $eax > -; CHECK-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %dl # 1-byte Reload > -; CHECK-NEXT: movb %dl, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill > +; CHECK-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %cl # 1-byte Reload > ; CHECK-NEXT: movb %dh, %dl > -; CHECK-NEXT: jne .LBB0_16 > +; CHECK-NEXT: jne .LBB0_15 > ; CHECK-NEXT: jmp .LBB0_6 > ; CHECK-NEXT: .p2align 4, 0x90 > ; CHECK-NEXT: .LBB0_3: # %if.then > @@ -78,82 +77,82 @@ define dso_local void @fn() { > ; CHECK-NEXT: calll printf > ; CHECK-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %dl # 1-byte Reload > ; CHECK-NEXT: # implicit-def: $eax > +; CHECK-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %cl # 1-byte Reload > +; CHECK-NEXT: jmp .LBB0_6 > +; CHECK-NEXT: .p2align 4, 0x90 > +; CHECK-NEXT: .LBB0_9: # %if.end21 > +; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1 > +; CHECK-NEXT: # implicit-def: $ebp > +; CHECK-NEXT: jmp .LBB0_10 > +; CHECK-NEXT: .p2align 4, 0x90 > ; CHECK-NEXT: .LBB0_6: # %for.cond35 > ; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1 > +; CHECK-NEXT: movb %dl, %dh > ; CHECK-NEXT: testl %edi, %edi > -; CHECK-NEXT: je .LBB0_7 > -; CHECK-NEXT: .LBB0_11: # %af > +; CHECK-NEXT: movl %edi, %esi > +; CHECK-NEXT: movl $0, %edi > +; CHECK-NEXT: movb %cl, %dl > +; CHECK-NEXT: je .LBB0_19 > +; CHECK-NEXT: # %bb.7: # %af > ; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1 > ; CHECK-NEXT: testb %bl, %bl > -; CHECK-NEXT: jne .LBB0_12 > -; CHECK-NEXT: .LBB0_17: # %if.end39 > +; CHECK-NEXT: jne .LBB0_8 > +; CHECK-NEXT: .LBB0_16: # %if.end39 > ; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1 > ; CHECK-NEXT: testl %eax, %eax > -; CHECK-NEXT: je .LBB0_19 > -; CHECK-NEXT: # %bb.18: # %if.then41 > +; CHECK-NEXT: je .LBB0_18 > +; CHECK-NEXT: # %bb.17: # %if.then41 > ; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1 > ; CHECK-NEXT: movl $0, {{[0-9]+}}(%esp) > ; CHECK-NEXT: movl $fn, {{[0-9]+}}(%esp) > ; CHECK-NEXT: movl $.str, (%esp) > ; CHECK-NEXT: calll printf > -; CHECK-NEXT: .LBB0_19: # %for.end46 > +; CHECK-NEXT: .LBB0_18: # %for.end46 > ; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1 > +; CHECK-NEXT: movl %esi, %edi > ; CHECK-NEXT: # implicit-def: $dl > ; CHECK-NEXT: # implicit-def: $dh > ; CHECK-NEXT: # implicit-def: $ebp > -; CHECK-NEXT: jmp .LBB0_20 > -; CHECK-NEXT: .p2align 4, 0x90 > -; CHECK-NEXT: .LBB0_8: # %if.end21 > -; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1 > -; CHECK-NEXT: # implicit-def: $ebp > -; CHECK-NEXT: jmp .LBB0_9 > ; CHECK-NEXT: .p2align 4, 0x90 > -; CHECK-NEXT: .LBB0_7: # in Loop: Header=BB0_1 Depth=1 > -; CHECK-NEXT: xorl %edi, %edi > -; CHECK-NEXT: movb %dl, %dh > -; CHECK-NEXT: movb {{[-0-9]+}}(%e{{[sb]}}p), %dl # 1-byte Reload > -; CHECK-NEXT: .p2align 4, 0x90 > -; CHECK-NEXT: .LBB0_20: # %for.cond47 > +; CHECK-NEXT: .LBB0_19: # %for.cond47 > ; CHECK-NEXT: # Parent Loop BB0_1 Depth=1 > ; CHECK-NEXT: # => This Inner Loop Header: Depth=2 > ; CHECK-NEXT: testb %bl, %bl > -; CHECK-NEXT: jne .LBB0_20 > -; CHECK-NEXT: # %bb.21: # %for.cond47 > -; CHECK-NEXT: # in Loop: Header=BB0_20 Depth=2 > +; CHECK-NEXT: jne .LBB0_19 > +; CHECK-NEXT: # %bb.20: # %for.cond47 > +; CHECK-NEXT: # in Loop: Header=BB0_19 Depth=2 > ; CHECK-NEXT: testb %bl, %bl > -; CHECK-NEXT: jne .LBB0_20 > -; CHECK-NEXT: .LBB0_9: # %ae > +; CHECK-NEXT: jne .LBB0_19 > +; CHECK-NEXT: .LBB0_10: # %ae > ; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1 > ; CHECK-NEXT: testb %bl, %bl > -; CHECK-NEXT: jne .LBB0_10 > -; CHECK-NEXT: # %bb.13: # %if.end26 > +; CHECK-NEXT: jne .LBB0_11 > +; CHECK-NEXT: # %bb.12: # %if.end26 > ; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1 > -; CHECK-NEXT: xorl %ecx, %ecx > +; CHECK-NEXT: xorl %esi, %esi > ; CHECK-NEXT: testb %dl, %dl > -; CHECK-NEXT: je .LBB0_16 > -; CHECK-NEXT: # %bb.14: # %if.end26 > +; CHECK-NEXT: je .LBB0_15 > +; CHECK-NEXT: # %bb.13: # %if.end26 > ; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1 > ; CHECK-NEXT: testl %ebp, %ebp > -; CHECK-NEXT: jne .LBB0_16 > -; CHECK-NEXT: # %bb.15: # %if.then31 > +; CHECK-NEXT: jne .LBB0_15 > +; CHECK-NEXT: # %bb.14: # %if.then31 > ; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1 > -; CHECK-NEXT: xorl %ecx, %ecx > +; CHECK-NEXT: xorl %esi, %esi > ; CHECK-NEXT: xorl %ebp, %ebp > -; CHECK-NEXT: jmp .LBB0_16 > +; CHECK-NEXT: jmp .LBB0_15 > ; CHECK-NEXT: .p2align 4, 0x90 > -; CHECK-NEXT: .LBB0_10: # in Loop: Header=BB0_1 Depth=1 > +; CHECK-NEXT: .LBB0_11: # in Loop: Header=BB0_1 Depth=1 > +; CHECK-NEXT: movl %edi, %esi > ; CHECK-NEXT: # implicit-def: $eax > ; CHECK-NEXT: testb %bl, %bl > -; CHECK-NEXT: je .LBB0_17 > -; CHECK-NEXT: .LBB0_12: # in Loop: Header=BB0_1 Depth=1 > +; CHECK-NEXT: je .LBB0_16 > +; CHECK-NEXT: .LBB0_8: # in Loop: Header=BB0_1 Depth=1 > ; CHECK-NEXT: # implicit-def: $edi > ; CHECK-NEXT: # implicit-def: $cl > -; CHECK-NEXT: # kill: killed $cl > ; CHECK-NEXT: # implicit-def: $dl > ; CHECK-NEXT: # implicit-def: $ebp > -; CHECK-NEXT: testl %edi, %edi > -; CHECK-NEXT: jne .LBB0_11 > -; CHECK-NEXT: jmp .LBB0_7 > +; CHECK-NEXT: jmp .LBB0_6 > entry: > br label %for.cond > > diff --git a/llvm/test/CodeGen/X86/pr53990-incorrect-machine-sink.ll b/llvm/test/CodeGen/X86/pr53990-incorrect-machine-sink.ll > index 3d7ff6cbe676..4f56d7b16a87 100644 > --- a/llvm/test/CodeGen/X86/pr53990-incorrect-machine-sink.ll > +++ b/llvm/test/CodeGen/X86/pr53990-incorrect-machine-sink.ll > @@ -7,18 +7,15 @@ define void @test(i1 %c, i64* %p, i64* noalias %p2) nounwind { > ; CHECK-LABEL: test: > ; CHECK: # %bb.0: # %entry > ; CHECK-NEXT: pushq %rbp > -; CHECK-NEXT: pushq %r15 > ; CHECK-NEXT: pushq %r14 > ; CHECK-NEXT: pushq %rbx > -; CHECK-NEXT: pushq %rax > ; CHECK-NEXT: movq %rdx, %rbx > -; CHECK-NEXT: movq %rsi, %r14 > -; CHECK-NEXT: movl %edi, %r15d > +; CHECK-NEXT: movl %edi, %r14d > +; CHECK-NEXT: movq (%rsi), %rbp > ; CHECK-NEXT: xorl %eax, %eax > ; CHECK-NEXT: jmpq *.LJTI0_0(,%rax,8) > ; CHECK-NEXT: .LBB0_1: # %split.3 > -; CHECK-NEXT: movq (%r14), %rbp > -; CHECK-NEXT: testb $1, %r15b > +; CHECK-NEXT: testb $1, %r14b > ; CHECK-NEXT: je .LBB0_3 > ; CHECK-NEXT: # %bb.2: # %clobber > ; CHECK-NEXT: callq clobber@PLT > diff --git a/llvm/test/CodeGen/X86/x86-shrink-wrapping.ll b/llvm/test/CodeGen/X86/x86-shrink-wrapping.ll > index 0f8bb837f82a..b44895293b41 100644 > --- a/llvm/test/CodeGen/X86/x86-shrink-wrapping.ll > +++ b/llvm/test/CodeGen/X86/x86-shrink-wrapping.ll > @@ -1377,6 +1377,8 @@ define i32 @irreducibleCFG() #4 { > ; ENABLE-NEXT: pushq %rbx > ; ENABLE-NEXT: pushq %rax > ; ENABLE-NEXT: .cfi_offset %rbx, -24 > +; ENABLE-NEXT: movq _irreducibleCFGa@GOTPCREL(%rip), %rax > +; ENABLE-NEXT: movl (%rax), %edi > ; ENABLE-NEXT: movq _irreducibleCFGf@GOTPCREL(%rip), %rax > ; ENABLE-NEXT: cmpb $0, (%rax) > ; ENABLE-NEXT: je LBB16_2 > @@ -1386,24 +1388,20 @@ define i32 @irreducibleCFG() #4 { > ; ENABLE-NEXT: jmp LBB16_1 > ; ENABLE-NEXT: LBB16_2: ## %split > ; ENABLE-NEXT: movq _irreducibleCFGb@GOTPCREL(%rip), %rax > +; ENABLE-NEXT: xorl %ebx, %ebx > ; ENABLE-NEXT: cmpl $0, (%rax) > -; ENABLE-NEXT: je LBB16_3 > -; ENABLE-NEXT: ## %bb.4: ## %for.body4.i > -; ENABLE-NEXT: movq _irreducibleCFGa@GOTPCREL(%rip), %rax > -; ENABLE-NEXT: movl (%rax), %edi > +; ENABLE-NEXT: je LBB16_4 > +; ENABLE-NEXT: ## %bb.3: ## %for.body4.i > ; ENABLE-NEXT: xorl %ebx, %ebx > ; ENABLE-NEXT: xorl %eax, %eax > ; ENABLE-NEXT: callq _something > -; ENABLE-NEXT: jmp LBB16_5 > -; ENABLE-NEXT: LBB16_3: > -; ENABLE-NEXT: xorl %ebx, %ebx > ; ENABLE-NEXT: .p2align 4, 0x90 > -; ENABLE-NEXT: LBB16_5: ## %for.inc > +; ENABLE-NEXT: LBB16_4: ## %for.inc > ; ENABLE-NEXT: ## =>This Inner Loop Header: Depth=1 > ; ENABLE-NEXT: incl %ebx > ; ENABLE-NEXT: cmpl $7, %ebx > -; ENABLE-NEXT: jl LBB16_5 > -; ENABLE-NEXT: ## %bb.6: ## %fn1.exit > +; ENABLE-NEXT: jl LBB16_4 > +; ENABLE-NEXT: ## %bb.5: ## %fn1.exit > ; ENABLE-NEXT: xorl %eax, %eax > ; ENABLE-NEXT: addq $8, %rsp > ; ENABLE-NEXT: popq %rbx > @@ -1420,6 +1418,8 @@ define i32 @irreducibleCFG() #4 { > ; DISABLE-NEXT: pushq %rbx > ; DISABLE-NEXT: pushq %rax > ; DISABLE-NEXT: .cfi_offset %rbx, -24 > +; DISABLE-NEXT: movq _irreducibleCFGa@GOTPCREL(%rip), %rax > +; DISABLE-NEXT: movl (%rax), %edi > ; DISABLE-NEXT: movq _irreducibleCFGf@GOTPCREL(%rip), %rax > ; DISABLE-NEXT: cmpb $0, (%rax) > ; DISABLE-NEXT: je LBB16_2 > @@ -1429,24 +1429,20 @@ define i32 @irreducibleCFG() #4 { > ; DISABLE-NEXT: jmp LBB16_1 > ; DISABLE-NEXT: LBB16_2: ## %split > ; DISABLE-NEXT: movq _irreducibleCFGb@GOTPCREL(%rip), %rax > +; DISABLE-NEXT: xorl %ebx, %ebx > ; DISABLE-NEXT: cmpl $0, (%rax) > -; DISABLE-NEXT: je LBB16_3 > -; DISABLE-NEXT: ## %bb.4: ## %for.body4.i > -; DISABLE-NEXT: movq _irreducibleCFGa@GOTPCREL(%rip), %rax > -; DISABLE-NEXT: movl (%rax), %edi > +; DISABLE-NEXT: je LBB16_4 > +; DISABLE-NEXT: ## %bb.3: ## %for.body4.i > ; DISABLE-NEXT: xorl %ebx, %ebx > ; DISABLE-NEXT: xorl %eax, %eax > ; DISABLE-NEXT: callq _something > -; DISABLE-NEXT: jmp LBB16_5 > -; DISABLE-NEXT: LBB16_3: > -; DISABLE-NEXT: xorl %ebx, %ebx > ; DISABLE-NEXT: .p2align 4, 0x90 > -; DISABLE-NEXT: LBB16_5: ## %for.inc > +; DISABLE-NEXT: LBB16_4: ## %for.inc > ; DISABLE-NEXT: ## =>This Inner Loop Header: Depth=1 > ; DISABLE-NEXT: incl %ebx > ; DISABLE-NEXT: cmpl $7, %ebx > -; DISABLE-NEXT: jl LBB16_5 > -; DISABLE-NEXT: ## %bb.6: ## %fn1.exit > +; DISABLE-NEXT: jl LBB16_4 > +; DISABLE-NEXT: ## %bb.5: ## %fn1.exit > ; DISABLE-NEXT: xorl %eax, %eax > ; DISABLE-NEXT: addq $8, %rsp > ; DISABLE-NEXT: popq %rbx > </cut>

3 years, 3 months

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[ACTIVITY] Report for week #12

by Thiago Jung Bauermann

Hello, # [GNU-732] GDB support for ARMv9 Scalable Matrix Extension (SME) * Continued working on gdbserver and remote protocol support for programs that change the SVE vector length during execution: - Studied the 2020 discussion around Luis' proposal to support changed VL size in the Remote Serial Protocol / gdbserver, as well as relevant parts of the RSP itself. - Started studying GDB's type system and how it handles dynamic types, and also the target description code to assess the feasibility of making the vector registers use a dynamically sized type. - Luis made a second proposal in that mailing list discussion where the target description wouldn't be transferred via the remote protocol, just the vector length. Then both GDB and gdbserver could locally update their own descriptions based on that. Starting to think about this alternative. It would probably be simpler than changing the target description to use a dynamically sized type for the Z registers. # Basic setup / onboarding * Work laptop arrived. Set it up. -- Thiago

3 years, 3 months

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[ACTIVITY] week ending Mar. 27 2022

by Alex Bennée

Project Stratos =============== - spent some time talking through design approaches for xen vhost-master with Viresh - posted Re: Understanding osdep_xenforeignmemory_map mmap behaviour Message-Id: <alpine.DEB.2.22.394.2203231838130.2910984@ubuntu-linux-20-04-desktop> Linux RPMB Sub-system and virtio-driver ([STR-40]) - continued working on [Linux driver] - discovered a bug in vhost-user config handling in QEMU as well - posted [PATCH v1 00/13] various virtio docs, fixes and tweaks Message-Id: <20220321153037.3622127-1-alex.bennee(a)linaro.org> [STR-40] <https://linaro.atlassian.net/browse/STR-40> [Linux driver] <http://git.linaro.org/people/alex.bennee/linux.git/shortlog/refs/heads/rpmb…> QEMU Upstream Work ([UM-2]) =========================== - posted [PULL 00/18] testing and semihosting updates Message-Id: <20220301094715.550871-1-alex.bennee(a)linaro.org> - posted [PULL for 7.0 0/8] i386, docs, gitlab fixes Message-Id: <20220323112711.440376-1-alex.bennee(a)linaro.org> [UM-2] <https://linaro.atlassian.net/browse/UM-2> Other ===== - Finished work on presentation for LTD Completed Reviews [11/11] ========================= [PATCH] gdbstub.c: add support for info proc mappings Message-Id: <20220221030910.3203063-1-dominik.b.czarnota(a)gmail.com> [PATCH] tests/Makefile.include: Let "make clean" remove the TCG tests, too Message-Id: <20220301085900.1443232-1-thuth(a)redhat.com> [PATCH 0/3] gdbstub: add support for switchable endianness Message-Id: <20210823142004.17935-1-changbin.du(a)gmail.com> [PATCH 0/6] More record/replay acceptance tests Message-Id: <162332427732.194926.7555369160312506539.stgit@pasha-ThinkPad-X280> [PATCH v6 00/43] CXl 2.0 emulation Support Message-Id: <20220211120747.3074-1-Jonathan.Cameron(a)huawei.com> [PATCH 00/11] edk2: update to stable202202 Message-Id: <20220308145521.3106395-1-kraxel(a)redhat.com> [PATCH 0/3] Use g_new() & friends where that makes obvious Message-Id: <20220314160108.1440470-3-armbru(a)redhat.com> [PATCH 2/2] target/arm: Log fault address for M-profile faults Message-Id: <20220315204306.2797684-3-peter.maydell(a)linaro.org> [RFC PATCH 0/6] Port PPC64/PowerNV MMU tests to QEMU Message-Id: <20220324190854.156898-1-leandro.lupori(a)eldorado.org.br> [PULL for-7.1 00/36] Logging cleanup and per-thread logfiles Message-Id: <20220320171135.2704502-1-richard.henderson(a)linaro.org> [PATCH 1/2] gdbstub: Set current_cpu for memory read write Message-Id: <20220322154213.86475-1-bmeng.cn(a)gmail.com> Absences ======== Current Review Queue ==================== TODO [PULL for-7.1 00/36] Logging cleanup and per-thread logfiles Message-Id: <20220320171135.2704502-1-richard.henderson(a)linaro.org> ==================================================================================================================================== TODO [PATCH 00/11] edk2: update to stable202202 Message-Id: <20220308145521.3106395-1-kraxel(a)redhat.com> ======================================================================================================= TODO [RFC PATCH 00/27] Virtio sound card implementation Message-Id: <20210429120445.694420-1-chouhan.shreyansh2702(a)gmail.com> ============================================================================================================================ -- Alex Bennée

3 years, 3 months

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[ACTIVITY] report week ending 25 Mar

by Peter Maydell

Progress: * UM-2 [QEMU upstream maintainership] + More of the usual freeze-related work * QEMU-420 [GICv4 emulation] + I think the code is more or less bug-free now; still need to figure out the best way for a board to request a GICv4 (eg do we want a 'revision' property specifying 3, 3.1, 4, 4.1, or just 3 vs 4 with some optional booleans for extra features?) -- PMM

3 years, 3 months

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[ACTIVITY] Report for week #11

by Thiago Jung Bauermann

Hello, # [GNU-732] GDB support for ARMv9 Scalable Matrix Extension (SME) * Continued reading patches from Mark Brown's v12 patch set adding SME support to the Linux kernel. Sent a few trivial review comments. * After conversation with Luis, decided to work on gdbserver and remote protocol support for programs which change the SVE vector length during execution (native GDB already supports it). This issue will most likely be relevant for SME as well. Started by studying Luis' proposal from 2020 and background information provided by him. # Basic setup / onboarding * Bought a work laptop. * Set up access to the team's machines. -- Thiago

3 years, 3 months

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[ACTIVITY] report week ending 18 Mar

by Peter Maydell

Progress (for a week-and-a-half) * UM-2 [QEMU upstream maintainership] + Lots of freeze-related work (softfreeze was last week and we tagged rc0 this week) + Code review of other peoples's stuff to go into the release + Assembling arm pullreqs + Investigating an intermittent failure in one of our test cases on s390 host, which seems like it may be a bug in the s390 h/w-accelerated zlib * QEMU-420 [GICv4 emulation] + Still debugging... -- PMM

3 years, 3 months

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Interest in reproducing gcc-linaro-4.9-2016.02 arm-linux-gnueabihf target under darwin and linux aarch64 host

by jhgorse＠gmail.com

Hello, I see this release gcc-linaro-4.9-2016.02 for 86_64_arm-linux-gnueabihf: https://releases.linaro.org/components/toolchain/binaries/4.9-2016.02/arm-l… and would like to reproduce the toolchain for aarch64 hosts. I see that it was built with ABE, though I have generally been unsuccessful in getting ABE to work on aarch64 for this. I was looking for some build or ci breadcrumbs or documentation. What can you recommend? The motivation here is to support legacy development/testing from modern aarch64 hardware. Cheers, Joe Gorse

3 years, 3 months

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[Activity] Week #10

by Thiago Jung Bauermann

Hello, # GDB support for ARMv9 Scalable Matrix Extension (SME) - Synced with Luis Machado to learn what the current status is. Read discussions in the linux-arm-kernel mailing list which he pointed to. - Read Arm architecture documentation about Neon, SVE, SVE2 and SME to familiarise myself with these features. - Basic setup / onboarding - Joined some internal and external mailing lists, IRC and Slack channels. - Read some company policy documents. - Researched models and got a quote for a work laptop. - Set up aarch64 cross-compilation environment on my laptop. - Set up emulated aarch64 machine with Fedora on my laptop. - Attempted setting up emulated aarch64 machine with Ubuntu on my laptop, but ran into problems with the Ubuntu Server installer. -- Thiago

3 years, 3 months

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[ACTIVITY] week ending Mar. 6 2022

by Alex Bennée

Project Stratos =============== - spent some time talking through design approaches for xen vhost-master with Viresh Linux RPMB Sub-system and virtio-driver ([STR-40]) - continued working on [Linux driver] - discovered a bug in vhost-user config handling in QEMU as well [STR-40] <https://linaro.atlassian.net/browse/STR-40> [Linux driver] <http://git.linaro.org/people/alex.bennee/linux.git/shortlog/refs/heads/rpmb…> QEMU Upstream Work ([UM-2]) =========================== - posted [PULL 00/18] testing and semihosting updates Message-Id: <20220301094715.550871-1-alex.bennee(a)linaro.org> Other ===== - started work on presentation for LTD Completed Reviews [5/5] ======================= [PATCH] gdbstub.c: add support for info proc mappings Message-Id: <20220221030910.3203063-1-dominik.b.czarnota(a)gmail.com> [PATCH] tests/Makefile.include: Let "make clean" remove the TCG tests, too Message-Id: <20220301085900.1443232-1-thuth(a)redhat.com> [PATCH 0/3] gdbstub: add support for switchable endianness Message-Id: <20210823142004.17935-1-changbin.du(a)gmail.com> [PATCH 0/6] More record/replay acceptance tests Message-Id: <162332427732.194926.7555369160312506539.stgit@pasha-ThinkPad-X280> [PATCH v6 00/43] CXl 2.0 emulation Support Message-Id: <20220211120747.3074-1-Jonathan.Cameron(a)huawei.com> Absences ======== Current Review Queue ==================== TODO [PATCH v4 00/18] target/arm: Implement LVA, LPA, LPA2 features Message-Id: <20220301215958.157011-1-richard.henderson(a)linaro.org> ===================================================================================================================================== TODO [RFC PATCH 00/27] Virtio sound card implementation Message-Id: <20210429120445.694420-1-chouhan.shreyansh2702(a)gmail.com> ============================================================================================================================ TODO [PATCH v4 00/41] linux-user: Streamline handling of SIGSEGV Message-Id: <20211006172307.780893-1-richard.henderson(a)linaro.org> ================================================================================================================================== -- Alex Bennée

3 years, 3 months

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[ACTIVITY] report week ending 4 Mar

by Peter Maydell

Progress * UM-2 [QEMU upstream maintainership] + Looked at and sent patches to fix a minor decode error for Neon VLD1/VST1 that RTH found + softfreeze is next Tuesday -- sent out last big Arm pullreq before freeze, though there will probably need to be another smaller one + code review, respinning previously sent patches, looking at bug reports, all to get things in before freeze * QEMU-420 [GICv4 emulation] + All the GICv4.0 stuff is now code-complete, but testing and loose ends (like plumbing it into the virt board) will take a while still. -- PMM

3 years, 3 months

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[weekly][linaro] report week ending 25 Feb

by Peter Maydell

Progress: * UM-2 [QEMU upstream maintainership] + Respins of a few patchsets that needed v2 + Looked at a few bugs since softfreeze for 7.0 is near + Amazingly my to-review queue is now almost empty * QEMU-420 [GICv4 emulation] + Implemented more of the redistributor code -- the last missing big piece is its handling of VMOVI, though there are also probably some loose ends to tidy up + Note that this isn't going to be in time for 7.0, so will likely go on the back-burner a bit in favour of release-critical items thanks -- PMM

3 years, 4 months

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[ACTIVITY] week ending Feb. 27 2022

by Alex Bennée

Project Stratos =============== - spent more time troubleshooting Xen builds with Viresh Linux RPMB Sub-system and virtio-driver ([STR-40]) - continued working on [Linux driver] - discovered a bug in vhost-user config handling in QEMU as well [STR-40] <https://linaro.atlassian.net/browse/STR-40> [Linux driver] <http://git.linaro.org/people/alex.bennee/linux.git/shortlog/refs/heads/rpmb…> QEMU Upstream Work ([UM-2]) =========================== - follow-up on Analysis of slow distro boots in check-avocado (BootLinuxAarch64.test_virt_tcg*) Message-Id: <874k4xbqvp.fsf(a)linaro.org> - posted [PATCH v2 00/18] testing and semihosting pre-PR Message-Id: <20220225172021.3493923-1-alex.bennee(a)linaro.org> [UM-2] <https://linaro.atlassian.net/browse/UM-2> Current Review Queue ==================== TODO [RFC PATCH 00/27] Virtio sound card implementation Message-Id: <20210429120445.694420-1-chouhan.shreyansh2702(a)gmail.com> ============================================================================================================================ TODO [PATCH v6 00/43] CXl 2.0 emulation Support Message-Id: <20220211120747.3074-1-Jonathan.Cameron(a)huawei.com> ============================================================================================================== TODO [PATCH v2 00/15] target/arm: Implement LVA, LPA, LPA2 features Message-Id: <20220210040423.95120-1-richard.henderson(a)linaro.org> ==================================================================================================================================== -- Alex Bennée

3 years, 4 months

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