VirtIO Related Work ([VIRT-366])
================================
- posted [PATCH] tools/virtiofsd: add support for --socket-group
Message-Id: <20200312104142.21259-1-alex.bennee(a)linaro.org>
- continued discussion on approaches on virtio-dev list Message-Id:
<874kv15o4q.fsf(a)linaro.org>
- email threads with Qualcomm Message-Id:
<CAHFG_=WY8duYm7xNTNo=iGZKqD12gt9ps05pyc1qmbUDcLM0Bw(a)mail.gmail.com>
to drill down on their requirements
- two long HOs with Qualcomm and Google to further discuss work
- I feel like there a few tasks forming which I will try an clean-up
the breakdown on the initiate for next week.
[VIRT-366] <https://projects.linaro.org/browse/VIRT-366>
Upstream Work ([VIRT-109])
==========================
- posted [PATCH v1 0/5] testing updates (docker and acceptance CI
tweaks) Message-Id: <20200309202318.3481-1-alex.bennee(a)linaro.org>
- spent a fair time fighting with check-acceptance tests weirdness
- had an initial look at [PATCH 0/5] QEMU Gating CI Message-Id:
<20200312193616.438922-1-crosa(a)redhat.com>
[VIRT-109] <https://projects.linaro.org/browse/VIRT-109>
Completed Reviews [6/6]
=======================
[PATCH v7 00/18] Add Allwinner H3 SoC and Orange Pi PC Machine
Message-Id: <20200310213203.18730-1-nieklinnenbank(a)gmail.com>
[PATCH v16 00/10] VIRTIO-IOMMU device
Message-Id: <20200214132745.23392-11-eric.auger(a)redhat.com>
- CLOSING NOTE [2020-03-11 Wed 17:18]
Already merged upstream
Added: <2020-03-03 Tue>
{PATCH v2 0/2} tests/tcg/multiarch: Add tests for implemented real
Message-Id: <1581603905-21565-1-git-send-email-Filip.Bozuta(a)rt-rk.com>
- CLOSING NOTE [2020-03-12 Thu 09:58]
Not plumbed into the testing infrastructure so a bit of a code dump.
Added: <2020-02-13 Thu>
[PATCH v3 02/10] tests/vm: Add configuration to basevm.py
Message-Id: <20200310182536.11137-3-robert.foley(a)linaro.org>
[PATCH 0/4] tests/vm: minor install tweaks, update netbsd & freebsd
Message-Id: <20200310083218.26355-1-kraxel(a)redhat.com>
[PATCH 0/5] docs/system: Split target-arm.rst
Message-Id: <20200309215818.2021-3-peter.maydell(a)linaro.org>
Absences
========
- None
Current Review Queue
====================
* [PATCH 0/2] thread: add lock guard macros
Message-Id: <20200311123624.277221-1-stefanha(a)redhat.com>
Added: <2020-03-11 Wed>
* [PATCH v8 0/9] qemu-binfmt-conf.sh
Message-Id: <20200307170251.GA7@dd5f6ec33fb0>
Added: <2020-03-08 Sun>
* [RFC][PATCH 0/3] IVSHMEM version 2 device for QEMU
Message-Id: <cover.1573477032.git.jan.kiszka(a)siemens.com>
Added: <2020-02-14 Fri>
* [RFC 0/9] Add an interVM memory sharing device
Message-Id: <1580815851-28887-1-git-send-email-i.kotrasinsk(a)partner.samsung.com>
Added: <2020-02-05 Wed>
--
Alex Bennée
Progress:
* VIRT-65 [QEMU upstream maintainership]
- More documentation cleanup (splitting the Arm boards section
up into one page per board)
- Various patch review
- Put together last large pull request before softfreeze hits next week
- Fixed the Windows installer generation, which I broke in the
process of moving the HTML docs around
- Fixed read buffer overrun in i82596 device model spotted by coverity
- Fixed a user-experience papercut that's been bothering me for years:
for arm you needed to specify '-M virt' to avoid an error even if all
you wanted was the '-cpu help' or '-device help' output.
* VIRT-241 [QEMU ISA Support for A-profile]
- Jira gardening: split out the optional parts of each architectural
tick sub-epic, and added the new 8.6 tasks
thanks
-- PMM
== Progress ==
* BFD Linker:
- GNU-629: non-contiguous memory support: patch accepted and committed
* GCC upstream validation:
- reported a couple of failures/regressions
- PR90378 working on reproducing a non-functional code problem with spec2006
on arm with LTO and -Os
* misc:
- infra fixes / troubleshooting / reviews
== Next ==
* spec2006 / LTO / Os / aarch32
* FDPIC GDB
Hi Sir,
I have some questions for tool chain:
1. Can the latest version “linaro-gcc/7.5” support ARMv9 new ISA?
2. If not, when will the new release version can support?
Thanks a lot.
Chun-Chia
VirtIO Related Work ([VIRT-366])
================================
- Followed up with ARM on the roll of Hafnium and secure partitioning
with VirtIO
- Continued working through various requirements for the work
- raised [VIRT-373] to describe some potentially common work on
handling userspace backends
- started discussion on approaches on virtio-dev list Message-Id:
<874kv15o4q.fsf(a)linaro.org>
- posted [RFC PATCH] tools/virtiofsd: add support for --socket-group
Message-Id: <20200304185025.19853-1-alex.bennee(a)linaro.org>
[VIRT-366] <https://projects.linaro.org/browse/VIRT-366>
[VIRT-373] <https://projects.linaro.org/browse/VIRT-373>
Upstream Work ([VIRT-109])
==========================
- posted [PATCH v1 00/10] testing/next updates (tweaks and
re-greening) Message-Id:
<20200302181907.32110-1-alex.bennee(a)linaro.org>
- posted [PULL 0/9] testing updates (tests/vm and acceptance tweaks)
Message-Id: <20200304100154.14822-1-alex.bennee(a)linaro.org>
[VIRT-109] <https://projects.linaro.org/browse/VIRT-109>
Completed Reviews [3/3]
=======================
[PATCH v3 00/33] Convert qemu-doc to rST
Message-Id: <20200228153619.9906-1-peter.maydell(a)linaro.org>
[PATCH v5 00/50] Initial support for multi-process qemu
Message-Id: <cover.1582576372.git.jag.raman(a)oracle.com>
- CLOSING NOTE [2020-03-02 Mon 18:20]
Initial pass, mostly checking wasn't CI broken, which it was.
Added: <2020-02-28 Fri>
[PATCH v6 00/18] Add Allwinner H3 SoC and Orange Pi PC Machine
Message-Id: <20200301215029.15196-1-nieklinnenbank(a)gmail.com>
Absences
========
- None
Current Review Queue
====================
* [PATCH v16 00/10] VIRTIO-IOMMU device
Message-Id: <20200214132745.23392-11-eric.auger(a)redhat.com>
Added: <2020-03-03 Tue>
* [RFC][PATCH 0/3] IVSHMEM version 2 device for QEMU
Message-Id: <cover.1573477032.git.jan.kiszka(a)siemens.com>
Added: <2020-02-14 Fri>
* {PATCH v2 0/2} tests/tcg/multiarch: Add tests for implemented real
Message-Id: <1581603905-21565-1-git-send-email-Filip.Bozuta(a)rt-rk.com>
Added: <2020-02-13 Thu>
* [RFC 0/9] Add an interVM memory sharing device
Message-Id: <1580815851-28887-1-git-send-email-i.kotrasinsk(a)partner.samsung.com>
Added: <2020-02-05 Wed>
--
Alex Bennée
Progress:
* VIRT-65 [QEMU upstream maintainership]
- found and fixed some bugs in our "hflags caching" for M-profile
which caused spurious assertions in some corner cases
- got the rST conversion patchset through review and into master
- sent some followup cleanup patches that remove some texinfo
related bits of code we no longer need
- patch review:
+ rth's final respin of the "honour more HCR_EL2 traps" series
+ patchset fixing some memory leaks of timer objects
+ patchset for cubieboard model to error out rather than ignoring
some bogus user command line options
* VIRT-241 [QEMU ISA Support for A-profile]
+ Wrote an implementation of v8.2-TTS2UXN; investigating how best
to test it
thanks
-- PMM
[VIRT-344 # ARMv8.5-MemTag, Memory Tagging Extension ]
Lots of work, including an arch update. The system-mode patch set is much
changed, but still not quite ready.
[VIRT-349 # QEMU SVE2 Supprt ]
[VIRT-327 # Richard's upstream QEMU work ]
TBI fixes, 2 rounds.
HCR fixes, 2 rounds.
TCG patch queue flushed.
Some patch review.
r~
Good afternoon,
I would like to announce the breakthrough in extending gdb with non
intrusive instructions and functions tracing on ARM processors using
Coresight ETM traces, as described in previous mails.
the source code is made public in the git repository
https://github.com/gzied/binutils-gdb/ in the branch gdb_arm_coresight.
this implementation was compiled and tested on an STM32MP1 (ARMv7
Architecture) board running "Linux arm 5.3.10-armv7-lpae-x15" distribution
where the device tree was modified to declare CoreSight components.
to build the software
>checkout the software from the branch gdb_arm_coresight
> cd ..
>mkdir build
>cd build
> ../binutils-gdb/configure --with-arm-cs
>make
after a successful build gdb will be available in the folder build/gdb
to run the software
build the software you would like to debug with debugging info (-g flag)
>gcc -g software.c -o software
start debugging your software
>gdb software
set a breakpoint at main
(gdb) b main
(gdb) run
set a breakpoint in a location after the code you would like to trace
(gdb) b my_function
set your etm sink, sinks can be found by listing the folder
/sys/bus/event_source/devices/cs_etm/sinks/. use a sink that is capable of
storing the traces on chip (etf, etb ...)
(gdb) set record btrace etm sink tmc_etf0
start recording etm traces
(gdb) record btrace etm
continue the execution of the program
(gdb) c
wait until the breakpoint is hit,
analyse and display the traces
- on assembly level
(gdb) record instruction-history
- on c level
(gdb) record function-call-history /ilc
you can increase the number of instructions displayed by using
(gdb) set record instruction-history-size size
(gdb) set record function-call-history-size size
the work is still in an early stage and needs to be improved, extended and
stabilized. your feedback and contributions are welcome
Kind Regards
Zied Guermazi
