[ANNOUNCE] Linaro Binary Toolchain Release-Candidate GCC 6.5-2018.12-rc1
The Linaro Binary Toolchain
============================
The Linaro GCC 6.5-2018.12-rc1 Release-Candidate is now available.
The GCC 6 Release series has significant changes from the GCC 5
release series. For an explanation of the changes please see the
following website:
https://gcc.gnu.org/gcc-6/changes.html
For help in porting to GCC 6 please see the following explanation:
https://gcc.gnu.org/gcc-6/porting_to.html
Download release-candidate packages from:
(sources) http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.5-2018.12-rc1/
(binaries) http://snapshots.linaro.org/components/toolchain/binaries/6.5-2018.12-rc1/
Previous snapshots and release-candidates are at:
http://snapshots.linaro.org/components/toolchain/binaries/
Previous releases are at:
http://releases.linaro.org/components/toolchain/binaries/
A description of the arm and AArch64 target triples can be found at:
https://collaborate.linaro.org/display/TCWGPUB/ARM+and+AArch64+Target+Tripl…
Host Requirements
==================
Linaro officially supports the current and previous Ubuntu LTS
releases (as of the time of this release). This does not mean that
the toolchain will not work on other/older Linux distributions. See
the following for the life-time of Ubuntu LTS releases.
https://wiki.ubuntu.com/Releases
The host system upon which the cross-compiler will run requires a
minimum of glibc 2.14, because of API changes to glibc's memcpy API.
https://bugs.linaro.org/show_bug.cgi?id=1869
Package Versions
=================
Linaro GCC 6.5-2018.12-rc1
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.5-2018.12-rc1/
Linaro glibc 2.23 (linaro/2.23/master)
https://lists.gnu.org/archive/html/info-gnu/2016-02/msg00009.html
Linaro newlib 2.4-2016.03 (linaro_2.4-branch)
https://sourceware.org/ml/newlib/2016/msg00370.html
Linaro binutils 2.27 (users/linaro/binutils-2_27-branch)
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=blob_plain;f=bin…
Linaro GDB 8.2 (gdb-8.2-branch)
https://lists.gnu.org/archive/html/info-gnu/2018-09/msg00001.html
Linaro toolchain package git branches are hosted at:
http://git.linaro.org/toolchain
NEWS for GCC 6 (as of Linaro GCC 6.5-2018.12-rc1)
==================================================
* Runtest and gdbserver are no longer installed in the toolchain bin/
directory. Binary releases no longer include runtest at all, and
gdbserver is a target tool; it is now shipped in the sysroot under
usr/bin/.
LDTS case #2211: gdbserver and runtest in GCC binary release are in
the wrong place or have the wrong name
* Gdbserver is no longer linked statically, because this is currently
unsupported.
Linaro bugzilla #3344: gdbserver broken in Linaro 2017.02
https://bugs.linaro.org/show_bug.cgi?id=3344
* Previous MinGW hosted version of Linaro GCC C preprocessor failed to
convert character set used for string, character constants, etc. This
is fixed in this release.
Linaro bugzilla #3040 : CC1 and cc1plus cannot convert UTF-8.
https://bugs.linaro.org/show_bug.cgi?id=3040
* The Linaro GCC 6.3-2017.05 snapshot added support for -mpure-code
option to ARMv7-M and ARMv8-M targets. This option ensures functions
are put into sections that contain only code and no data.
* The GDB version was upgraded from GDB 8.1 to 8.2.
* Previous versions of the Linaro GCC 6 toolchain, when -static
-E/—dynamic-list are passed to the linker, might create executables
with dynamic sections which aren’t supported by run-time. This was
exhibited in Perf Tools build system and has been fixed upstream and
backported into Linaro Binutils 2.27 branch.
Linaro bugzilla #2926 : Perf tools compiled statically for AArch64
with Linaro release 6.1 and later ones was not statically linked.
https://bugs.linaro.org/show_bug.cgi?id=2926
* The Linaro GCC 6.3-2017.03 snapshot fixed some ILP32 issues (TLS,
exception handling, …) and these have been incorporated into this
release.
* Previous versions of the Linaro GCC 6 toolchain were incorrectly
generating floating-point code for soft-float Linux targets
(arm-linux-gnueabi, and armeb-linux-gnueabi). This escaped detection
until recently because the soft-float targeted toolchains were
configured to use general-purpose registers for passing floating-point
values (which is what you would expect for soft-float toolchains) and
the intra-routine floating-code was not noticed.
The issue would only show up on targets that were run on hardware that
truly didn't have floating-point hardware where the kernel did not
trap and emulate floating-point routines. This has been solved in
Linaro GCC 6.3-2017.02-rc2 by configuring the toolchain (using
--with-float=soft) to generate code without any floating-point
instructions at all (-mfloat-abi=soft).
https://review.linaro.org/#/c/16968/2
This change should not break compatibility between existing binaries
compiled with these toolchains since the float-point parameter passing
ABI is still the same.
* A bug/regression in the compiler has been identified whereby the
target function that is invoked when calling a "weak" function
directly is the "strong" override, whereas when calling the function
via a pointer the "weak" implementation is used. This would be
noticed as inconsistent function invocation when invoking directly vs.
invoking via function pointer. This issue only affected 32-bit arm
targets. This regression has been fixed upstream and backported into
Linaro GCC 6.3-2017.02-rc2.
GCC PR target/78253: [5/6/7 Regression] [ARM] call weak function
instead of strong when called through pointer.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78253
Linaro bugzilla #2562: ARM GCC 5.2 call weak function instead of
strong when called through pointer
https://bugs.linaro.org/show_bug.cgi?id=2562
* MS Windows does not support symlinks and the MS Windows archive
extractor does not properly deep copy the symlink target
files/directories into the symlinked directory structure when
unpacking the toolchain archive. This causes problems with missing
dependencies when using the Linaro mingw toolchains, as identified in
the following bugs:
https://bugs.linaro.org/show_bug.cgi?id=2684https://bugs.linaro.org/show_bug.cgi?id=2192https://bugs.linaro.org/show_bug.cgi?id=2762
This has been solved by copying files rather than using symlinks when
the mingw targetted toolchain archives are created.
https://review.linaro.org/#/c/16415/
* Users of Linaro's toolchain have encountered problems when building
projects with Autotools (specifically libtool):
https://bugs.linaro.org/show_bug.cgi?id=2764
The Linaro binary toolchain release contained files with a .la suffix
as artifacts of the toolchain build process. These .la files are
helper files for libtool, but unlike a gcc install tree, they are not
position independent and contain full paths. Since these artifacts
contain absolute paths they can actually mislead user invocation of
libtool into not finding required libraries (because they reference
the build tree, not the install location) and hence breaking Autotools
builds. These *.la file artifacts have been removed from Linaro
toolchain binaries because they are unnecessary for users.
* The Linaro GCC 6.3-2017.01 snapshot added further enablement for
ARMv8-M and these have been incorporated into this release.
* Compiling and statically linking some SPEC2006int tests against
tcmalloc have been failing due to a problem with glibc's memory
allocator function overrides. This was fixed upstream:
https://sourceware.org/bugzilla/show_bug.cgi?id=20432
Backported into Linaro glibc 2.23:
commit 058b5a41d56b9a8860dede14d97dd443792d064b
Author: Florian Weimer <fweimer(a)redhat.com>
Date: Fri Aug 26 22:40:27 2016 +0200
malloc: Simplify static malloc interposition [BZ #20432]
* Host binaries for x86_64 linux hosts now have symbols and debug
information stripped in order to reduce the size of the toolchain
binary archives. This reduces the archive size from 1.5G to 600M for
aarch64-linux-gnu target with the gcc-6-branch.
* The GDB version was upgraded from GDB 7.11 in the Linaro GCC
6.1-2016.08 release to GDB 7.12 in the Linaro GCC 6.2-2016.11 release.
* The Linaro GCC 6.2-2016.10 snapshot added AArch32 support for ARMv8.2
and ARMv8m, as well as some AArch64 fixes for ARMv8.2, and bug fixes
merged from FSF GCC 6.2. This is available in the binary toolchain as
of Linaro GCC 6.2-2016.11.
* Basic tuning support for the Qualcomm qdf24xx was added to the Linaro
GCC 6.2-2016.10 snapshot and is available in the binary toolchain as
of Linaro GCC 6.2-2016.11.
* IFUNC was disabled for baremetal targets, as it was causing test-suite
failures, and is presently a Linux only feature.
* The gold linker was added to this binary release.
* Backported malloc_lock fix into Linaro newlib 2.4.
commit 2665915cfc46aa6403bb2efd473c523d3167e0cb
Author: Andre Vieira (lists) <Andre.SimoesDiasVieira(a)arm.com>
Date: Thu Jun 16 12:23:51 2016 +0100
Re-enable malloc_lock for newlib-nano
* Backported rawmemchr patch into Linaro newlib 2.4.
commit e7b1ee2ea6aa3ee1da41976407410e6202a098c5
Author: Wilco Dijkstra <Wilco.Dijkstra(a)arm.com>
Date: Thu May 12 16:16:58 2016 +0000
Add rawmemchr
* Backported strlen fix when using Thumb-2 and -Os -marm into Linaro
newlib 2.4.
commit 5c02bcc086a96b174e1b9e1445a4a1770070107a
Author: Thomas Preud'homme <thomas.preudhomme(a)arm.com>
Date: Wed May 11 17:18:48 2016 -0400
Fix strlen using Thumb-2 with -Os -marm
* Backported fix for semihosting ARM when heapinfo not provided by
debugger into Linaro newlib 2.4.
commit 5c9403eaf40951f8a4f55ed65f661b485ff44be7
Author: David Hoover <spm2(a)dangerous.li>
Date: Thu Apr 21 07:12:24 2016 +0200
Fixed semihosting for ARM when heapinfo not provided by debugger.
* Merged latest FSF glibc release/2.23/master into Linaro glibc 2.23.
* Backported __ASSUME_REQUEUE_PI check Linaro glibc 2.23 branch.
commit 2d20c3bf918cd94ebd4106693adb3a5c9272baba
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Tue May 17 10:16:39 2016 -0300
Add runtime check for __ASSUME_REQUEUE_PI (BZ# 18463)
* Backported removal of __ASSUME_SET_ROBUST_LIST from Linaro glibc 2.23
branch.
commit bb8f09d72756186a3d82a1f7b2adcf8bc1fbaed1
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 19:01:10 2016 -0300
Remove __ASSUME_SET_ROBUST_LIST
* Backported removal of __ASSUME_FUTEX_LOCK_PI from Linaro glibc 2.23
branch.
commit e48b4e7fed0de06dd7832ead48bea8ebc813a204
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 10:35:25 2016 -0300
Remove __ASSUME_FUTEX_LOCK_PI
* Merged latest FSF binutils-2_27-branch into
linaro_binutils-2_27-branch.
* The libwinpthread DLL is now copied into the host bin directory to
satisfy mingw package dependencies.
* Backported GNU Linker fix.
commit fbc6c6763e70cb2376e2de990c7fc54c0ee44a59
Author: Nick Clifton <nickc(a)redhat.com>
Date: Tue Aug 23 09:45:11 2016 +0100
Fix seg-fault in ARM linker when trying to parse a binary file.
* Backported GNU Assembler fix for PR 20364
commit 5fe7ebe5ab43750abf8f490b785d99a1e598e7fd
Author: Nick Clifton <nickc(a)redhat.com>
Date: Fri Aug 5 10:37:57 2016 +0100
Fix the generation of alignment frags in code sections for AArch64.
https://sourceware.org/bugzilla/show_bug.cgi?id=20364
* Performance related backports from the following snapshots have been
included: Linaro GCC 6.1-2016.06, Linaro GCC 6.1-2016.07, Linaro GCC
6.1-2016.08, Linaro GCC 6.2-2016.09, Linaro GCC 6.2-2016.10, Linaro
GCC 6.2-2016.11, Linaro GCC 6.2-2016.12, Linaro GCC 6.3-2017.01,
Linaro GCC 6.3-2017.02, Linaro GCC 6.3-2017.03, Linaro GCC
6.3-2017.04, Linaro GCC 6.3-2017.05, Linaro GCC 6.3-2017.06, Linaro
GCC 6.4-2017.07, Linaro GCC 6.4-2017.08, Linaro GCC 6.4-2017.09,
Linaro GCC 6.4-2017.10, Linaro GCC 6.4-2018.04 and Linaro GCC
6.5-2018.11.
See the following Linaro GCC snapshots:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.06/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.07/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.1-2016.08/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.09/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.10/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.11/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.2-2016.12/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.01/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.02/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.03/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.04/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.05/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.3-2017.06/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2017.07/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2017.08/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2017.09/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2017.10/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.4-2018.04/http://snapshots.linaro.org/components/toolchain/gcc-linaro/6.5-2018.11/
Contact Linaro
===============
File bugs at http://bugs.linaro.org
For Linaro member support see http://support.linaro.org
For Linaro community support email linaro-toolchain(a)lists.linaro.org
Mark Murray Staff Software Engineer | Arm
. . . . . . . . . . . . . . . . . . . . . . . . . . .
p: +44 1223 405082
arm.com <http://www.arm.com>
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
=== Work done during last week ===
* DSGHACK-25 (Support arithmetic on FileCheck regex variable):
+ simplifies how numeric expression are matched and checked, easier
to explain too
+ start code cleanup and increasing testing, ETA: end of next week
* Line management.
=== Plan for week 50 ===
* DSGHACK-25 (Support arithmetic on FileCheck regex variable):
+ extend testcase coverage (add tests for latest syntax change and
add more negative testing)
+ finish cleaning up the code
+ improve documentation
* Try to reproduce perf issue mentioned in week #30's weekly report on
latest perf
* Line management
o 4 days week.
o LLVM
* Machine Outliner on ARM prototype:
- Rebased on upstream Machine Outliner developments
- Still working on LLVM bootstrap failures in ARM mode
o Misc
* Various meetings and discussions.
[VIRT-246 # ARMv8.1-LOR Limited Ordering Regions ]
Posted v3.
[VIRT-294 # ARMv8.3-PAuth, Pointer Authentication ]
Implemented. Posted v1. I can sort of guarantee that it doesn't work in
system mode yet, cause I spotted a bug by eye yesterday.
In the meantime, Peter via Will Deacon added me to the cc list for the in
development kernel patches. I'll review v5 shortly.
r~
Upstream Work ([VIRT-109])
==========================
- reviewed {Qemu-devel} {PATCH for-4.0 v2 00/37} tcg: Assorted
cleanups Message-Id:
<20181123144558.5048-1-richard.henderson(a)linaro.org>
- looked at common part of {Qemu-devel} {PATCH 2 00/39} Windbg
supporting Message-Id:
<154401431697.8440.845616703562380651.stgit(a)Misha-PC.lan02.inno>
- finished review of {PATCH v6 00/13} hardfloat Message-Id:
<20181124235553.17371-1-cota(a)braap.org>
- 2-3x speed-ups for FPU heavy workloads!
- finished prototype of [enabling tcg system tests]
- includes some more userspace tests as well
- just missed posting RFC, will post next week
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[enabling tcg system tests]
https://github.com/stsquad/qemu/tree/testing/enable-system-tcg-tests-v1
Other Tasks
===========
- debugged compiler failures on SynQuacer
- turned out it was dodgy RAM *slot layout* - system now stable
again
- did some bug triage/tagging in QEMU bug database
- update JIRA tickets as per QEMU initiative thread Message-Id:
<87wop4gezg.fsf(a)linaro.org> :todo
Completed Reviews [3/3]
=======================
{PATCH v3 00/16} tcg: Assorted cleanups
Message-Id: <20181130215221.20554-1-richard.henderson(a)linaro.org>
- CLOSING NOTE [2018-12-03 Mon 10:46]
Easier review with the re-org of removal and clean-up patches
{Qemu-devel} {PATCH for-4.0 v2 00/37} tcg: Assorted cleanups
Message-Id: <20181123144558.5048-1-richard.henderson(a)linaro.org>
- CLOSING NOTE [2018-12-03 Mon 10:47]
Got part way through, subset reposted and reviewed. Some questions
remain on the efficiency of ool softmmu w.r.t various
micro-architectures.
{PATCH v6 00/13} hardfloat
Message-Id: <20181124235553.17371-1-cota(a)braap.org>
- CLOSING NOTE [2018-12-05 Wed 12:48]
Looking good. I've proposed myself as another maintainer for FPU
emulation and will handle the pull request once the tree opens.
Absences
========
- Christmas Holidays
- Connect BKK19 (1-5th April 2019)
Current Review Queue
====================
* {RFC} arm: Allow system registers for KVM guests to be changed by QEMU code
Message-Id: <20181206151401.13455-1-peter.maydell(a)linaro.org>
* {Qemu-arm} {PATCH 00/13} Support disabling TCG on ARM
Message-Id: <20181113165247.4806-1-sameo(a)linux.intel.com>
* {PATCH for-4.0 0/5} tcg/i386: Improve guest_base handling
Message-Id: <20181203160840.15115-1-richard.henderson(a)linaro.org>
* {Qemu-devel} {PATCH for-4.0 00/71} qtest: qgraph driver framework
Message-Id: <1543851204-41186-1-git-send-email-pbonzini(a)redhat.com>
* {Qemu-arm} {PATCH v7 00/16} gdbstub: support for the multiprocess extension
Message-Id: <20181123091729.29921-1-luc.michel(a)greensocs.com>
* {PATCH 0/7} Acceptance Tests: basic architecture support
Message-Id: <20181004151429.7232-1-crosa(a)redhat.com>
--
Alex Bennée
[LLVM-499] LLD support for linking the linux kernel
- [LLVM-504] Support for linker script symbol assignment to an alias.
-- Diagnosed problem and made reproducer on PR.
-- Reviewed the upstream patch.
- [LLVM-503] Support for discarding .dynamic, .dynstr and .dynsym
-- Reviewed upstream patch and proposed testcase that is
representative of the kernel use case.
Some revisiting of scripts and advice on how to cross compile clang
libraries. Looks like I have some updates to do to the documentation
for some configurations I haven't tried before.
- 2 days at ARM internal Codegen conference. Really good event,
standard of work was very high, left enthused.
Planned absences:
Christmas Holiday from 17th December to 4th January
== Progress ==
* FDPIC
- GCC: no feedback yet on v4 patches
- GDB: did not decide yet how/if to commonalize with frv code. Asked
for advise on the gdb list.
* GCC upstream validation:
- reported a few regressions, helped testing some patches
- dealing with some random results, still
- trying qemu-3.1.0-rc3, memory consumption problems with
aarch64-linux. LSF reports (cgroup-based) do not seem consistent with
time --verbose.
* GCC:
- rebased ubsan / bare-metal patches. Trying to build an LLVM
toolchain to see how to properly apply my patches
* misc (conf-calls, meetings, emails, ....)
- reviewing/submitted infra script patches
- ran Spec2006 on aarch32 using gcc-8.2 sysroot, results match the
previous ones, so the improvements are only imputable to the compiler.
- dealing with nasty ST-internal infrastructure problems
- trying to look at noinit/persistent attributes provided by other
toolchains, need a windows machine :(
== Next ==
FDPIC:
- GCC: handle feedback on v4 patches
- GDB: update patches
- uclibc-ng: look at how to test fdpic mode with openadk
Benchmarks:
- collect results
Validation:
- isolate if/why qemu-3.1.0-rc3 consumes more memory than 2.11 for
aarch64-linux target
Progress:
* VIRT-65 [QEMU upstream maintainership]
- release work (we needed an rc4, and then an rc5 due to a
late-breaking security bug)
- wrote a patch which I hope will fix synchronization of system
register state to KVM for a case where QEMU code wants to change
the register values, which it does when QEMU is arranging to inject
an exception into the guest
- catching up on patch review and assembling target-arm.next
ready for when the tree reopens
- some simple patches fixing minor memory leaks spotted by clang LeakSanitizer
- sent a patch for a race condition that meant we would sometimes ignore
a guest-requested system reset or otherwise get confused by it
thanks
-- PMM
== Progress ==
# [LLVM-492] [Thumb GlobalISel] Lower parameters for Thumb functions
- Committed upstream
# [LLVM-500] [Thumb GlobalISel] Support G_ADD, G_SUB, G_MUL
- Started working on this but it became apparent that the existing
tests would be easier to reuse if we had support for G_LOAD first
# [LLVM-506] [Thumb GlobalISel] Support G_LOAD and G_STORE
- Investigated whether we could get TableGen to select G_LOADs and
G_STOREs by porting ComplexPattern
- Unfortunately that is not enough, and even AArch64 has
hand-written code for it in the instruction selector
- Will handle it the ugly way next week
== Plan ==
# LLVM-506, LLVM-500
Greetings,
I’m trying to have the Aarch64 gcc optimize a single function using the O3 optimization in this manner:
void __attribute__ ((optimize ("-O3", "-ftree-vectorize" )))
However, when examining the assembler code, there is no trace of any optimization beyond the project default.
The only way to successfully enforce the optimization is using -O3 in the gcc command line. Then the compiler produces ARM neon instructions.
Do you know any issues regarding function level optimizations and the Aarch64 gcc?
Regards
