[VIRT-198 # QEMU: SVE Emulation Support ]
Added sve-max-vq cpu property to adjust the sve vector length
from the qemu command-line, a-la "-cpu max,sve-max-vq=N".
[VIRT-249 # SVE System Mode ]
Reorganized all of the load/store helpers to handle bi-endian,
and pass in TCGMemOpIdx for use by softmmu.
[Upstream]
Round 3 of nanomips review.
Other review of -rc3 and 3.1 patches.
r~
4 day week.
[TCWG-1424] Investigate profile feedback on codesize
Have now got all the data I need, started the process of tidying up
scripts to analyse whether it is worth posting upstream and what the
best default parameters are.
[Misc]
Track down problem on AArch64 build-bot to a likely code-gen problem
in Clang 3.8 for AArch64 only. Wrote a patch to use clang 6.0 on all
the Linaro buildbots rather than just the libcxx builder. Will
hopefully get deployed next week.
[LLD] Work on adding support for EF_ARM_ABI_FLOAT_HARD and EF_ARM_ABI_FLOAT_SOFT
Needed to unblock freebsd from moving onto trunk
Mostly done, just need to finish adding tests. Might be a good jumping
off point to implement full build attributes support.
SVE Support ([VIRT-198])
========================
- posted {PATCH} tcg/aarch64: limit mul_vec size Message-Id:
<20180719154248.29669-1-alex.bennee(a)linaro.org> : done
- finished preparing [talk for HPC workshop on 26th]
- delivered it Thursday evening, recording will go online in due
course
- blog post is now [live on linaro.org]
[VIRT-198] https://projects.linaro.org/browse/VIRT-198
[talk for HPC workshop on 26th]
https://docs.google.com/presentation/d/1Jz9ePpJ_YGd3vPXMj090VwRwPfBSYWHlSiz…
[live on linaro.org] https://www.linaro.org/blog/sve-in-qemu-linux-user/
Write and submit Connect abstract
- submitted abstract: My other machine is virtual for YVR18
SVE Reviews
- finished reviewing {RFC PATCH 00/16} KVM: arm64: Initial support for
SVE guests Message-Id:
<1529593060-542-1-git-send-email-Dave.Martin(a)arm.com>
QEMU ARMv8.3 Support ([VIRT-241])
=================================
- had a [quick run at VHE] which crystallised some of the issues with
register aliasing
- obviously need to sit and think about a design for this
[VIRT-241] https://projects.linaro.org/browse/VIRT-241
[ARMv8.1 Mandatory Features]
https://projects.linaro.org/browse/TCWG-1434
[ARMv8.1 optional features] https://projects.linaro.org/browse/TCWG-1435
[quick run at VHE] https://github.com/stsquad/qemu/tree/add-vhe-rfc
Upstream Work ([VIRT-109])
==========================
- posted {PATCH v1 for 3.0 0/2} fix for bug 1783362 Message-Id:
<20180726132947.28538-1-alex.bennee(a)linaro.org>
- started reviewing {PATCH v5 00/24} Fixing record/replay and adding
reverse debugging Message-Id:
<20180725121311.12867.21729.stgit@pasha-VirtualBox>
- number of build issues need to be resolved
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[v2 of docker fixes]
https://github.com/stsquad/qemu/tree/testing/docker-fixes-for-3.0-v2
[debootstrap master]
https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=903657
Testing and CI
==============
- finish converting the CI RISU jobs to submit via qa-reports :todo
- got a Packet.net machine for QEMU/Docker testing
- posted {PATCH RFC 00/10} docker on non-x86 hosts Message-Id:
<20180718100505.7546-1-alex.bennee(a)linaro.org>
QEMU CI Loop ([VIRT-187])
- investigating porting existing RISU tests via qa-reports
- add additional test patterns :todo
[VIRT-187] https://projects.linaro.org/browse/VIRT-187
KVM CI Loop ([VIRT-2])
- need to sync-up on the current state of this work :todo
- started looking at Xiang's latest auto setup scripts
[VIRT-2] https://projects.linaro.org/browse/VIRT-2
[our wiki] https://wiki.linaro.org/Core/Virtualization
MTTCG tests ([VIRT-52])
- need to dust these off and get up-streamed if I'm going to add new
tests :todo
[VIRT-52] https://projects.linaro.org/browse/VIRT-52
Other Tasks
===========
- Submitted "My Other Machine is Virtual" abstract for YVR18
- Create an Instrumentation EPIC :todo
[arm64 story a bit more desktopy]
https://github.com/stsquad/gentoo/tree/arm-keywords-so-far
[Kata Containers] https://katacontainers.io/
[CrosVM] https://chromium.googlesource.com/chromiumos/platform/crosvm/
Completed Reviews [2/2]
=======================
{RFC PATCH 00/16} KVM: arm64: Initial support for SVE guests
Message-Id: <1529593060-542-1-git-send-email-Dave.Martin(a)arm.com>
- CLOSING NOTE [2018-07-26 Thu 11:18]
Did about 2/3rds of series, drew did the top few - re-spin on it's
way.
{PATCH v4 00/19} reverse debugging
Message-Id: <20180528071332.9424.27343.stgit@pasha-VirtualBox>
- CLOSING NOTE [2018-07-26 Thu 15:06]
v5 posted
Absences
========
- YVR18 Connect (17th-21st September 2018)
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {PATCH v5 00/24} Fixing record/replay and adding reverse debugging
Message-Id: <20180725121311.12867.21729.stgit@pasha-VirtualBox>
* {PATCH 0/5} tests/vm: Improvements when KVM is not available
Message-Id: <20180717024827.27897-1-f4bug(a)amsat.org>
* {RFC PATCH 00/12} tests/tcg: Add TriCore tests
Message-Id: <20180501142222.19154-1-kbastian(a)mail.uni-paderborn.de>
* {PATCH v4 00/14} fp-test + hardfloat
Message-Id: <1528768140-17894-1-git-send-email-cota(a)braap.org>
* {Qemu-devel} {RFC PATCH v2 0/7} QEMU binary instrumentation prototype
Message-Id: <152819515565.30857.16834004920507717324.stgit@pasha-ThinkPad-T60>
* {Qemu-devel} {RFC v2 0/2} Add BPF suuport to Qemu
Message-Id: <20180625110706.23332-1-sameeh(a)daynix.com>
--
Alex Bennée
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ investigated required work for implementing HCR_EL2.TGE (the "trap
general exceptions" bit); identified what we've already implemented,
wrote patches for the other parts, and sent them out for review
+ sent patch to fix GICv3 emulation bug where we checked the wrong
HCR_EL2 bit when deciding whether to route IRQs to EL2
+ usual release-cycle related work
* VIRT-164 [improve Cortex-M emulation]
+ sent patch to fix a bug where we could escalate to the wrong HardFault
when AIRCR.BFHFNMINS is set
+ fixed bug where we had miswired the IoTKit timer1 IRQ line
+ fixed bug preventing VM state save/load for the NVIC with Security
extensions enabled
+ fixed "use of uninitialized memory" bug in the TZ-MPC model
+ had another look at the requirements for v8M stack-limit checking
+ implemented missing support for MPS2 FPGAIO up/down counter registers
+ started on a model of the CMSDK "dual-timer" module (as part of
looking at what remaining devices in the MPS2 are easy/worth
modelling so we can close out VIRT-182)
thanks
-- PMM
Following on from last weeks discussion here is an alternative abstract
which instead of looking to the future with where QEMU can go would
concentrate on what you can do with QEMU now. What do you think?
_____________________________
MY OTHER MACHINE IS VIRTUAL
Alex Bennée
_____________________________
YVR18
When working with new architectures there is often a scramble for
getting access to hardware. However hardware comes with it's own
problems - especially when it's new. It's hard to upgrade, hard to poke
around inside and hard to experiment with.
This is an area where QEMU can help. Thanks to it cross-architecture
emulation and ability to run full-system emulation it provides a
platform for experimentation without the potential consequences of
turning your new board into a inanimate brick.
This talk will start with an overview of QEMU and how various
configurations can be setup. We'll then examine various features
available that allow us to examine the run time behaviour of code inside
QEMU as well as discuss some of its limitations. Finally we'll look at
some experiments that would be hard to do with real hardware and what
they can tell us about the code we are running.
--
Alex Bennée
[Upstream]
Spent several days working with Alex and his docker testing bits.
Reproduced the reported ppc32 test failure. Wrote a patch to
implement the swapcontext syscall, which has now been merged.
Round 3 review of nanoMIPS submission.
Fixed a tricky issue wrt call-clobbered vector registers.
[VIRT-198 # QEMU: SVE Emulation Support ]
Some back and forth with Nils Meyer wrt SVE vs Grid.
TODO: Let the SVE vector length be selectable from the command-line.
r~
=== Work done during this 4.5day week ===
* TCWG-1062 (MCF branch prediction overload due to too many
consecutive branches):
+ rework reproduction steps around an existing script that does all
the steps of downloading and installing the benchmark and run it under
perf
+ gather what was observed that triggered the ticket I'm working on
-> narrowed down to 2/3 functions to be on the lookout
+ benchmark GCC and LLVM and compare the profile for these functions
-> bingo, I can see a branch issue
+ try to get assembly files to add nop and test performance again
-> code in assembly file is different from output of perf report,
need to rerun benchmark again to make sure I didn't fail there (sigh)
* TCWG-1379 / GCC PR85434 / CVE-2018-12886: upstream review
+ reply to upstream review comments
+ start to test tightening predicate for new instruction pattern
-> weird build error when trying to bootstrap unrelated to my
changes (missing header issues in stage 1 libgcc build)
* TCWG-1337 / LLVM PR34170:
+ respond to upstream review comments
* Continue work on TCWG-1428 (Support arithmetic on FileCheck regex variable):
+ hammer out syntax based on upstream feedback about what would be
desirable as FileCheck expressions
* Misc:
+ Linaro LLVM buildbot babysitting
+ Arm internal presentation
* Half a day off on Friday
=== Plan for week 30 ===
* TCWG-1428 (Support arithmetic on FileCheck regex variable): address comments
+ rework patch once syntax is agreed
* TCWG-1062 (MCF branch prediction overload due to too many
consecutive branches):
+ find out why assembly file from -save-temps is different from perf
report output
+ check performance when adding padding
+ start to investigate a solution
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ code review
- another pass of the GICv2 virt support
- IMX6UL SoC support
- more patches for v6M support in core and NVIC
- PMU emulation improvements
+ rolled another 3.0 release candidate
* VIRT-164 [improve Cortex-M emulation]
+ implemented and sent a patchset for doing tailchaining of pending
exceptions during exception return
thanks
-- PMM
SVE Support ([VIRT-198])
========================
- converted [post on SVE development] to jekyl blog format
- a little fighting with the tooling but [draft on staging]
- trying to get compilers set-up to debug failing Grid Test_simd
testcase
- now have full 1yr armclang license for me and rth
- Test_simd passes with fresh build and current master
- not sure old binary fails - but Nils happy with current state
- fixed vector multiply bug on aarch64 backend
- posted {PATCH} tcg/aarch64: limit mul_vec size Message-Id:
<20180719154248.29669-1-alex.bennee(a)linaro.org>
- drafting [talk for HPC workshop on 26th]
- currently 11 minutes talking, need to expand
[VIRT-198] https://projects.linaro.org/browse/VIRT-198
[post on SVE development]
https://docs.google.com/document/d/15v1asqk-6de2RtA7ZWdIQ29PkY92gl3nlwG7_Se…
[draft on staging]
https://staging.linaro.org/blog/sve-in-qemu-linux-user/
[talk for HPC workshop on 26th]
https://docs.google.com/presentation/d/1Jz9ePpJ_YGd3vPXMj090VwRwPfBSYWHlSiz…
Write and submit Connect abstract
- "How-to use QEMU to test my software on no-silicon hardware"? :todo
- amalgamate HPC talk and blog post
SVE Reviews
- finish reviewing {RFC PATCH 00/16} KVM: arm64: Initial support for
SVE guests Message-Id:
<1529593060-542-1-git-send-email-Dave.Martin(a)arm.com> :todo
- stalled this week due to other activities
QEMU ARMv8.3 Support ([VIRT-241])
=================================
- had a [quick run at VHE] which crystallised some of the issues with
register aliasing
- obviously need to sit and think about a design for this
[VIRT-241] https://projects.linaro.org/browse/VIRT-241
[ARMv8.1 Mandatory Features]
https://projects.linaro.org/browse/TCWG-1434
[ARMv8.1 optional features] https://projects.linaro.org/browse/TCWG-1435
[quick run at VHE] https://github.com/stsquad/qemu/tree/add-vhe-rfc
Upstream Work ([VIRT-109])
==========================
- posted {PATCH v3 for 3.0 00/18} docker fixes (and one tcg test
tweak) Message-Id: <20180717195553.9111-1-alex.bennee(a)linaro.org>
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[v2 of docker fixes]
https://github.com/stsquad/qemu/tree/testing/docker-fixes-for-3.0-v2
[debootstrap master]
https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=903657
Testing and CI
==============
- started looking at converting the CI RISU jobs to submit via
qa-reports
- got a Packet.net machine for QEMU/Docker testing
- posted {PATCH RFC 00/10} docker on non-x86 hosts Message-Id:
<20180718100505.7546-1-alex.bennee(a)linaro.org>
QEMU CI Loop ([VIRT-187])
- investigating porting existing RISU tests via qa-reports
- add additional test patterns :todo
[VIRT-187] https://projects.linaro.org/browse/VIRT-187
KVM CI Loop ([VIRT-2])
- need to sync-up on the current state of this work :todo
- started looking at Xiang's latest auto setup scripts
[VIRT-2] https://projects.linaro.org/browse/VIRT-2
[our wiki] https://wiki.linaro.org/Core/Virtualization
MTTCG tests ([VIRT-52])
- need to dust these off and get up-streamed if I'm going to add new
tests :todo
[VIRT-52] https://projects.linaro.org/browse/VIRT-52
Other Tasks
===========
- Create an Instrumentation EPIC :todo
[arm64 story a bit more desktopy]
https://github.com/stsquad/gentoo/tree/arm-keywords-so-far
[Kata Containers] https://katacontainers.io/
[CrosVM] https://chromium.googlesource.com/chromiumos/platform/crosvm/
Completed Reviews [6/6]
=======================
{PATCH v2 00/13} iommu: support txattrs, support TCG execution, implement TZ MPC
Message-Id: <20180604152941.20374-10-peter.maydell(a)linaro.org>
- CLOSING NOTE [2018-06-14 Thu 19:27]
Looks good.
{PATCH 0/8} Docker improvements
Message-Id: <20180628164643.9668-1-f4bug(a)amsat.org>
- CLOSING NOTE [2018-06-29 Fri 21:38]
Grabbed some patches, commented on others
{Qemu-arm} {PATCH v6 00/35} target/arm SVE patches
Message-Id: <20180627043328.11531-1-richard.henderson(a)linaro.org>
- CLOSING NOTE [2018-06-29 Fri 21:39]
Looks good
{Qemu-devel} {PATCH v5 00/35} target/arm SVE patches
Message-Id: <20180621015359.12018-1-richard.henderson(a)linaro.org>
- CLOSING NOTE [2018-06-29 Fri 21:39]
Looking good, stopped to move to v6
{PATCH 0/4} KVM: arm64: FPSIMD/SVE fixes for 4.17
Message-Id: <1528976039-25826-1-git-send-email-Dave.Martin(a)arm.com>
- CLOSING NOTE [2018-06-29 Fri 21:40]
Seems sane to me.
{Qemu-arm} {PATCH v3-a 00/27} target/arm: Scalable Vector Extension
Message-Id: <20180516223007.10256-1-richard.henderson(a)linaro.org>
- CLOSING NOTE [2018-07-13 Fri 20:02]
Already merged
Absences
========
- Friday 20th July
- YVR18 Connect (17th-21st September 2018)
- KVM Forum 2018 (24th-26th October 2018)
Current Review Queue
====================
* {RFC PATCH 00/16} KVM: arm64: Initial support for SVE guests
Message-Id: <1529593060-542-1-git-send-email-Dave.Martin(a)arm.com>
* {PATCH 0/5} tests/vm: Improvements when KVM is not available
Message-Id: <20180717024827.27897-1-f4bug(a)amsat.org>
* {PATCH v4 00/19} reverse debugging
Message-Id: <20180528071332.9424.27343.stgit@pasha-VirtualBox>
* {RFC PATCH 00/12} tests/tcg: Add TriCore tests
Message-Id: <20180501142222.19154-1-kbastian(a)mail.uni-paderborn.de>
* {PATCH v4 00/14} fp-test + hardfloat
Message-Id: <1528768140-17894-1-git-send-email-cota(a)braap.org>
* {Qemu-devel} {RFC PATCH v2 0/7} QEMU binary instrumentation prototype
Message-Id: <152819515565.30857.16834004920507717324.stgit@pasha-ThinkPad-T60>
--
Alex Bennée
[TCWG-1424] Using profile feedback to investigate code size
- Have most of the information I need to draw some conclusions. Should
have the remaining runs I need over the weekend.
- Next step is to analyse the data a bit more formally and write up.
- Discuss next steps. It may be worth polishing up the pass and
posting upstream as an RFC.
- Would like to wrap the investigation up by the end of July
On holiday on Friday 20th July and Monday 23rd July, back in the
office on Tuesday 24th.
