# Progress #
* TCWG-1040, [4/10]
Update my patches to remove the last use of MAX_REGISTER_SIZE.
Commit my 1/6 patch series. Prepare 2/6 patch series. Need to be
sync'ed with GDB 8.1 release.
* TCWG-1159, [4/10] GDB flexible target description conversion.
Commit patch for tic6x, and ready to post patches for nios2.
* Run GDB testsuite with CLANG. [1/10]
Commit my patches, but leave some controversial patches in my tree.
Now, I get some reasonable GDB test result with clang.
* Upstream patches review. [1/10]
Approved four Alan's patches.
# Plan #
* ARMv8 tagged pointer support in GDB.
* Update my patches to remove the last use of MAX_REGISTER_SIZE.
--
Yao Qi
== Progress ==
* GCC
- FDPIC: hitting a linker assert while building gcc target libs
* GCC upstream validation:
- reported a few regressions, fixed a couple of obvious errors
- struggling with ST-internal infrastructure difficulties
* Infrastructure:
- looking at ABE & building a native toolchain from a manifest
* misc (conf-calls, meetings, emails, ....)
- became 1 year older :)
== Next ==
* GCC/FDPIC
* GCC upstream validation
== This Week ==
* PR82665 (3/10)
- Submitted patch upstream
- Blocked on POINTER_DIFF_EXPR patch by Marc Glisse.
* PR82808 (1/10)
- Submitted another fix but was rejected by Richard.
* TCWG-1234 (4/10)
- Tried tweaking with register allocator, but to no effect
- Trying to think about possible approaches for stage-3 fixes.
* Misc (2/10)
- Meetings
- Managed to get autofdo working
== Next Week ==
- Continue ongoing tasks
== Progress ==
* GCC
- FDPIC: rebased binutils patches, debugging CI loop.
* GCC upstream validation:
- iterating on qemu/sanitizers problems.
Found a bug in arm sanitizer libs, already fixed upstream.
Requested a new merge in GCC.
- reported a few regressions
* Infrastructure:
- looking at ABE & building a native toolchain from a manifest
* misc (conf-calls, meetings, emails, ....)
- started looking at hcqc
== Next ==
* GCC/FDPIC
* GCC upstream validation
# Progress #
* TCWG-1040, [4/10]
Update my patches to remove the last use of MAX_REGISTER_SIZE.
Get everything in shape. Post my 1/6 patch series.
* TCWG-1159, [4/10] GDB flexible target description conversion.
Post patch for tic6x, and write the patch for nios2.
* ILP32 GDB. [1/10]
Chat with Maxim, triage some test failures.
* Open GCC PR 83010.
AArch64 GCC doesn't generate DW_AT_location for TLS variable. It
causes some GDB test failures. CLANG+GOLD can correctly generate
DW_AT_location.
* Run GDB testsuite with CLANG. [1/10]
Post three patches to GDB testsuite to compile test cases with CLANG.
# Plan #
* TCWG-1125, ARMv8 tagged address support in GDB.
--
Yao Qi
Hi Linaro Team,
I'm currently using toolchain
gcc-linaro-7.1.1-2017.08-x86_64_arm-eabi.tar.xz
<https://releases.linaro.org/components/toolchain/binaries/latest/arm-eabi/g…>
to
develop my bera-metal programs.
My compile option is "-marm -march=armv7-a -mtune=cortex-a9 -mlittle-endian
-mfloat-abi=hard -mfpu=neon"
I found an issue, when I use memcpy, and if the DEST or SOURCE address is
not 4 bytes aligned, the system hangs.
It seems that this toolchain doesn't support using hard float and NEON ?
My question is does this toolchain support hard float and NEON in the
newlib C library?
If I want to use hard float and NEON, how can I do that?
Your reply is more appreciated!!
Over the last couple of months arm64 community and us have tested various aspects of ILP32 toolchain and, while most of toolchain works as expected, several features are still missing. Most of the work left is on GDB side, especially using LP64 GDB to debug ILP32 applications.
1. [GCC] GCC sanitizers (ASAN, UBSAN) are not supported for ILP32.
-- TCWG is working on implementing sanitizer support for ILP32.
2. [GLIBC] LP64 glibc libthread_db does not support ILP32. This causes failures when LP64 GDB is trying to debug ILP32 threaded application. It is expected by users to be able to use LP64 GDB to debug ILP32 applications (LP64 AArch64 GDB can successfully debug AArch32 applications already!).
-- Steve, do you plan to work on adding libthread_db support for ILP32?
3. [GDB] Handle ILP32 siginfo layout. Kernel siginfo layout is different between LP64 and ILP32.
4. [GDB] Inferior call passing pointer argument. GDB may need update to handle 32-bit pointer vs 64-bit pointer.
5. Handle shared libraries. GDB needs to read a linked list out of the inferior, and that list is about the libraries loaded already. LP64 and ILP32 may have different layouts.
6. [GDB] GDB resolves ifunc functions, needs to read auxv (HWCAP) from the inferior. auxv is different on LP64 and ILP32.
7. [GDB] Gdbserver support for ILP32.
--
Maxim Kuvyrkov
www.linaro.org
== This Week ==
* TCWG-1234 (2/10)
- Came up with another fix which works on my test-case but not on
actual regression
* PR82808 (2/10)
- Modified patch based on upstream suggestions.
* PR82665 (4/10)
- Untested fix
* Misc (2/10)
- Meetings
- Reading ipa mod/ref paper
- Looked at autofdo
== Next Week ==
- Continue ongoing tasks
== Progress ==
o Linaro GCC/Validation
* GCC 6 and 7 2017.11 RC1 deployed
* Fixed Binutils branch used for 5.5 release
* Investigate and fixed Python3 issues in release notes script
(patch under review)
o LLVM ramp-up
* Upstream bug 32999:
- Still tracking corner cases
* Looking at zero/sign-extension elimination status
o Misc
== Plan ==
o Release handover
o LLVM tasks (Bug 32999, sign-extension)
