Cisco is trying to use clang/lto on big-endian arm, which apparently
requires gold, and gold does not support the --be8 option which is
required for ARMv7 big-endian support. Does anyone here care about
this?
Umesh Kalappa asked about this on the binutils mailing list
https://sourceware.org/ml/binutils/2016-05/msg00209.html
and discovered that it is a known bug reported 5 years ago
https://sourceware.org/bugzilla/show_bug.cgi?id=13213
Jim
== Progress ==
o Extended validation (7/10)
* Investigate GDB instabilities:
- branch tracing issue are due to builder feature support
- Our 2 old builders, which don't support it, removed from x86
validation pool
* Benchmarking:
- Looked at Lava instance API and lava-tool usage and prerequisite
- Implementing comparison script
o Misc (3/10)
* Various meetings and discussions.
== Plan ==
o Continue on validation/benchmarking
o Catch up with upstream work.
=== This Week ===
Support for watchpoint un-alligned watchpoint addresses on LLDB
AArch64 [TCWG-367] [3/10]
-- Made changes to NativeRegisterContext_arm64 to support multiple
watchpoint slot for a single watch address.
-- Enabled unaligned watchpoints and experimented with resulting false
positives.
LLDB Chromebook Test Stability [TCWG-563] [3/10]
-- Migrated local builder to Ubuntu 16.04 xenial
-- Ran LLDB testsuite with GCC 5.x.x on chromebook, raspberryPI2
-- Updated LLDB testsuite makefile.rulez to use correct cross AR and OBJCOPY
LLDB buildbot updates and maintenance [TCWG-241] [2/10]
-- Investigation of LLDB buildbot slave failure
-- Implemented stale log deletion mechanism by making sure we keep
only 10 most recent logs.
LLDB upstream collaboration and Arm/AArch64 Linux port maintenance [1/10]
-- Verify patches under review
-- Analyzed TestTopLevelExprs on LLDB arm failure and committed xfail.
Miscellaneous [1/10]
-- Meetings, emails, discussions etc.
-- Travel bookings for connect and TCWG sprint.
=== Next Week ===
Close out TCWG-231 (LLDB bring up and bug fixing on HiKey 96Board)
-- Run and comparison of AArch64 LLDB test results vs hikey showing
less than 5% difference.
Close out LLDB Chromebook Test Stability [TCWG-563]
-- Make sure there are no failures for which we dont know the underlying reason.
-- Report remaining bugs and commit xfails upstream.
Support for watchpoint un-alligned watchpoint addresses on LLDB
AArch64 [TCWG-367]
-- Further testing of false positive results due to allowing
un-alligned watch-points.
LLDB buildbot updates and maintenance [TCWG-241]
-- Figure out difference of test results between local and remote chromebooks.
-- Figure out a way to hide unused test slots by buildbot factory.
Miscellaneous
-- Migrate laptop to ubuntu 16.04 in hope of better driver support.
-- Portugal visa and travel booking
== Progress ==
* Validation
- cleanup
- reviews
- asserting ABE master vs stable results
- stopped investigation on a huge number of unexpected
regressions, maybe caused by builders crashes
- created a Jenkins job able to detect the base GCC
branch, in order to select the right libc/binutils version
- found why ABE master showed regressions with the
_Pragma3 GCC test. Fix under review.
- investigating recent, numerous build failures
* Backports
- updated backport to fix bug #2185 after Kugan analysis
- drafted a script to parse the spreadsheet and generate
the backflip commands as appropriate
* GCC
- reported a couple of regressions on trunk
- Neon intrinsics tests update: committed.
We are now ready to remove neon-testgen.ml
== Next ==
* Validation
- cleanup
- armv8l vs arm
- ABE master vs stable
* GCC
- trunk monitoring
- more on AdvSIMD intrinsics
== Progress ==
PR40921 -missed optimization: x + (-y * z * z) => x - y * z * z
- Patch committed
PR63586 - x+x+x+x -> 4*x in gimple
- Patch committed
- There were couple of fallouts
PR71179 - ICE fold_convert_loc, at fold-const.c:2360
- Patch committed
PR71170 - ICE in rewrite_expr_tree, at tree-ssa-reassoc.c:3898
- Tried various options to fix this and settled on an implementation
- Patch sent for upstream review
== Plan ==
Follow upon remaining upstream patches
IPA VRP
== This Week ==
* TCWG-528 (2/10)
- Addressed comments from Richard and committed upstream (r236502, r236503)
* TCWG-72 (5/10)
- Updated patch and fixed regressions caused due to patch.
* TCWG-319 (1/10)
- Found why big endian vectorizer was not vectorizing the test-case with -O2.
* Holiday (2/10)
== Next Week ==
- TCWG-319: Post patch upstream and get it committed.
- TCWG-72: Post patch upstream and hopefully get it committed this week.
- TCWG-548: Start re-looking at section anchors.
=== Progress ===
TCWG-591 MOVW incorrectly allowed on ARM v5 committed upstream
TCWG-595 LLD port to ARM architecture
I am getting close to being able to run hello world built with lld.
I'm converging 1 bug at a time.
- The PLT handling code is working and the loader can execute the
image and starts the .init function.
- Currently failing in the weak call to __gmon_start__. At present lld
is removing undefined weak references from executables instead of
passing them on for the dynamic loader to resolve. This may not be
necessary on x86 but it is necessary on ARM.
-- Just finished a hack that should make this work, although it will
need some tidying up.
=== Plan ===
Get hello world working and then take stock of what I've learned and
come up with a plan in Jira for what needs to be done.
== Progress ==
* Add a diag handler for llc so it doesn't exit on the first error it
finds [TCWG-592] [1/10]
- Fixed and rebased the patch, it has been committed upstream
* Inline assembly constraints support for ARM [TCWG-560] [1/10]
- Rebased the patch, it has been committed upstream
* Remove exit-on-error flag from CodeGen tests [TCWG-604] [4/10]
- This is a follow-up of TCWG-592: when changing the diag handler,
some of the tests started to fail, so we had to add an exit-on-error
flag to preserve the old behaviour until we can fix the tests.
- Submitted a patch fixing the MIR tests (PR27770) - in upstream review
- Submitted a patch fixing an AMDGPU test (PR27762) - in upstream review
- Submitted a patch fixing a BPF test (PR27766) - in upstream review
- Investigated the ARM test (PR27765)
* Use git worktree in llvm helper scripts [TCWG-587] [3/10]
- Working on a prototype
* Misc [1/10]
- Meetings, buildbots, IRC issues
- Got LLVM commit access, yay!
== Plan ==
* Remove exit-on-error flag from CodeGen tests [TCWG-604]
- Fix the remaining ARM, BPF and AMDGPU tests (unfortunately the ARM
test seems a bit more involved, so I might pick out the others first
just to get them out of the way)
* Use git worktree in llvm helper scripts [TCWG-587]
- Continue prototyping, start a RFC on it next week
# Progress #
* TCWG-518, [6/10]
fix all bugs, and post them upstreams for review!
* PR 19998, write a patch to fix it. [2/10]
* Some discussions on unstable GDB test results in validation tests.
[1/10]
* Meetings [1/10]
# Plan #
* Respond comments to my patches,
* TCWG-333, think about the right fix.
--
Yao
This may be a better question for the linaro tools group. +cc their list
for the general question of conventions surrounding how shared library
objects identify and access thread-local storage that they need as part of
calling threads.
On Tue, May 17, 2016 at 11:06 AM, Nikhil Agarwal <nikhil.agarwal(a)linaro.org>
wrote:
> Hi All,
>
> I am trying to write a shared library object over ODP. Our ODP library has
> some per thread variables. When my application invokes an API of shared
> object which accesses per thread variable it gives segmentation fault.
>
> My concern is that when a shared object is loaded dynamically, how memory
> is assigned to thread specific variables defined inside shared objects.
> AFAIK we need to compile it with -ftls-model=global-dynamic, which is
> enabled by default when compiled with -fPIC flag, and library loader
> takes care for these issues.
>
> I am not an expert in this area, please help me in getting to some
> suitable reference pointers or some steps I might have missed.
>
> Thanks in advance
>
> Nikhil
>
