linaro-toolchain

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5814 discussions

by Yao Qi

# Progress # * TCWG-162, Aarch64 non-stop debugging (or displaced stepping). [1/10] Patches are committed. * TCWG-335, HW breakpoint on 2-byte aligned address, [3/10] patch is tested against most recent kernel. Everything works. Patch is committed. * TCWG-166, Review ARM software breakpoint in GDBserver patches. [1/10] Almost done. * Review various upstream patches. [2/10]. * Misc, [3/10] ** Meeting, ** Write up some slides about recent GDB development, and present them in ARM. # Plan # * TCWG-387, Move GDB using libopcodes to decode instructions. * More upstream patches review. * Two days off on Tue and Thu. Maybe off on Friday too. -- Yao

11 years

[ANNOUNCE] Linaro GCC 5 2015.10 snapshot

by Yvan Roux

The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2015.10 snapshot of the Linaro GCC 5 source package. This monthly snapshot[1] is based on FSF GCC 5.2+svn228499 and includes performance improvements and bug fixes backported from mainline GCC. This snapshot contents will be part of the 2015.11 stable [1] quarterly release. This snapshot tarball is available on: http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.2-2015.10/ Interesting changes in this GCC source package snapshot include: * Updates to GCC 5.2+svn228499 * Backport of [Bugfix] [AArch32] Fix PR target/29693 * Backport of [Bugfix] [AArch32] PR 52144 Fix ARM/thumb attribute target * Backport of [Bugfix] [AArch32] PR 52144 Fix ARM/thumb attribute target * Backport of [Bugfix] [AArch32] PR/63870 Add a __builtin_lane_check * Backport of [Bugfix] [AArch32] PR/63870 Add qualifier to check lane bounds in expand * Backport of [Bugfix] [AArch32] PR 66541, 52144 Fix ARM/thumb pragma target * Backport of [Bugfix] [AArch32] PR middle-end 64744/48470/43404 * Backport of [Bugfix] [AArch32] PR target/52144 attribute target (thumb,arm) [2.2/6] * Backport of [Bugfix] [AArch32] PR target/52144 target attributes Clean up arm_option_params_internals macro settings for attribute/pragma targets * Backport of [Bugfix] [AArch32] PR target/65768 * Backport of [Bugfix] [AArch64] PR63870 Neon error messages for vldN_lane/vstN_lane * Backport of [Bugfix] Fix PR66168 * Backport of [Bugfix] Fix PR67280 and Linaro BZ #1765 * Backport of [Bugfix] PR c/49551 * Backport of [Bugfix] PR middle-end/64130 * Backport of [Bugfix] PR middle-end/66726 * Backport of [Bugfix] PR target/65768 Check cost of constants before propagating * Backport of [Bugfix] PR tree-optimization/67043 * Backport of [AArch32] 1-ARM/Thumb target attributes * Backport of [AArch32] 2-ARM/Thumb target attributes * Backport of [AArch32] 3-ARM/Thumb target attributes * Backport of [AArch32] Add ARM/thumb attribute target * Backport of [AArch32] Add ARM/thumb pragma target * Backport of [AArch32] Add TARGET_OPTION_PRINT * Backport of [AArch32] attribute target (thumb,arm) [2.1/6] * Backport of [AArch32] Correct spelling of references to ARMv6KZ * Backport of [AArch32] Fix ChangeLog * Backport of [AArch32] fix date * Backport of [AArch32] Fix static interworking call * Backport of [AArch32] Fix thinko in use of TARGET_UNIFIED_ASM * Backport of [AArch32] Fuseable is not a word -> s/fuseable/fusible/g * Backport of [AArch32] Rename LOGICAL_OP_NON_SC to LOGICAL_OP_NON_SHORT_CIRCUIT * Backport of [AArch32] Restrict MAX_CONDITIONAL_EXECUTE when -mrestrict-it is in place * Backport of [AArch32] Use dmb ish instead of dmb sy for ARM * Backport of [AArch64] 1/3 ARMv8.1 Use atomic compare-and-swap instructions when available * Backport of [AArch64] [1/4] Define candidates for instruction fusion in a .def file * Backport of [AArch64] 1/5 Use atomic instructions for swap and fetch-update operations * Backport of [AArch64] 2/3 ARMv8.1 Use the atomic compare-and-swap instructions when available * Backport of [AArch64] [2/4] Control the FMA steering pass in tuning structures rather than as core property * Backport of [AArch64] 2/5 Make BIC, other logical instructions, available * Backport of [AArch64] 3/3 ARMv8.1 Use the atomic compare-and-swap instructions when available * Backport of [AArch64] [3/4] De-const-ify struct tune_params * Backport of [AArch64] 3/5 Add atomic load-operate instructions * Backport of [AArch64] [4/4] Add -moverride tuning command, and wire it up for control of fusion and fma-steering * Backport of [AArch64] 4/5 Use atomic load-operate instructions for fetch-update patterns * Backport of [AArch64] 5/5 Use atomic load-operate instructions for update-fetch patterns * Backport of [AArch64] Add ACLE predefined marcos: __ARM_ALIGN_MAX_PWR and __ARM_ALIGN_MAX_STACK_PWR * Backport of [AArch64] Add support for ARMv8.1 command line options * Backport of [AArch64] Always register fma_steering pass but gate it on the target option instead * Backport of [AArch64] [armv8.1] Expand +rdma documentation, small changes to march and mcpu text * Backport of [AArch64] --with-arch in config.gcc support "." * Backport of [AArch64] Change %ld to %wd for HOST_WIDE_INT parameter * Backport of [AArch64] Fix another ICE with -mgeneral-regs-only * Backport of [AArch64] Fix ICES with -mgeneral-regs-only / -march=...+nofp * Backport of [AArch64] fix regrename pass to ensure renamings produce valid insns * Backport of [AArch64] Fix type of *<LOGICAL:optab>_one_cmpl_<SHIFT:optab><mode>3 pattern * Backport of [AArch64] Fuseable is not a word -> s/fuseable/fusible/g * Backport of [AArch64] Improve spill code - swap order in shl pattern * Backport of [AArch64] Improve spill code - swap order in shr patterns * Backport of [AArch64] movi type attribute confusion * Backport of [AArch64] Removed unused SLOWMUL target flags * Backport of [AArch64] typo fix in attribute for vst2_lane * Backport of [AArch64] Use conditional negate for abs * Backport of [Testsuite] [AArch32] Add -mfloat-abi=softfp to some xscale tests * Backport of [Testsuite] [AArch32] Disable attr_thumb.c test when Thumb mode is not supported * Backport of [Testsuite] [AArch32] Do not override -mcpu in no-volatile-in-it.c * Backport of [Testsuite] [AArch32] Fix gcc.target/arm/attr_thumb.c * Backport of [Testsuite] [AArch32] Fix gcc.target/arm/thumb_ifcvt.c * Backport of [Testsuite] [AArch32] gcc.target/arm/pr65647.c should not add -mfloat-abi=soft * Backport of [Testsuite] [AArch32] target attribute cleanup directives * Backport of [Testsuite] [AArch64] Testsuite check for sqrt_insn * Backport of [Testsuite] [AArch64] vld1-vst1_1.c: Add missing float32x4_t case * Backport of [Testsuite] AdvSIMD intrinsics tests cleanup: remove useless expected values * Backport of [Testsuite] Don't specify "dg-do run" explicitly for vect test cases * Backport of [Testsuite] gcc.target/arm/neon-reload-class.c: Remove movw and movt * Backport of [Testsuite] g++.dg/ext/pr57735.C should not run if the testsuite is explicitly passing -mfloat-abi=hard * Backport of [Testsuite] New AdvSIMD test * Backport of [Testsuite] New AdvSIMD test * Backport of [Testsuite] New AdvSIMD test * Backport of [Testsuite] New AdvSIMD test * Backport of [Testsuite] New AdvSIMD test * Backport of [Testsuite] New AdvSIMD test * Backport of [Testsuite] New AdvSIMD test * Backport of [Testsuite] New AdvSIMD test * Backport of [Testsuite] New AdvSIMD test * Backport of [Testsuite] New AdvSIMD test * Backport of [Testsuite] New AdvSIMD test * Backport of [Testsuite] New AdvSIMD test * Backport of [Testsuite] New AdvSIMD test * Backport of [Testsuite] New AdvSIMD test * Backport of [Testsuite] New AdvSIMD test * Backport of [Testsuite] New AdvSIMD test * Backport of [Testsuite] New AdvSIMD test * Backport of [Testsuite] New AdvSIMD test * Backport of [Testsuite] New AdvSIMD test * Backport of [Testsuite] New AdvSIMD test * Backport of [Testsuite] New AdvSIMD test * Backport of [Testsuite] Skip tests for inappropriate multilibs * Backport of [Misc] [1] Allow REG_EQUAL for ZERO_EXTRACT * Backport of [Misc] Set REG_EQUAL * Backport of [Misc] [2] Allow REG_EQUAL for ZERO_EXTRACT * Backport of [Misc] Fix ChangeLog * Backport of [Misc] fix segfault in verify_flow_info() with -dx option * Backport of [Misc] fix typo * Backport of [Misc] Fix typo: Rename insn_reservation cortex_53_advsimd to cortex_a53_advsimd * Backport of [Misc] Fuseable is not a word -> s/fuseable/fusible/g * Backport of [Misc] [ifcvt Fix typo in comment * Backport of [Misc] [match-and-simplify] fix incorrect code-gen in 'for' pattern * Backport of [Misc] [match-and-simplify] reject expanding operator-list to implicit 'for' * Backport of [Misc] [match-and-simplify] report error for invalid operator-lists * Backport of [Misc] [simplify-rtx][2/2] Simplify - (y ? -x : x) -> (!y ? -x : x) * Backport of [Misc] The comparison in a compare exchange should not take place in VOIDmode * Backport of [Misc] Use cinc mnemonic for *csinc2<mode>_insn * Backport of [Misc] warn for empty struct -Wc++-compat * Backport of [Misc] [Driver] Wrong C++ paths when configuring with "--with-sysroot=/" * Backport of [Misc] [combine][1/2] Try to simplify before substituting * Backport of [Doc] [AArch64] Clarify feature modifiers {no,}{fp,simd,crypto} * Backport of [Doc] [AArch64] Fix position of -moverride documentation * Backport of [Doc] move (Variable Attributes, Type Attributes) up Feedback and Support Subscribe to the important Linaro mailing lists and join our IRC channels to stay on top of Linaro development. ** Linaro Toolchain Development "mailing list": http://lists.linaro.org/mailman/listinfo/linaro-toolchain ** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@ * Bug reports should be filed in bugzilla against GCC product: http://bugs.linaro.org/enter_bug.cgi?product=GCC * Interested in commercial support? inquire at "Linaro support": mailto:support@linaro.org [1]. Stable source package releases are defined as releases where the full Linaro Toolchain validation plan is executed. [2]. Source package snapshots are defined when the compiler is only put through unit-testing and full validation is not performed.

11 years

[ACTIVITY] Week 40 #2

by Yvan Roux

== Progress == o Linaro GCC (9/10) * Backports and Reviews - FSF branch merge - AArch64 armv8-1 support backported - Attribute target almost done * Long discussion on infra and stability o Misc (1/10) * Various meetings == Plan == o Complete backports o 2015.10 Snapshot

11 years

[ACTIVITY] 4th - 9th October

by Bernie Ogden

LAVA uinstance for benchmarking - TCWG-396 [3/10] * Long meeting with Renato + LAVA/lab people * Much thinking about the security side * Wrote up rough draft of what I understand the design to be Investigate effectiveness of noise control measures - TCWG-358 [3/10] * Set up new host node * Dealt with one host node crash, one target crash ** Noticed that target was writing logs to tmpfs, changed that so I can investigate next crash * Both sides stayed up through the weekend, hurrah * Some work on data-massaging scripts Misc [4/10] Heavier than usual week mail-wise, plus performance review prep =Plan= Clean up uinstance design, circulate to make sure we're all on same page Look at data from experiments so far Investigate B&B's Debian-building tools

11 years

[ACTIVITY] 5 - 9 October 2015

by Kugan

== Progress == - 1 day off public holiday (2/10) - Upstream patch follow-ups (2/10) * https://gcc.gnu.org/ml/gcc-patches/2015-07/msg02196.html Trying to reproduce 1.cc failure found with Christophe's testing * https://gcc.gnu.org/ml/gcc-patches/2015-10/msg00129.html Committed it and verified this will not happen with linaro-5 branch - Widening pass (TCWG-547) - 4/10 * iterated based on review comments - Misc (2/10) * gcc/bug list * setup vpn to lab == Plan == * perf with spec2000 * continue with widening pass based on feedback

11 years

[ACTIVITY]

by Renato Golin

== Progress == * Maintenance (1/10) - Removed redundant DefaultCPU in ARMTargetInfo * Buildbots (4/10) - Looong discussions upstream about stability of buildbots - Trial with IFC6410 marginally successfull, still not good enough, aborting - Moved benchmark buildbot to silent (avoid unnecessary spam) - Writing up some docs on current infra and plan * Infrastructure (3/10) - Long internal discussions about stability of TCWG validation - Agreeing on a LAVA micro-instance in TCWG for benchmarks * Background (2/10) - Code review, meetings, discussions, general support, etc. - Checking status of OpenMP on AArch64 (~10 failures out of ~240 tests) == Plan == More stuff...

11 years

[ACTIVITY] 5-9 October 2015

by Christophe Lyon

== Progress == * Infrastructure/validation (3/10) - prototyping a new Jenkins to job properly allocate testers. This raises more questions.... * Backports (1/10) - a few reviews * GCC (3/10) - sent updated patch for vtbX34 AdvSIMD intrinsics - discussed a few regressions * Misc (conf calls, meetings, emails, ...) (3/10) == Next == * Backports reviews * Infrastructure * GCC devs

11 years

[ACTIVITY] 5th October -- 9th October

by Yao Qi

# Progress # * TCWG-162, Aarch64 non-stop debugging (or displaced stepping). [4/10] After testing, patches are posted upstream. * In order to review one c++ debugging patch, learn some C++ abi, vtable and VTT, etc. Understand gcc dump by -fdump-class-hierarchy. [3/10] * Fix GDB cxx build breakage caused by my patch. [1/10] * Ask the effect of -fstack-check=specific to AArch64 prologue. GDB needs update. [1/10] * Misc, email, meeting. [1/10]. # Plan # * TCWG-162, commit patches if no objections. * TCWG-387, use libopcodes to decode instructions in GDB. -- Yao

11 years

ILP32 is a parity feature to x86_64 (x32)

by Pinski, Andrew

11 years

Fw: [Bug target/67877] New: Split stack needs to be support for AARCH64

by Pinski, Andrew

FYI. This is a parity feature with both PowerPC64 and x86_64. Needed to support GCCgo. Note full gold support is needed too. ---------- Forwarded message ---------- From: pinskia at gcc dot gnu.org <gcc-bugzilla(a)gcc.gnu.org> Date: Tue, Oct 6, 2015 at 3:30 PM Subject: [Bug target/67877] New: Split stack needs to be support for AARCH64 To: gcc-bugs(a)gcc.gnu.org https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67877 Bug ID: 67877 Summary: Split stack needs to be support for AARCH64 Product: gcc Version: 6.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: pinskia at gcc dot gnu.org Target Milestone: --- Target: aarch64-linux-gnu* To support gccgo better split stack should be implemented.

11 years

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