== Progress ==
Further progress on GDB Tracepoints/Fast Tracepoints support on arm
[TCWG-480] [6/10]
-- Debugging and trying out some code enabling tracepoints in gdbserver
-- Research on past tracepoint patches and x86 vs arm architecture comparison
ARM/AArch64 GDB testsuite failures investigation [2/10]
Miscellaneous [2/10]
-- Meetings, Emails etc
-- Fix SSH configurations
-- Patch Scrolling
-- Hong Kong visa process
-- Multiple Dr visits due to continued sickness
== Plan ==
Further progress on GDB Tracepoints/Fast Tracepoints support on arm [TCWG-480]
Fix internet latency issues from lab hardware.
= Progress ==
* Short week was in vacation (22-24 October)
* Updated perf profile numbers for instruction count and documented my
analysis for Linaro compiler's O3 + LTO comparison on Aarch64 vs X86_64
(TCWG-544) (2/10)
* Misc [2/10]
emails, AMD meetings and 1-1 with inline manger.
1-1 with christophe.
== Plan ==
* Coremark benchmark and profiling.
Investigate trunk degradation for O3+ PGO + LTO and report.
== Progress ==
* Zero/sign extension elimination with widening types (TCWG-546 - 10/10)
- Re-wrote the pass from the results of experiments so far
- Fixed most of the regression failures
- 5 tests are still failing from C/C++/Fortran regression suite.
== Plan ==
* Continue with Zero/sign extension pass.
- Get bootstrapping for ARM and AArch64 working
- Fix remaining regression failures
- Add detail dumps
- Remove unnecessary copies (it is now being removed dead code
elimination pass)
- Get patch ready for upstream discussion
== This week ==
* GCC Modularization Project (5/10)
- Reviewed Re-Architecture GNU Cauldron videos by Andrew Macleod
- Reviewed tree/gimple source base
* Linaro bugzilla 602 - gcc 4.7.3 compiler internal error while building
hsail components (2/10)
- Resolved bug by determining that 4.7 compiler was assinging a
incorrect VFP register to a parameter
- Issue was fixed in 4.8 by adding call to arm_hard_regno_ok which
disallowed register
* vector Extensions Project (2/10)
- Preliminary design work on C++ classes and libvpx review
* Misc. (1/10)
- Conducted interview with Prathamesh Kulkarni
- Conference calls
== Next week ==
- GCC Modularization draft plan to TCWG group for review
- Understand status of Re-Architecture work by Andrew Macleod
- Further review of libvpx and vector extensions design work
=== Progress ===
SPEC Benchmarking [5/10]
. managed to run SPEC2k
. managed to run integer parts of SPEC2k6
. spec2xxx-report fails
. can't run full suite as LAVA Junos have insufficient disk
NEON error reporting bugs #403/#418 [3/10]
. ongoing mailing list discussions
vldN_lane patches [1/10]
. respun and committed
Misc [1/10]
=== Plan ===
Talk to Tejas @ ARM about AArch64 NEON loads/stores
Review prep
Move office
Day off at some point (likely Wednesday)
Short week, 2 days off
== Progress ==
* GCC trunk/4.9 cross-validation (2/10)
- committed testsuite patch to support forcing -mword-relocations
option when compiling testglue.c
* Neon intrinsics tests (2/10)
- committed the 1st batch (21 commits)
* AArch64 sanitizer
- libsanitizer internal data depend on the kernel headers version
used to build the toolchain, old_[gu]id_t type changed in 3.15.3.
- discussing the best way to address this
* Misc (2/10)
- calls, meetings
== Next ==
* 4.8 branch merge for next release
* GCC trunk/4.9 cross-validation
- investigate abi_check test, probably another testsuite harness
configuration issue
* AArch64 sanitizer
* Neon intrinsics tests update
* cbuild2:
- analyze previous results
- look at backport-test script + logs
== Progress ==
* Automation Framework (CARD-1378 1/10)
- Setting up Junos with ARM
* Toolchain (CARD-862 1/10)
- Some progress on fpu parser issue
- Produced a lot more work for the near future
* Buildbots (TCWG-76 4/10)
- Setting up a libc++ buildbot, working on reducing failures
- Some bots broken, bisecting
* Background (4/10)
- Code review, meetings, discussions, etc.
- Annual review
- More lab move planning
- EuroLLVM meetings and planning
== Plan ==
* US LLVM whole next week
The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2014.10
release of the Linaro GCC 4.9 source package.
Linaro GCC 4.9 2014.10 is the seventh Linaro GCC source package release. It is
based on FSF GCC 4.9.2-pre+svn216130 and includes performance improvements and
bug fixes.
With the imminent release of ARMv8 hardware and the recent release of the
GCC 4.9 compiler the Linaro TCWG will be focusing on stabilization and
performance of the compiler as the FSF GCC compiler. The Linaro TCWG provides
stable[1] quarterly releases and monthly enginering[2] releases.
Interesting changes in this GCC source package release include
* Updates to GCC 4.9.2-pre+svn216130
* Backport of [AArch64] Define TARGET_FLAGS_REGNUM
* Backport of PR target/61565
* Backport of [AArch64] libitm: Improve _ITM_beginTransaction
* Backport of [AArch64] Fix *extr_insv_lower_reg<mode> pattern
* Backport of [AArch64] Use CC_Z and CC_NZ with csinc and similar instructions
* Backport of [AArch32] Implement and vectorize lceil, lfloor, lround optabs
with new ARMv8-A instructions
* Backport of [AArch64] Improve epilogue unwind info rth
* Backport of [AArch64] Add a mode to operand 1 of sibcall_value_insn
* Backport of [AArch64] Add a builtin for rbit(q?)_p8; add intrinsics and tests
* Backport of [AArch32/AArch64] Schedule alu_ext for Cortex-A53
* Backport of [AArch64] Remove varargs from aarch64_simd_expand_args
* Backport of [AArch64] Tidy: remove unused qualifier_const_pointer
* Backport of [AArch32/AArch64] Add scheduling info for ARMv8-A FPU new
instructions in Cortex-A53
* Backport of [AArch32] Convert FP mnemonics to UAL.
* Backport of [AArch32] Enable auto-vectorization for copysignf
* Backport of [AArch32][tests] Make input and output arrays 128-bit aligned in
vectorisation tests
* Backport of [AArch64] Add crtfastmath
* Backport of PR target/56846 libstdc++
* Backport of PR target/63209
* Backport of [Ree] Ensure inserted copy don't change the number of hard
registers
* Backport of [AArch64] Fix force_simd macro in vdup_lane_2
* Backport of [AArch32] Disallow -mfpu=neon for unsuitable architectures
* Backport of [AArch32] movmisalign<mode>_neon_load
* Backport of [AArch64] Add constraint letter for stack_protect_test pattern
* Backport of [AArch64] Auto-generate the "BUILTIN_" macros
Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in bugzilla against GCC product:
http://bugs.linaro.org/enter_bug.cgi?product=GCC
* Questions? "ask Linaro":
http://ask.linaro.org/.
* Interested in commercial support? inquire at "Linaro support":mailto:
support(a)linaro.org
[1] Stable source package releases are defined as releases where the full Linaro
Toolchain validation plan is executed.
[2] Engineering source package releases are defined as releases where the
compiler is only put through unit-testing and full validation is not
performed.
Hi,
I start to use Linary AArch64 toolchain recently and just joined this maillist. I went through some of the archived threads but didn't read all of them. So bear me if I'm asking dumb question or old question which had been answered before.
For our use case, we are running the gdb client at early state of boot. So the ARMv8 target might be running into any EL and into either AArch64 or AArch32 state. My questions are:
1) Is the aarch64-none-elf-gdb.exe good for both AArch64 and AArch32 or I have to run the arm-none-eabi-gdb.exe if the target running in AArch32 state?
2) If the target is in AArch64 state, can I use the aarch64-none-elf-gdb.exe to load binary built for AArch32 to the target?
I'm really appreciated if anybody can help me on these two questions.
Thanks in advance,
StrongQ
