== Progress ==
* Ongoing refactoring of malloc to improve performance
* Preparation for Connect
== Issues ==
* None
== Plan ==
* Linaro Connect US
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
* Getting ready for Connect & LLVM US
* Stride Vectorization
- Added some logic to detect read/write reduction, possibly not the best
solution
- Consolidating all discussion into a single document for easy referral
- Creating several bugs (PR17673,PR17677,PR17678,PR17679,PR17680,PR17681)
* Re-Vectorizing
- A bug was passing the vectorizer again on an already vectorized loop
(PR17662)
- http://llvm-reviews.chandlerc.com/D2011, commit r193349
* Odroid XU
- Running more stable now, self-hosting doing well (more than a week on
24/7)
* Background
- Lots of patch reviews
- Lots of discussions about stride vectorization and others
== Plan ==
* Connect US next week
* US LLVM Dev Meeting the following
* Will be back in 2 weeks
== Issue ==
* Can not attend LCU'13 due to slow US Visa process.
== Progress ==
* Investigate lp:1243022:
- Root cause: REG_INC note is lost in subreg2 pass, so ira gets
wrong result in function validate_equiv_mem.
- Work out a patch for community review.
* Send conditional compare (CCMP) patch for community review.
- Benchmark testing is ongoing.
* Investigate heuristics to control ifcombine. Basically it will take
branch taken probability, frequency, branch-cost and basic block
reorder into account.
== Plan ==
* Performance tuning for CCMP.
== Issues ==
* None.
== Progress ==
* 2013-10 release.
- Backports and branch merges reviews.
* LRA on AArch32:
- Committed patch to enable LRA with the -mlra flag (disabled by default).
- Created 2 bugzilla entries for Thumb and address issues.
- Thumb issue work still ongoing.
* Launchpad bugs:
- Cleaned up a couple of them.
* Misc:
- Internal meetings.
== Next ==
* Short week (2 days off and 1 travelling)
* LRA
Hi,
may you think I'm on the wrong list, no not :-)
I currently build my u-boot loader using the linaro tool chain 2013.09
and run into a problem with the support for JFFS2 where the linker report
VFP usage where u-boot using softfp for build.
compiler options: -ffixed-r9 -msoft-float
arm-linux-gnueabihf-ld.bfd: error:
/opt/armhf/gcc-linaro-arm-linux-gnueabihf-4.8-2013.09_linux/bin/../lib/gcc/arm-linux-gnueabihf/4.8.2/libgcc.a(bpabi.o)
uses VFP register arguments, u-boot does not
when I use
make USE_PRIVATE_LIBGCC=yes
the problem shows up at an undefined reference
fs/jffs2/libjffs2.o: In function `jffs2_1pass_build_lists':
/opt/cross_build/uboot.d/u-boot-git/fs/jffs2/jffs2_1pass.c:1441: undefined
reference to `__aeabi_uldivmod'
arm-linux-gnueabihf-ld.bfd: BFD (crosstool-NG linaro-1.13.1-4.8-2013.09 - Linaro
GCC 2013.09) 2.23.2.20130610 Linaro 2013.06 assertion fail
/cbuild/slaves/oorts/crosstool-ng/builds/arm-linux-gnueabihf-linux/.build/src/binutils-linaro-2.23.2-2013.06/bfd/elf32-arm.c:7687
may someone have a closer look into it?
thanks
Chris
Hi,
On 4 October 2013 19:01, Maxim Uvarov <maxim.uvarov(a)linaro.org> wrote:
> On 10/04/2013 07:40 PM, Victor Kamensky wrote:
>>
>> Hi Maxim,
>>
>> readl and writel are stronger version of readl_realxed and
>> writel_relaxed:
>>
>> #define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; })
>> #define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); })
>>
>> They just add __iormb and __iowmb, I think it is very
>> dangerous thing to drop those memory barriers. I don't
>> think your change is correct and/or it requires way
>> better explanation.
>>
>> I've run into the same crash while working on 3.12-rc3 BE
>> issues. In fact I saw this failure on both BE and LE and on
>> old versions of BE kernels when I tried to use 4.8 gcc version
>> from 13.09 release. When I fall back to 4.7 (i.e 13.04) it
>> works fine
>>
>> I would think it is compiler issue or preexisting issue
>> in the code uncovered by compiler change. Personally
>> I think it is the first. Since I am chasing another problem
>> I did not have time to look more deeply into the issue.
>> IMHO it definitely require more digging. In mean time you
>> can quickly check your current version and try another one
>> if your looks as one described in this email.
>>
>> Thanks,
>> Victor
>
> Ah, yes, it __raw_write has direct access and writel swaps bits.
>
> If it's compiler issue then it has to be simple to compare objdump disasm
> output for that function.
I think I've hit this issue. We use latest Linaro GCC 4.8 in the CI
loop to build Arndale BE kernel.
Is there a bug reported to TCWG? If not, please create one:
https://bugs.launchpad.net/gcc-linaro/+filebug
FYI, I'm using Linaro GCC 4.8-2013.09 (pre-built) and latest
linaro-linaro (based on 3.12-rc5 with Victor's topic branch). Boot log
attached.
Cheers,
Fathi
---
Hi,
Can you review this patch for me and help me get it upstream?
This is an official request for help from LEG to the TCWG, if that
matters :-)
Cheers,
mwh
libatomic/configure.tgt | 5 -----
1 file changed, 5 deletions(-)
diff --git a/libatomic/configure.tgt b/libatomic/configure.tgt
index b9e5d6c..7eaab38 100644
--- a/libatomic/configure.tgt
+++ b/libatomic/configure.tgt
@@ -95,11 +95,6 @@ fi
# Other system configury
case "${target}" in
- aarch64*)
- # This is currently not supported in AArch64.
- UNSUPPORTED=1
- ;;
-
arm*-*-linux*)
# OS support for atomic primitives.
config_path="${config_path} linux/arm posix"
--
1.8.1.2
== Progress ==
* Releases 4.7 and 4.8 2013.10
* Tried cbuildv2: difficult because of our company proxy, making some
changes necessary to cbuildv2. Tutorial sessions in Connect will be
welcome.
* Started chasing a regression in armv5 targets, handed over to Kugan.
* Noticed regressions in some cases with Charles' testsuite patch.
== Next ==
Short week: Monday/Tuesday off; Friday: travelling to Connect
* Look at trunks' new vectorizer cost model.
* Prepare Connect
== Progress ==
* Short week Hujj and Eid-Al-Adha Public Holidays in Pakistan 15-17
October 2013.
(TCWG-280)
ARM GDB Process Record Syscall support:
* Performed testing with all fixes incorporated and debugged failures
in remote configuration.
== Plan ==
(TCWG-266), (TCWG-270), (TCWG-250), (TCWG-280) and (TCWG-288)
* Arm process record: Submit all fixes and updates in three patches.
* Prepare for connect and travel to Santa Clara.
Very short week was on leave 14th and 16th October (India Holidays).
== Progress ==
* libssp glibc
Glibc tests are Segmenting at dl_close_worker, when I set pointer
guard. Debuging shows segfaults while expanding THREAD_GSCOPE_WAIT.
My assumption is thread pointer points to TCB and after allocating 16
Bytes before that, we can set pointer gaurd at tp -16. But not sure,
why it affects the pthread structure header which holds gscope_flag.
Also looked at TLS_MULTIPLE_THREADS_IN_TCB, enabling it lead to
__libc_multiple_threads undefined errors.
== Plan ==
* Continue libssp support.
* PGO for aarch64
