Hi Manos,
New tests in your patch [1] fail on aarch64-linux-gnu build in our CI. Would you please investigate why? Testing logs are at [2].
[1] https://patchwork.sourceware.org/project/gcc/patch/20230818074943.41754-1-m…
[2] https://ci.linaro.org/job/tcwg_gcc_check--master-aarch64-precommit/1602/art…
--
Maxim Kuvyrkov
https://www.linaro.org
> On Aug 19, 2023, at 08:37, ci_notify(a)linaro.org wrote:
>
> [Linaro-TCWG-CI] FAIL: 6 regressions after gcc commit: basepoints/gcc-14-3331-gcddc26e0274 aarch64: Fine-grained ldp and stp policies with test-cases.
>
> Dear contributor, our automatic CI has detected problems related to your patch.
> Please find below some details about it.
>
> In CI config tcwg_gcc_check/master-aarch64 after:
>
> | commit cddc26e0274b51e775929e497f89d203211689d2
> | Author: Manos Anagnostakis <manos.anagnostakis(a)vrull.eu>
> | Date: Fri Aug 18 10:49:43 2023 +0300
> |
> | aarch64: Fine-grained ldp and stp policies with test-cases.
> |
> | This patch implements the following TODO in gcc/config/aarch64/aarch64.cc
> | to provide the requested behaviour for handling ldp and stp:
> |
> | /* Allow the tuning structure to disable LDP instruction formation
> | ... 47 lines of the commit log omitted.
>
> FAIL: 6 regressions
>
> regressions.sum:
> === gcc tests ===
>
> Running gcc:gcc.target/aarch64/aarch64.exp ...
> FAIL: gcc.target/aarch64/ldp_aligned.c scan-assembler-times ldp\tq[0-9]+, q[0-9] 1
> FAIL: gcc.target/aarch64/ldp_aligned.c scan-assembler-times ldp\tw[0-9]+, w[0-9] 3
> FAIL: gcc.target/aarch64/ldp_aligned.c scan-assembler-times ldp\tx[0-9]+, x[0-9] 3
> FAIL: gcc.target/aarch64/ldp_always.c scan-assembler-times ldp\tq[0-9]+, q[0-9] 2
> FAIL: gcc.target/aarch64/ldp_always.c scan-assembler-times ldp\tw[0-9]+, w[0-9] 6
> FAIL: gcc.target/aarch64/ldp_always.c scan-assembler-times ldp\tx[0-9]+, x[0-9] 6
>
> ... and 1 more entries
>
>
>
> -----------------8<--------------------------8<--------------------------8<--------------------------
> The information below can be used to reproduce a debug environment:
>
> Current build : https://ci.linaro.org/job/tcwg_gcc_check--master-aarch64-precommit/1602/art…
> Reference build : https://ci.linaro.org/job/tcwg_gcc_check--master-aarch64-build/836/artifact…
>
> Reproduce last good and first bad builds: https://git.linaro.org/toolchain/ci/interesting-commits.git/plain/gcc/sha1/…
>
> Full commit : https://github.com/gcc-mirror/gcc/commit/cddc26e0274b51e775929e497f89d20321…
>
> Latest bug report status : https://linaro.atlassian.net/browse/GNU-692
>
> List of configurations that regressed due to this commit :
> * tcwg_gcc_check
> ** master-aarch64
> *** FAIL: 6 regressions
> *** https://ci.linaro.org/job/tcwg_gcc_check--master-aarch64-precommit/1602/
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
- Continued working on new approach to support changing SVE vector
length in remote debugging.
# TCWG CI
- Analysed GCC regression GNU-880 which is actually an XFAIL → XPASS so
I sent a patch removing the xfail annotation.
- Analysed GCC regression GNU-881. The problem is that we don't have
Python in the ABE sysroot so a new Python GCC plugin testcase fails to
build. Sent a patch to detect that situation and mark the test as
unsupported. It was committed upstream.
- Tested a couple of new versions of a GDB mailing list patch to see if
it fixed the failure reported by the precommit CI. Reported results to
patch author.
- Fixed silly mistake spotted by Laurent in ABE Gerrit requests to use
TIMEOUTFACTOR for DejaGnu testsuites. Adjusted it to not use the
factor in GDB on armhf and sent new version for review.
- Reviewed a couple of Gerrit requests.
--
Thiago
Progress (short week, 3 days):
* UM-2 [QEMU upstream maintainership]
- sent out another couple of "avoid VLA" patches
* QEMU-530 [QEMU ARM v9.4 Baseline CPU for TCG]
- managed to write some first-pass code for the MTE checks for
FEAT_MOPS memset operations. Got something together enough to
send to RTH for some pre-review before I roll the approach out
to the other insns.
-- PMM
Hello,
# [GNU-767] Support changing SVE vector length in remote debugging
- Returned to implementing support for changing SVE vector length in
remote debugging. The patch series I sent earlier this year used an
approach that some maintainers weren't enthusiastic about (modifying
the Remote Serial Protocol to request XML target descriptions). Now
trying the approach they suggested, which is to extend target
descriptions to support expressing vector registers whose length is
given by the contents of another register.
# TCWG CI
- Following Maxim's suggestion, sent and merged Gerrit review requests
to increase chance of tcwg_gdb_check jobs to be faster at detecting
new or newly expired flaky tests:
- 45151: tcwg_gdb: Increase job frequency
- 45152: round-robin.sh (build_abe): Increase time to re-detect GDB
flaky tests
- Implemented change in ABE to support glibc's TIMEOUTFACTOR environment
variable for DejaGnu testsuites. Testing on armv8l and aarch64.
--
Thiago
Progress:
* UM-2 [QEMU upstream maintainership]
- code review, notably:
+ RTH's setnegcond series
+ Jean-Philippe's fixes for various FEAT_RME bugs
+ Akihiko's series to make KVM '-machine none' not default to 40 bits
of IPA space if the host doesn't supoprt that (like the Apple CPUs)
- sent a patch to catch the illegal exception return case from
EL3 with bad SCR_EL3.{NSE,NS}
- respin and resend of ptw cleanup patchset
- tidied another 'BiteSizedTask' entry into a gitlab issue
- went back to an old minor cleanup task: getting rid of the
last dozen or so uses of variable-length arrays in the codebase
(so we can enforce not using them in the compiler, and avoid
unchecked-on-stack-allocation security bugs). Sent patches to
zap a few more.
* QEMU-530 [QEMU ARM v9.4 Baseline CPU for TCG]
- thinking a bit more about FEAT_MOPS and MTE checks, but ultimately
not much progress: didn't find enough hours with a sufficiently
alert mind...
-- PMM
