Linaro-uefi

linaro-uefi@lists.linaro.org

811 discussions

[PATCH 1/3] Platforms/ARM/Juno: make EBC and RngDxe AARCH64 only

by Ard Biesheuvel

EBC is not supported at all on 32-bit ARM. The pseudo RNG lib could be implemented for 32-bit but there is no use case currently. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel(a)linaro.org> --- Platforms/ARM/Juno/ArmJuno.dsc | 12 +++++++----- Platforms/ARM/Juno/ArmJuno.fdf | 5 ++++- 2 files changed, 11 insertions(+), 6 deletions(-) diff --git a/Platforms/ARM/Juno/ArmJuno.dsc b/Platforms/ARM/Juno/ArmJuno.dsc index f9824f0f837e..182aa5520602 100644 --- a/Platforms/ARM/Juno/ArmJuno.dsc +++ b/Platforms/ARM/Juno/ArmJuno.dsc @@ -315,11 +315,6 @@ <LibraryClasses> BdsLib|ArmPkg/Library/BdsLib/BdsLib.inf } - SecurityPkg/RandomNumberGenerator/RngDxe/RngDxe.inf { - <LibraryClasses> - # DO NOT USE THIS LIBRARY FOR PRODUCTION DEVICES - RngLib|OpenPlatformPkg/Platforms/ARM/Binary/Library/PseudoRngLib/PseudoRngLib.inf - } # # SMBIOS/DMI @@ -341,7 +336,14 @@ NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf } +[Components.AARCH64] # # EBC # MdeModulePkg/Universal/EbcDxe/EbcDxe.inf + + SecurityPkg/RandomNumberGenerator/RngDxe/RngDxe.inf { + <LibraryClasses> + # DO NOT USE THIS LIBRARY FOR PRODUCTION DEVICES + RngLib|OpenPlatformPkg/Platforms/ARM/Binary/Library/PseudoRngLib/PseudoRngLib.inf + } diff --git a/Platforms/ARM/Juno/ArmJuno.fdf b/Platforms/ARM/Juno/ArmJuno.fdf index f760c128744b..beee7afd11fb 100644 --- a/Platforms/ARM/Juno/ArmJuno.fdf +++ b/Platforms/ARM/Juno/ArmJuno.fdf @@ -200,7 +200,6 @@ FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092 # Juno platform driver # INF ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.inf - INF SecurityPkg/RandomNumberGenerator/RngDxe/RngDxe.inf # # SMBIOS/DMI @@ -224,11 +223,15 @@ FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092 # after the device drivers (eg: Ethernet) to ensure we have support for them. INF EmbeddedPkg/Drivers/FdtPlatformDxe/FdtPlatformDxe.inf +!if $(ARCH) == AARCH64 # # EBC # INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf + INF SecurityPkg/RandomNumberGenerator/RngDxe/RngDxe.inf +!endif + [FV.FVMAIN_COMPACT] FvAlignment = 8 ERASE_POLARITY = 1 -- 2.7.4

8 years, 1 month

[PATCH v6 0/2] Armada 7040 network support

by Marcin Wojtas

Hi, I resend with fixed Tcam byte shifting. This seems as an obvious bug, but the VLAN code is now not used in Pp2Dxe, so it didn't come up. Comment dropped. Best regards, Marcin Bartosz Szczepanek (2): Drivers/Net: Create Pp2Dxe driver Platforms/Marvell: Enable Pp2Dxe driver on Armada70x0 platform Documentation/Marvell/PortingGuide/Pp2.txt | 59 + Drivers/Net/Pp2Dxe/Mvpp2Lib.c | 4839 ++++++++++++++++++++++++++++ Drivers/Net/Pp2Dxe/Mvpp2Lib.h | 726 +++++ Drivers/Net/Pp2Dxe/Mvpp2LibHw.h | 1968 +++++++++++ Drivers/Net/Pp2Dxe/Pp2Dxe.c | 1271 ++++++++ Drivers/Net/Pp2Dxe/Pp2Dxe.h | 614 ++++ Drivers/Net/Pp2Dxe/Pp2Dxe.inf | 91 + Platforms/Marvell/Armada/Armada.dsc.inc | 1 + Platforms/Marvell/Armada/Armada70x0.dsc | 18 +- Platforms/Marvell/Armada/Armada70x0.fdf | 1 + Platforms/Marvell/Marvell.dec | 16 + 11 files changed, 9603 insertions(+), 1 deletion(-) create mode 100644 Documentation/Marvell/PortingGuide/Pp2.txt create mode 100644 Drivers/Net/Pp2Dxe/Mvpp2Lib.c create mode 100644 Drivers/Net/Pp2Dxe/Mvpp2Lib.h create mode 100644 Drivers/Net/Pp2Dxe/Mvpp2LibHw.h create mode 100644 Drivers/Net/Pp2Dxe/Pp2Dxe.c create mode 100644 Drivers/Net/Pp2Dxe/Pp2Dxe.h create mode 100644 Drivers/Net/Pp2Dxe/Pp2Dxe.inf -- 1.8.3.1

8 years, 1 month

[PATCH v5 0/2] Armada 7040 network support

by Marcin Wojtas

Hi, Improvements after v4 review applied. Details can be found in the changelog. The patches are also available in the public github tree: https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/opp… I'm looking forward to your comments. Best regards, Marcin Changelog: v4 -> v5 * General - Rebase onto newest master * Library - Sort includes - Add comment in Mvpp2PrsTcamDataCmp - Remove space after '~' and '!' - Use unary '-' for inverting negative values - Replace '( (' with '((' - Break lines with '&&' in a consistent way with '||' - Remove stall from MvGop110PortIsLinkUp() for RXAUI links - Replace MVPP2_NULL with NULL * Pp2Dxe.inf - Update BASE name and version number v3 -> v4 * General - Rebase on top of linaro and tianocore master branches - Add commit with VOID* PCD declarations fixup - Squash library with driver * Library: - Add capital letters for the rest of variables - Improve line breaks - Remove MVPP2_V1 sections - trick with PCD didn't work - Add 'IN OUT', where necessary in entire file * Driver: - Sort all includes and PCD's - Improve PCD naming, add comments in docs - Update GUID's to use consistent values - Create Snp and SnpMode template, copymem and update only chosen fields - Remove MAC configuration via PCD - Copymem MAC address during init - Improve style, line breaks, brackets, add extra comments - In all routines, when checking interface state, separate success from error resolution (according to review hint) - Transmit - improve code, add comments, remove asm(), rename timeout and confusing 'Protocol' reference - Receive - move asserts to beginning of the function, rename 'Protocol', remove asm(), add comments - Initialize - add comments, improve casting and style - Remove redundant stall when opening interface * Header - Replace custom ALIGN macros with ones from MdePkg/Include/Base.h - Sorting - Remove unused - Refactorize inline helpers - Additional comments v2 -> v3 * Library - fully adjust to EDK2 coding style: - fix indentation, more efficient line breaking, blank line before comments, etc. - add spaces before '(' - align indentation and cleanup Mvpp2LibHw.h - adjust function declaration/definition to multiline format - set all functions' fields and local variables to begin with capital letters - unify same arguments to be used with consistent naming among functions - add comments for parser magic values (mostly TCAM/SRAM byte count here and there) - use local variables in order to simplify Mvpp2PrsSramOffsetSet() * Driver - set all functions' fields and local variables to begin with capital letters v1->v2 * Separate HW part of library header - Mvpp2LibHw.h - contains all HW-related defines and structures' definitions - Mvpp2Lib.h - library function prototypes and inline functions - Pp2Dxe.h - OS glue, macros, structures, driver constants * Remove all Marvell-specific typedefs - MV_U8, MV_32 and so on * Adjust code to UEFI coding style - Use typedefs for structures - Replace tabs with spaces - Replace "static" prefixes with "STATIC" - Change under_score style to CamelCase - Adjust namings accordingly - Commits currently passed PatchCheck test * Improvements/fixes - Remove Linux-related leftovers in Pp2Dxe.h - Change library headers to BSD - only - Remove duplicated AXI configuration - Enable setting MAC address with PCD's - Implement Snp->StationAddress callback for resetting/updating MAC address Bartosz Szczepanek (2): Drivers/Net: Create Pp2Dxe driver Platforms/Marvell: Enable Pp2Dxe driver on Armada70x0 platform Documentation/Marvell/PortingGuide/Pp2.txt | 59 + Drivers/Net/Pp2Dxe/Mvpp2Lib.c | 4843 ++++++++++++++++++++++++++++ Drivers/Net/Pp2Dxe/Mvpp2Lib.h | 726 +++++ Drivers/Net/Pp2Dxe/Mvpp2LibHw.h | 1968 +++++++++++ Drivers/Net/Pp2Dxe/Pp2Dxe.c | 1271 ++++++++ Drivers/Net/Pp2Dxe/Pp2Dxe.h | 614 ++++ Drivers/Net/Pp2Dxe/Pp2Dxe.inf | 91 + Platforms/Marvell/Armada/Armada.dsc.inc | 1 + Platforms/Marvell/Armada/Armada70x0.dsc | 18 +- Platforms/Marvell/Armada/Armada70x0.fdf | 1 + Platforms/Marvell/Marvell.dec | 16 + 11 files changed, 9607 insertions(+), 1 deletion(-) create mode 100644 Documentation/Marvell/PortingGuide/Pp2.txt create mode 100644 Drivers/Net/Pp2Dxe/Mvpp2Lib.c create mode 100644 Drivers/Net/Pp2Dxe/Mvpp2Lib.h create mode 100644 Drivers/Net/Pp2Dxe/Mvpp2LibHw.h create mode 100644 Drivers/Net/Pp2Dxe/Pp2Dxe.c create mode 100644 Drivers/Net/Pp2Dxe/Pp2Dxe.h create mode 100644 Drivers/Net/Pp2Dxe/Pp2Dxe.inf -- 1.8.3.1

8 years, 1 month

[PATCH] D02: Add two package at DSDT table

by Heyi Guo

com.asl: add reg-io-width and reg-shift package, for kernel using to set com port. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Heyi Guo <heyi.guo(a)linaro.org> --- Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Com.asl | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Com.asl b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Com.asl index 3bcc5fb..e3fc0d3 100644 --- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Com.asl +++ b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Com.asl @@ -30,6 +30,8 @@ Scope(_SB) ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () {"clock-frequency", 200000000}, + Package () {"reg-io-width", 4}, + Package () {"reg-shift", 2}, } }) } -- 1.9.1

8 years, 1 month

[PATCH v4 0/3] Armada 7040 network support

by Marcin Wojtas

Hi, It turned out that there was a lot more to improve before this round of commits. Again - a massive amount of cleanups and improvements according to your review and edk2 coding style. The details can be found in the changelog. Although I squashed library and the driver there are still 3 commits - one is yours with the dec fixups. The patches are also available in the public github tree: https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/opp… I'm looking forward to your comments. Best regards, Marcin Changelog: v3 -> v4 * General - Rebase on top of linaro and tianocore master branches - Add commit with VOID* PCD declarations fixup - Squash library with driver * Library: - Add capital letters for the rest of variables - Improve line breaks - Remove MVPP2_V1 sections - trick with PCD didn't work - Add 'IN OUT', where necessary in entire file * Driver: - Sort all includes and PCD's - Improve PCD naming, add comments in docs - Update GUID's to use consistent values - Create Snp and SnpMode template, copymem and update only chosen fields - Remove MAC configuration via PCD - Copymem MAC address during init - Improve style, line breaks, brackets, add extra comments - In all routines, when checking interface state, separate success from error resolution (according to review hint) - Transmit - improve code, add comments, remove asm(), rename timeout and confusing 'Protocol' reference - Receive - move asserts to beginning of the function, rename 'Protocol', remove asm(), add comments - Initialize - add comments, improve casting and style - Remove redundant stall when opening interface * Header - Replace custom ALIGN macros with ones from MdePkg/Include/Base.h - Sorting - Remove unused - Refactorize inline helpers - Additional comments v2 -> v3 * Library - fully adjust to EDK2 coding style: - fix indentation, more efficient line breaking, blank line before comments, etc. - add spaces before '(' - align indentation and cleanup Mvpp2LibHw.h - adjust function declaration/definition to multiline format - set all functions' fields and local variables to begin with capital letters - unify same arguments to be used with consistent naming among functions - add comments for parser magic values (mostly TCAM/SRAM byte count here and there) - use local variables in order to simplify Mvpp2PrsSramOffsetSet() * Driver - set all functions' fields and local variables to begin with capital letters v1->v2 * Separate HW part of library header - Mvpp2LibHw.h - contains all HW-related defines and structures' definitions - Mvpp2Lib.h - library function prototypes and inline functions - Pp2Dxe.h - OS glue, macros, structures, driver constants * Remove all Marvell-specific typedefs - MV_U8, MV_32 and so on * Adjust code to UEFI coding style - Use typedefs for structures - Replace tabs with spaces - Replace "static" prefixes with "STATIC" - Change under_score style to CamelCase - Adjust namings accordingly - Commits currently passed PatchCheck test * Improvements/fixes - Remove Linux-related leftovers in Pp2Dxe.h - Change library headers to BSD - only - Remove duplicated AXI configuration - Enable setting MAC address with PCD's - Implement Snp->StationAddress callback for resetting/updating MAC address Bartosz Szczepanek (2): Drivers/Net: Create Pp2Dxe driver Platforms/Marvell: Enable Pp2Dxe driver on Armada70x0 platform Leif Lindholm (1): Platforms/Marvell: Fixup VOID* PCD declarations Documentation/Marvell/PortingGuide/Pp2.txt | 59 + Drivers/Net/Pp2Dxe/Mvpp2Lib.c | 4841 ++++++++++++++++++++++++++++ Drivers/Net/Pp2Dxe/Mvpp2Lib.h | 726 +++++ Drivers/Net/Pp2Dxe/Mvpp2LibHw.h | 1968 +++++++++++ Drivers/Net/Pp2Dxe/Pp2Dxe.c | 1271 ++++++++ Drivers/Net/Pp2Dxe/Pp2Dxe.h | 615 ++++ Drivers/Net/Pp2Dxe/Pp2Dxe.inf | 91 + Platforms/Marvell/Armada/Armada.dsc.inc | 1 + Platforms/Marvell/Armada/Armada70x0.dsc | 18 +- Platforms/Marvell/Armada/Armada70x0.fdf | 1 + Platforms/Marvell/Marvell.dec | 134 +- 11 files changed, 9665 insertions(+), 60 deletions(-) create mode 100644 Documentation/Marvell/PortingGuide/Pp2.txt create mode 100644 Drivers/Net/Pp2Dxe/Mvpp2Lib.c create mode 100644 Drivers/Net/Pp2Dxe/Mvpp2Lib.h create mode 100644 Drivers/Net/Pp2Dxe/Mvpp2LibHw.h create mode 100644 Drivers/Net/Pp2Dxe/Pp2Dxe.c create mode 100644 Drivers/Net/Pp2Dxe/Pp2Dxe.h create mode 100644 Drivers/Net/Pp2Dxe/Pp2Dxe.inf -- 1.8.3.1

8 years, 1 month

[PATCH] Platforms/ARM/Juno: switch to generic BDS

by Ard Biesheuvel

Replace the Intel BDS with the generic BDS. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel(a)linaro.org> --- Platforms/ARM/Juno/ArmJuno.dsc | 10 +++++++--- Platforms/ARM/Juno/ArmJuno.fdf | 3 ++- 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/Platforms/ARM/Juno/ArmJuno.dsc b/Platforms/ARM/Juno/ArmJuno.dsc index d5f06c2b4211..f9824f0f837e 100644 --- a/Platforms/ARM/Juno/ArmJuno.dsc +++ b/Platforms/ARM/Juno/ArmJuno.dsc @@ -45,8 +45,6 @@ TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf - GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf - PlatformBdsLib|ArmPlatformPkg/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf # USB Requirements @@ -335,7 +333,13 @@ MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf - IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf + MdeModulePkg/Universal/BdsDxe/BdsDxe.inf + MdeModulePkg/Application/UiApp/UiApp.inf { + <LibraryClasses> + NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf + NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf + NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf + } # # EBC diff --git a/Platforms/ARM/Juno/ArmJuno.fdf b/Platforms/ARM/Juno/ArmJuno.fdf index 9e41ce87cbc2..f760c128744b 100644 --- a/Platforms/ARM/Juno/ArmJuno.fdf +++ b/Platforms/ARM/Juno/ArmJuno.fdf @@ -214,7 +214,8 @@ FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092 INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf - INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf + INF MdeModulePkg/Application/UiApp/UiApp.inf # # FDT installation -- 2.7.4

8 years, 1 month

[RESEND PATCH 1/1] ArmPlatformPkg/ArmTrustZone: Add support for specifying Subregions to be disabled

by Bhupesh Sharma

ARM TZASC-380 IP provides a mechanism to split memory regions being protected via it into eight equal-sized sub-regions, with a bit setting allowing the corresponding subregion to be disabled. Several NXP/FSL SoCs support the TZASC-380 IP block and allow the DDR connected via the TZASC to be partitioned into regions having different security settings. This patch enables this support and can be used for SoCs which support such partition of DDR regions. Details of the 'subregion_disable' register can be viewed here: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0431c/CJABCF… Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Bhupesh Sharma <bhupesh.sharma(a)nxp.com> Cc: Ard Biesheuvel <ard.biesheuvel(a)linaro.org> --- .../Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c | 21 ++++++++++++++------- ArmPlatformPkg/Drivers/ArmTrustZone/ArmTrustZone.c | 5 +++-- ArmPlatformPkg/Include/Drivers/ArmTrustzone.h | 3 ++- 3 files changed, 19 insertions(+), 10 deletions(-) diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c index 6fa0774..d358d65 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Sec.c @@ -72,18 +72,21 @@ ArmPlatformSecTrustzoneInit ( // NOR Flash 0 non secure (BootMon) TZASCSetRegion(ARM_VE_TZASC_BASE,1,TZASC_REGION_ENABLED, ARM_VE_SMB_NOR0_BASE,0, - TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW); + TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW, + 0); // NOR Flash 1. The first half of the NOR Flash1 must be secure for the secure firmware (sec_uefi.bin) if (PcdGetBool (PcdTrustzoneSupport) == TRUE) { //Note: Your OS Kernel must be aware of the secure regions before to enable this region TZASCSetRegion(ARM_VE_TZASC_BASE,2,TZASC_REGION_ENABLED, ARM_VE_SMB_NOR1_BASE + SIZE_32MB,0, - TZASC_REGION_SIZE_32MB, TZASC_REGION_SECURITY_NSRW); + TZASC_REGION_SIZE_32MB, TZASC_REGION_SECURITY_NSRW, + 0); } else { TZASCSetRegion(ARM_VE_TZASC_BASE,2,TZASC_REGION_ENABLED, ARM_VE_SMB_NOR1_BASE,0, - TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW); + TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW, + 0); } // Base of SRAM. Only half of SRAM in Non Secure world @@ -92,22 +95,26 @@ ArmPlatformSecTrustzoneInit ( //Note: Your OS Kernel must be aware of the secure regions before to enable this region TZASCSetRegion(ARM_VE_TZASC_BASE,3,TZASC_REGION_ENABLED, ARM_VE_SMB_SRAM_BASE,0, - TZASC_REGION_SIZE_16MB, TZASC_REGION_SECURITY_NSRW); + TZASC_REGION_SIZE_16MB, TZASC_REGION_SECURITY_NSRW, + 0); } else { TZASCSetRegion(ARM_VE_TZASC_BASE,3,TZASC_REGION_ENABLED, ARM_VE_SMB_SRAM_BASE,0, - TZASC_REGION_SIZE_32MB, TZASC_REGION_SECURITY_NSRW); + TZASC_REGION_SIZE_32MB, TZASC_REGION_SECURITY_NSRW, + 0); } // Memory Mapped Peripherals. All in non secure world TZASCSetRegion(ARM_VE_TZASC_BASE,4,TZASC_REGION_ENABLED, ARM_VE_SMB_PERIPH_BASE,0, - TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW); + TZASC_REGION_SIZE_64MB, TZASC_REGION_SECURITY_NSRW, + 0); // MotherBoard Peripherals and On-chip peripherals. TZASCSetRegion(ARM_VE_TZASC_BASE,5,TZASC_REGION_ENABLED, ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE,0, - TZASC_REGION_SIZE_256MB, TZASC_REGION_SECURITY_NSRW); + TZASC_REGION_SIZE_256MB, TZASC_REGION_SECURITY_NSRW, + 0); } /** diff --git a/ArmPlatformPkg/Drivers/ArmTrustZone/ArmTrustZone.c b/ArmPlatformPkg/Drivers/ArmTrustZone/ArmTrustZone.c index 070c0dc..5cd41ef 100644 --- a/ArmPlatformPkg/Drivers/ArmTrustZone/ArmTrustZone.c +++ b/ArmPlatformPkg/Drivers/ArmTrustZone/ArmTrustZone.c @@ -87,7 +87,8 @@ TZASCSetRegion ( IN UINTN LowAddress, IN UINTN HighAddress, IN UINTN Size, - IN UINTN Security + IN UINTN Security, + IN UINTN SubregionDisableMask ) { UINT32* Region; @@ -100,7 +101,7 @@ TZASCSetRegion ( MmioWrite32((UINTN)(Region), LowAddress&0xFFFF8000); MmioWrite32((UINTN)(Region+1), HighAddress); - MmioWrite32((UINTN)(Region+2), ((Security & 0xF) <<28) | ((Size & 0x3F) << 1) | (Enabled & 0x1)); + MmioWrite32((UINTN)(Region+2), ((Security & 0xF) <<28) | ((SubregionDisableMask & 0xFF) << 8) | ((Size & 0x3F) << 1) | (Enabled & 0x1)); return EFI_SUCCESS; } diff --git a/ArmPlatformPkg/Include/Drivers/ArmTrustzone.h b/ArmPlatformPkg/Include/Drivers/ArmTrustzone.h index 78e98aa..1ba963d 100644 --- a/ArmPlatformPkg/Include/Drivers/ArmTrustzone.h +++ b/ArmPlatformPkg/Include/Drivers/ArmTrustzone.h @@ -82,7 +82,8 @@ TZASCSetRegion ( IN UINTN LowAddress, IN UINTN HighAddress, IN UINTN Size, - IN UINTN Security + IN UINTN Security, + IN UINTN SubregionDisableMask ); #endif -- 1.9.1

8 years, 1 month

[PATCH 0/5] Platforms/ARM: get rid of ARM BDS

by Ard Biesheuvel

Remove any remaining references to the ARM BDS. For convenience, this also involves moving FVP an TC2 to the generic BDS. (Juno still uses the Intel BDS) Ard Biesheuvel (5): Platforms/ARM/VExpress: set terminal type to TTY Platforms/ARM/VExpress: make BdsLib dependencies explicit Platforms/ARM/VExpress: add generic BDS/UiApp dependencies Platforms/ARM/ArmVExpress-CTA15-A7: switch to generic BDS Platform/ARM/FVP: switch to generic BDS Platforms/ARM/Juno/ArmJuno.dsc | 5 ++- Platforms/ARM/VExpress/ArmVExpress-CTA15-A7.dsc | 13 +++++-- Platforms/ARM/VExpress/ArmVExpress-CTA15-A7.fdf | 3 +- Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc | 17 +++++---- Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.fdf | 7 ++-- Platforms/ARM/VExpress/ArmVExpress.dsc.inc | 36 ++++++++++++++------ 6 files changed, 55 insertions(+), 26 deletions(-) -- 2.7.4

8 years, 2 months

[PATCH v3 0/3] Armada 7040 network support

by Marcin Wojtas

Hi, It turned out that there was no quick method to do all the cleanups, but after 14 straight hours I resend network support with all your remarks about the library applied. I did much more than that - details can be found in the changelog. I hope it's much closer to be sufficient. The patches are also available in the public github tree: https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/opp… I'm looking forward to your comments. In the meantime I will finalize updating the driver (patches 2 and 3) after your review. Best regards, Marcin Changelog: v2 -> v3 * Library - fully adjust to EDK2 coding style: - fix indentation, more efficient line breaking, blank line before comments, etc. - add spaces before '(' - align indentation and cleanup Mvpp2LibHw.h - adjust function declaration/definition to multiline format - set all functions' fields and local variables to begin with capital letters - unify same arguments to be used with consistent naming among functions - add comments for parser magic values (mostly TCAM/SRAM byte count here and there) - use local variables in order to simplify Mvpp2PrsSramOffsetSet() * Driver - set all functions' fields and local variables to begin with capital letters v1->v2 * Separate HW part of library header - Mvpp2LibHw.h - contains all HW-related defines and structures' definitions - Mvpp2Lib.h - library function prototypes and inline functions - Pp2Dxe.h - OS glue, macros, structures, driver constants * Remove all Marvell-specific typedefs - MV_U8, MV_32 and so on * Adjust code to UEFI coding style - Use typedefs for structures - Replace tabs with spaces - Replace "static" prefixes with "STATIC" - Change under_score style to CamelCase - Adjust namings accordingly - Commits currently passed PatchCheck test * Improvements/fixes - Remove Linux-related leftovers in Pp2Dxe.h - Change library headers to BSD - only - Remove duplicated AXI configuration - Enable setting MAC address with PCD's - Implement Snp->StationAddress callback for resetting/updating MAC address Bartosz Szczepanek (3): Drivers/Net: Import Mvpp2Lib for Pp2Dxe driver Drivers/Net: Create Pp2Dxe driver Platforms/Marvell: Enable Pp2Dxe driver on Armada70x0 platform Documentation/Marvell/PortingGuide/Pp2.txt | 70 + Drivers/Net/Pp2Dxe/Mvpp2Lib.c | 4945 ++++++++++++++++++++++++++++ Drivers/Net/Pp2Dxe/Mvpp2Lib.h | 741 +++++ Drivers/Net/Pp2Dxe/Mvpp2LibHw.h | 1987 +++++++++++ Drivers/Net/Pp2Dxe/Pp2Dxe.c | 1280 +++++++ Drivers/Net/Pp2Dxe/Pp2Dxe.h | 455 +++ Drivers/Net/Pp2Dxe/Pp2Dxe.inf | 94 + Platforms/Marvell/Armada/Armada.dsc.inc | 1 + Platforms/Marvell/Armada/Armada70x0.dsc | 21 +- Platforms/Marvell/Armada/Armada70x0.fdf | 1 + Platforms/Marvell/Marvell.dec | 19 + 11 files changed, 9613 insertions(+), 1 deletion(-) create mode 100644 Documentation/Marvell/PortingGuide/Pp2.txt create mode 100644 Drivers/Net/Pp2Dxe/Mvpp2Lib.c create mode 100644 Drivers/Net/Pp2Dxe/Mvpp2Lib.h create mode 100644 Drivers/Net/Pp2Dxe/Mvpp2LibHw.h create mode 100644 Drivers/Net/Pp2Dxe/Pp2Dxe.c create mode 100644 Drivers/Net/Pp2Dxe/Pp2Dxe.h create mode 100644 Drivers/Net/Pp2Dxe/Pp2Dxe.inf -- 1.8.3.1

8 years, 2 months

[PATCH 1/3] Platforms/ARM/Juno: Fix IO window translate offset in PCIe root complex

by Sudeep Holla

XPress-RICH3 PCIe driver initialises the root complex with the same source and target address for IO window which makes translate offset 0. This patch fixes the translate offset for the IO window in Juno PCIe root complex ACPI table. Contributed-under: TianoCore Contribution Agreement 1.0 Cc: Ard Biesheuvel <ard.biesheuvel(a)linaro.org> Cc: Leif Lindholm <leif.lindholm(a)linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla(a)arm.com> --- Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl b/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl index 800d2cb3b2fb..ab5041db731a 100644 --- a/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl +++ b/Platforms/ARM/Juno/AcpiTables/AcpiSsdtRootPci.asl @@ -109,7 +109,7 @@ DefinitionBlock("SsdtPci.aml", "SSDT", 1, "ARMLTD", "ARM-JUNO", EFI_ACPI_ARM_OEM 0x00000000, // Granularity 0x5f800000, // Min Base Address 0x5fffffff, // Max Base Address - 0x5f800000, // Translate + 0x00000000, // Translate 0x00800000 // Length ) }) // Name(RBUF) -- 1.9.1

8 years, 2 months

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