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811 discussions

[PATCH] OpenPlatformPkg/Platforms/ARM/Juno: Enable MarvellYukon driver

by Daniil Egranov

Include Marvell Yukon driver. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Daniil Egranov <daniil.egranov(a)arm.com> --- Platforms/ARM/Juno/ArmJuno.dsc | 1 + Platforms/ARM/Juno/ArmJuno.fdf | 1 + 2 files changed, 2 insertions(+) diff --git a/Platforms/ARM/Juno/ArmJuno.dsc b/Platforms/ARM/Juno/ArmJuno.dsc index 751225a..0a02308 100644 --- a/Platforms/ARM/Juno/ArmJuno.dsc +++ b/Platforms/ARM/Juno/ArmJuno.dsc @@ -294,6 +294,7 @@ # Networking stack # EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118Dxe.inf + OpenPlatformPkg/Drivers/Net/MarvellYukonDxe/MarvellYukonDxe.inf # # Usb Support diff --git a/Platforms/ARM/Juno/ArmJuno.fdf b/Platforms/ARM/Juno/ArmJuno.fdf index 04d9a3c..2569234 100644 --- a/Platforms/ARM/Juno/ArmJuno.fdf +++ b/Platforms/ARM/Juno/ArmJuno.fdf @@ -188,6 +188,7 @@ FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092 INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf INF EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118Dxe.inf + INF OpenPlatformPkg/Drivers/Net/MarvellYukonDxe/MarvellYukonDxe.inf # # UEFI applications -- 2.7.4

8 years, 2 months

[PATCH 0/3] ArmPkg: add support for configuring interrupt types

by Ard Biesheuvel

This is just a bunch of boilerplate code that extends the protocol HardwareInterrupt to HardwareInterrupt2, and adds some hooks that allow protocol clients to configure the interrupt type. Patch #1 and patch #3 are complete afaict. Patch #2 needs to actual GIC manipulation code to be inserted, but I am sure someone else will be able to do this much more quickly. Ard Biesheuvel (3): EmbeddedPkg: introduce HardwareInterrupt2 protocol ArmPkg/ArmGicDxe: expose HardwareInterrupt2 protocol ArmPkg/GenericWatchdogDxe: use HardwareInterrupt2 protocol to set interrupt type ArmPkg/Drivers/ArmGic/ArmGicCommonDxe.c | 4 +- ArmPkg/Drivers/ArmGic/ArmGicDxe.h | 2 + ArmPkg/Drivers/ArmGic/ArmGicDxe.inf | 1 + ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c | 37 +++- ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c | 37 +++- ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c | 26 +-- ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf | 4 +- EmbeddedPkg/EmbeddedPkg.dec | 1 + EmbeddedPkg/Include/Protocol/HardwareInterrupt2.h | 181 ++++++++++++++++++++ 9 files changed, 278 insertions(+), 15 deletions(-) create mode 100644 EmbeddedPkg/Include/Protocol/HardwareInterrupt2.h -- 2.7.4

8 years, 2 months

[PATCH 0/5] Armada 7040 UTMI, Reset and I2c fix

by Marcin Wojtas

Hi, Because network rework has not been going smoothely, let's remove it from the platform upstream hotpath. It's being finalized in background and will be sent later, once ready. Hereby I present small patchset with three items - introduce USB2.0 PHY support (so called UTMI), reset driver and small I2c fix for devices' enumeration. The patches are also available in the public github tree: https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/opp… Any comments or remarks would be welcome. Best regards, Marcin Bartosz Szczepanek (2): Platforms/Marvell: Add MvResetSystem driver Platforms/Marvell: Enable MvResetSystem driver for A70x0 platform Jan Dąbroś (3): Drivers/I2c: Fix enumaration of I2c devices Platforms/Marvell: Add UtmiPhyLib Platforms/Marvell: Enable UtmiPhyLib for Armada70x0 Platforms Documentation/Marvell/PortingGuide/Reset.txt | 7 + Documentation/Marvell/PortingGuide/Utmi.txt | 35 ++ Drivers/I2c/MvI2cDxe/MvI2cDxe.c | 13 +- Drivers/ResetSystem/MvResetSystem.c | 158 +++++++++ Drivers/ResetSystem/MvResetSystem.inf | 65 ++++ Platforms/Marvell/Armada/Armada.dsc.inc | 4 +- Platforms/Marvell/Armada/Armada70x0.dsc | 11 + Platforms/Marvell/Armada/Armada70x0.fdf | 2 +- .../Armada/Library/Armada70x0Lib/Armada70x0Lib.c | 2 + .../Armada/Library/Armada70x0Lib/Armada70x0Lib.inf | 1 + Platforms/Marvell/Include/Library/UtmiPhyLib.h | 43 +++ Platforms/Marvell/Library/UtmiPhyLib/UtmiPhyLib.c | 352 +++++++++++++++++++++ Platforms/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h | 110 +++++++ .../Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf | 64 ++++ Platforms/Marvell/Marvell.dec | 11 + 15 files changed, 869 insertions(+), 9 deletions(-) create mode 100644 Documentation/Marvell/PortingGuide/Reset.txt create mode 100644 Documentation/Marvell/PortingGuide/Utmi.txt create mode 100644 Drivers/ResetSystem/MvResetSystem.c create mode 100644 Drivers/ResetSystem/MvResetSystem.inf create mode 100644 Platforms/Marvell/Include/Library/UtmiPhyLib.h create mode 100644 Platforms/Marvell/Library/UtmiPhyLib/UtmiPhyLib.c create mode 100644 Platforms/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h create mode 100644 Platforms/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf -- 1.8.3.1

8 years, 2 months

[PATCH] OpenPlatformPkg/Platforms/ARM/Juno: Add EBC support

by Daniil Egranov

Enable EBC on Juno. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Daniil Egranov <daniil.egranov(a)arm.com> --- Platforms/ARM/Juno/ArmJuno.dsc | 5 +++++ Platforms/ARM/Juno/ArmJuno.fdf | 5 +++++ 2 files changed, 10 insertions(+) diff --git a/Platforms/ARM/Juno/ArmJuno.dsc b/Platforms/ARM/Juno/ArmJuno.dsc index 751225a..705fb4b 100644 --- a/Platforms/ARM/Juno/ArmJuno.dsc +++ b/Platforms/ARM/Juno/ArmJuno.dsc @@ -329,3 +329,8 @@ MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf + + # + # EBC + # + MdeModulePkg/Universal/EbcDxe/EbcDxe.inf diff --git a/Platforms/ARM/Juno/ArmJuno.fdf b/Platforms/ARM/Juno/ArmJuno.fdf index 04d9a3c..81ebc5b 100644 --- a/Platforms/ARM/Juno/ArmJuno.fdf +++ b/Platforms/ARM/Juno/ArmJuno.fdf @@ -222,6 +222,11 @@ FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092 # after the device drivers (eg: Ethernet) to ensure we have support for them. INF EmbeddedPkg/Drivers/FdtPlatformDxe/FdtPlatformDxe.inf + # + # EBC + # + INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf + [FV.FVMAIN_COMPACT] FvAlignment = 8 ERASE_POLARITY = 1 -- 2.7.4

8 years, 2 months

[PATCH v2 0/2] Marvell Yukon driver fixes

by Daniil Egranov

ChangeLog: v1 Corrected Ethernet frame size to 1538. Performance optimization. Removed extra CopyMem() call. v2 Split the patch. Adjust the Ethernet frame size to 1566 to cover the IPv6 case. EBC performance optimization: a. Removed unnecessary SetMem(). b. Replaced CopyMem() with direct copy of structure members. Daniil Egranov (2): OpenPlatformPkg/Drivers/Net/MarvellYukonDxe: Correct Ethernet frame buffer size OpenPlatformPkg/Drivers/Net/MarvellYukonDxe: Performance optimization for EBC Drivers/Net/MarvellYukonDxe/if_msk.c | 5 +++-- Drivers/Net/MarvellYukonDxe/if_msk.h | 2 +- 2 files changed, 4 insertions(+), 3 deletions(-) -- 2.7.4

8 years, 2 months

[RFC/RFT PATCH] Drivers/Net/MarvellYukonDxe: remove redundant copy on RX path

by Ard Biesheuvel

The RX path in MarvellYukonDxe uses DMA buffers allocated via EFI_PCI_IO_PROTOCOL::AllocateBuffer(), and copies the contents of each into a temporary buffer, whose contents are copied yet another time before arriving at the caller of EFI_SIMPLE_NETWORK_PROTOCOL::Receive() This is inefficient for several reasons: - the streaming bus master DMA operations used for RX do not require the use of buffers allocated via EFI_PCI_IO_PROTOCOL::AllocateBuffer(), which may return uncached memory on platforms with non-coherent DMA - EFI_PCI_IO_PROTOCOL::AllocateBuffer() performs page based allocations, which means the UEFI memory map is modified for every packet received, now that the improper reuse of DMA buffers has been fixed. So drop the call to EFI_PCI_IO_PROTOCOL::AllocateBuffer(), and instead, perform a pool allocation whose ownership is transferred from the RX ring to the RX linked list, which removes the need for a copy. Also, since pool allocations decay to page based allocations for sizes that equal or exceed EFI_PAGE_SIZE, reduce MAX_SUPPORTED_PACKET_SIZE to the Ethernet default of 1500 bytes. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel(a)linaro.org> --- It builds, but does it run? I have no clue, since I don't own a Juno or a Softiron 1000. Comments and testing appreciated. Thanks. Drivers/Net/MarvellYukonDxe/if_msk.c | 26 ++++++-------------- Drivers/Net/MarvellYukonDxe/if_msk.h | 2 +- 2 files changed, 9 insertions(+), 19 deletions(-) diff --git a/Drivers/Net/MarvellYukonDxe/if_msk.c b/Drivers/Net/MarvellYukonDxe/if_msk.c index ecd716a66b55..d49c8e92a69a 100644 --- a/Drivers/Net/MarvellYukonDxe/if_msk.c +++ b/Drivers/Net/MarvellYukonDxe/if_msk.c @@ -595,7 +595,7 @@ msk_newbuf ( rxd = &sc_if->msk_cdata.msk_rxdesc[idx]; - Status = mPciIo->AllocateBuffer (mPciIo, AllocateAnyPages, EfiBootServicesData, EFI_SIZE_TO_PAGES (Length), &Buffer, 0); + Status = gBS->AllocatePool (EfiBootServicesData, Length, &Buffer); if (EFI_ERROR (Status)) { return Status; } @@ -603,8 +603,7 @@ msk_newbuf ( Status = mPciIo->Map (mPciIo, EfiPciIoOperationBusMasterWrite, Buffer, &Length, &PhysAddr, &Mapping); if (EFI_ERROR (Status)) { - Length = MAX_SUPPORTED_PACKET_SIZE; - mPciIo->FreeBuffer (mPciIo, EFI_SIZE_TO_PAGES (Length), Buffer); + gBS->FreePool (Buffer); return Status; } @@ -1630,7 +1629,7 @@ msk_txrx_dma_free ( mPciIo->Unmap (mPciIo, rxd->rx_m.DmaMapping); // Free Rx buffers as we own these if(rxd->rx_m.Buf != NULL) { - mPciIo->FreeBuffer (mPciIo, EFI_SIZE_TO_PAGES (rxd->rx_m.Length), rxd->rx_m.Buf); + gBS->FreePool (rxd->rx_m.Buf); rxd->rx_m.Buf = NULL; } gBS->SetMem (&(rxd->rx_m), sizeof (MSK_DMA_BUF), 0); @@ -1933,23 +1932,14 @@ msk_rxeof ( if (!EFI_ERROR (Status)) { gBS->SetMem (m_link, sizeof (MSK_LINKED_SYSTEM_BUF), 0); m_link->Signature = RX_MBUF_SIGNATURE; - Status = gBS->AllocatePool (EfiBootServicesData, - len, - (VOID**) &m_link->SystemBuf.Buf); - if(!EFI_ERROR (Status)) { - gBS->CopyMem (m_link->SystemBuf.Buf, m.Buf, len); - m_link->SystemBuf.Length = len; - - InsertTailList (&mSoftc->ReceiveQueueHead, &m_link->Link); - } else { - DEBUG ((EFI_D_NET, "Marvell Yukon: failed to allocate DMA buffer. Dropping Frame\n")); - gBS->FreePool (m_link); - } + m_link->SystemBuf.Buf = m.Buf; + m_link->SystemBuf.Length = len; + + InsertTailList (&mSoftc->ReceiveQueueHead, &m_link->Link); } else { DEBUG ((EFI_D_NET, "Marvell Yukon: failed to allocate receive buffer link. Dropping Frame\n")); + gBS->FreePool (m.Buf); } - - mPciIo->FreeBuffer (mPciIo, EFI_SIZE_TO_PAGES (m.Length), m.Buf); } while (0); MSK_RX_INC (sc_if->msk_cdata.msk_rx_cons, MSK_RX_RING_CNT); diff --git a/Drivers/Net/MarvellYukonDxe/if_msk.h b/Drivers/Net/MarvellYukonDxe/if_msk.h index a5025a39ecf3..66513d3c54c1 100644 --- a/Drivers/Net/MarvellYukonDxe/if_msk.h +++ b/Drivers/Net/MarvellYukonDxe/if_msk.h @@ -15,7 +15,7 @@ #include <Uefi.h> -#define MAX_SUPPORTED_PACKET_SIZE EFI_PAGE_SIZE +#define MAX_SUPPORTED_PACKET_SIZE (1500) EFI_STATUS mskc_probe (EFI_PCI_IO_PROTOCOL *PciIo); -- 2.7.4

8 years, 3 months

[PATCH v2 1/2] Platforms/AMD/Styx: correct PCIe bus and I/O ranges in DSDT

by Ard Biesheuvel

Change the PCIe bus range in the DSDT from [0x0 .. 0xf] to [0x00 .. 0x7f], which aligns it with the DT descripton. Also fix the I/O window: its range should be listed without taking the translation into account. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel(a)linaro.org> Acked-by: Graeme Gregory <graeme.gregory(a)linaro.org> --- v2: add TypeTranslation property as well, as per the ACPI spec Platforms/AMD/Styx/AcpiTables/Dsdt.asl | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/Platforms/AMD/Styx/AcpiTables/Dsdt.asl b/Platforms/AMD/Styx/AcpiTables/Dsdt.asl index 1f0a96fb83ee..554cb8738529 100644 --- a/Platforms/AMD/Styx/AcpiTables/Dsdt.asl +++ b/Platforms/AMD/Styx/AcpiTables/Dsdt.asl @@ -554,9 +554,9 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "AMDINC", "SEATTLE ", 3) WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum - 0x000F, // Range Maximum + 0x007F, // Range Maximum 0x0000, // Translation Offset - 0x0010, // Length + 0x0080, // Length ) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, 0x00000000, // Granularity @@ -637,10 +637,14 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "AMDINC", "SEATTLE ", 3) ) DWordIo (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x00000000, // Granularity - 0xEFFF0000, // Range Minimum - 0xEFFFFFFF, // Range Maximum + 0x00000000, // Range Minimum + 0x0000FFFF, // Range Maximum 0xEFFF0000, // Translation Address - 0x00010000 // Length + 0x00010000, // Length + , + , + , + TypeTranslation ) }) Return (RBUF) /* \_SB_.PCI0._CRS.RBUF */ -- 2.7.4

8 years, 3 months

[PATCH 1/2] Platforms/AMD/Styx: correct PCIe bus and I/O ranges in DSDT

by Ard Biesheuvel

Change the PCIe bus range in the DSDT from [0x0 .. 0xf] to [0x00 .. 0x7f], which aligns it with the DT descripton. Also fix the I/O window: its range should be listed without taking the translation into account. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel(a)linaro.org> --- Platforms/AMD/Styx/AcpiTables/Dsdt.asl | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/Platforms/AMD/Styx/AcpiTables/Dsdt.asl b/Platforms/AMD/Styx/AcpiTables/Dsdt.asl index 1f0a96fb83ee..7190decbec6d 100644 --- a/Platforms/AMD/Styx/AcpiTables/Dsdt.asl +++ b/Platforms/AMD/Styx/AcpiTables/Dsdt.asl @@ -554,9 +554,9 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "AMDINC", "SEATTLE ", 3) WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum - 0x000F, // Range Maximum + 0x007F, // Range Maximum 0x0000, // Translation Offset - 0x0010, // Length + 0x0080, // Length ) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, 0x00000000, // Granularity @@ -637,8 +637,8 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "AMDINC", "SEATTLE ", 3) ) DWordIo (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x00000000, // Granularity - 0xEFFF0000, // Range Minimum - 0xEFFFFFFF, // Range Maximum + 0x00000000, // Range Minimum + 0x0000FFFF, // Range Maximum 0xEFFF0000, // Translation Address 0x00010000 // Length ) -- 2.7.4

8 years, 3 months

[PATCH v2 0/2] Cello: add firmware uploader for Renesas PD720202

by Ard Biesheuvel

This is v2 of the Celloboard driver to upload the Renesas PD720202 XHCI firmware at boot, so that both the UEFI firmware and the OS can use the device without having to care about this firmware. Now tested using a PD720201 with an external ROM, which contains the same firmware. This involved ignoring the 'has external ROM' check temporarily, allowing the builtin firmware image to be overridden with by the image from this driver. Ard Biesheuvel (2): Drivers/Xhci: implement firmware download driver for Renesas PD72020x Platforms/AMD/CelloBoard: add Renesas PD72020x firmware uploader Drivers/Xhci/RenesasFirmwarePD720202/RenesasFirmwarePD720202.c | 386 ++++++++++++++++++++ Drivers/Xhci/RenesasFirmwarePD720202/RenesasFirmwarePD720202.inf | 43 +++ OpenPlatformPkg.dec | 3 + Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 4 + Platforms/AMD/Styx/CelloBoard/CelloBoard.fdf | 10 + 5 files changed, 446 insertions(+) create mode 100644 Drivers/Xhci/RenesasFirmwarePD720202/RenesasFirmwarePD720202.c create mode 100644 Drivers/Xhci/RenesasFirmwarePD720202/RenesasFirmwarePD720202.inf -- 2.7.4

8 years, 3 months

[uswg] Is BIS protocol something outdated?

by Heyi Guo

Hi experts, UEFI spec says BIS (Boot Integrity Services) protocol is used to authenticate image. However, it seems UEFI secure boot has already covered the same function even for PXE boot. Also I can't see any implementation of BIS in EDK2. So is BIS a little outdated and can be completely replaced by UEFI secure boot? Thanks and Regards, Heyi

8 years, 3 months

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