Linaro-uefi

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811 discussions

[PATCH 0/1] Add SPCR/DBG2 tables for kernel testing/debug

by Graeme Gregory

These patches add the DBG2/SPCR tables for FVP/Juno for kernel testing. They allow a kernel to find a serial console without console= line. They have been tested using the Redhat patches for SPCR support which are work in progress! Thanks Graeme

10 years, 1 month

Re: [Linaro-uefi] "aarch64-none-elf-ar" has command line string size limit??

by Jianning Wang

Hi Guys, Thank you so much for your help. Now the problem is fixed. I followed Paul's suggestion and change the following line in the $UDK2014/Conf/build_rule.txt from <Command.ARMGCC> # $(OBJECT_FILES_LIST) has wrong paths for cygwin "$(SLINK)" $(SLINK_FLAGS) ${dst} $(OBJECT_FILES) to <Command.ARMGCC> # $(OBJECT_FILES_LIST) has wrong paths for cygwin "$(SLINK)" $(SLINK_FLAGS) ${dst} @$(OBJECT_FILES_LIST) Then the problem is gone. Thanks again Best, Jianning On Wed, Feb 18, 2015 at 6:38 AM, Olivier Martin <olivier.martin(a)arm.com> wrote: > I had the same issue a couple years ago. > > I found WinXP has a limitation of 8191 characters ( > http://support.microsoft.com/kb/830473). > > But the unix-like environment I was using (mingw) was limiting the command > line at 750 characters. > > > > I also tried Paul’s suggestion at that time but arm-linux-gnueabihf-ar.exe > was not accepting the syntax ‘@<object_files_list>’. > > It looks it has been fixed. > > > > *From:* linaro-uefi-bounces(a)lists.linaro.org [mailto: > linaro-uefi-bounces(a)lists.linaro.org] *On Behalf Of *Jianning Wang > *Sent:* 17 February 2015 21:39 > *To:* linaro-uefi(a)lists.linaro.org > *Cc:* Daniel Samuelraj > *Subject:* [Linaro-uefi] "aarch64-none-elf-ar" has command line string > size limit?? > > > > Hi, > > > > I am working on compile a UEFI project for AARCH64 platform on a Windows 7 > machince using the following toolchain. > > > > > http://releases.linaro.org/14.09/components/toolchain/binaries/gcc-linaro-a… > > > > Now everything compiles except the last step of using > "aarch64-none-elf-ar". We have about 100 obj files (say from OBJ#001 to > OBJ#100) and "aarch64-none-elf-ar" reported "OBJ#50 file is missing". > > > > It seems to me that "aarch64-none-elf-ar" has a limit of the command line > string size.I tried to shorten the directory name (and file name), the > situation got improved a little bit, now "aarch64-none-elf-ar" reports > ""OBJ#85 is missing". > > > > Does anyone is there a such limit and how could we circumvent this problem? > > > > Thanks > > Jianning >

10 years, 2 months

"aarch64-none-elf-ar" has command line string size limit??

by Jianning Wang

Hi, I am working on compile a UEFI project for AARCH64 platform on a Windows 7 machince using the following toolchain. http://releases.linaro.org/14.09/components/toolchain/binaries/gcc-linaro-a… Now everything compiles except the last step of using "aarch64-none-elf-ar". We have about 100 obj files (say from OBJ#001 to OBJ#100) and "aarch64-none-elf-ar" reported "OBJ#50 file is missing". It seems to me that "aarch64-none-elf-ar" has a limit of the command line string size.I tried to shorten the directory name (and file name), the situation got improved a little bit, now "aarch64-none-elf-ar" reports ""OBJ#85 is missing". Does anyone is there a such limit and how could we circumvent this problem? Thanks Jianning

10 years, 2 months

[PATCH 1/2] MdePkg/BaseSynchronizationLib: Added proper support for ARM architecture

by Ard Biesheuvel

This implements the following synchronization primitives for AArch64 (GCC) and ARM (GCC & RVCT): InternalSyncCompareExchange32 InternalSyncCompareExchange64 InternalSyncIncrement InternalSyncDecrement Note: these functions are implemented using the exclusive monitor, which implies that they can only be used after the caches (and hence the MMU) have been enabled. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin(a)arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel(a)linaro.org> --- .../AArch64/Synchronization.S | 159 +++++++++++++++++++ .../AArch64/Synchronization.c | 115 -------------- .../BaseSynchronizationLib/Arm/Synchronization.S | 167 ++++++++++++++++++++ .../BaseSynchronizationLib/Arm/Synchronization.asm | 168 +++++++++++++++++++++ .../BaseSynchronizationLib/Arm/Synchronization.c | 115 -------------- .../BaseSynchronizationLib.inf | 5 +- 6 files changed, 497 insertions(+), 232 deletions(-) create mode 100644 MdePkg/Library/BaseSynchronizationLib/AArch64/Synchronization.S delete mode 100644 MdePkg/Library/BaseSynchronizationLib/AArch64/Synchronization.c create mode 100644 MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.S create mode 100644 MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.asm delete mode 100644 MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.c mode change 100644 => 100755 MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf diff --git a/MdePkg/Library/BaseSynchronizationLib/AArch64/Synchronization.S b/MdePkg/Library/BaseSynchronizationLib/AArch64/Synchronization.S new file mode 100644 index 000000000000..601b00495f26 --- /dev/null +++ b/MdePkg/Library/BaseSynchronizationLib/AArch64/Synchronization.S @@ -0,0 +1,159 @@ +// Implementation of synchronization functions for ARM architecture (AArch64) +// +// Copyright (c) 2012-2015, ARM Limited. All rights reserved. +// Copyright (c) 2015, Linaro Limited. All rights reserved. +// +// This program and the accompanying materials +// are licensed and made available under the terms and conditions of the BSD License +// which accompanies this distribution. The full text of the license may be found at +// http://opensource.org/licenses/bsd-license.php +// +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +// +// + +.text +.align 3 + +GCC_ASM_EXPORT(InternalSyncCompareExchange32) +GCC_ASM_EXPORT(InternalSyncCompareExchange64) +GCC_ASM_EXPORT(InternalSyncIncrement) +GCC_ASM_EXPORT(InternalSyncDecrement) + +/** + Performs an atomic compare exchange operation on a 32-bit unsigned integer. + + Performs an atomic compare exchange operation on the 32-bit unsigned integer + specified by Value. If Value is equal to CompareValue, then Value is set to + ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue, + then Value is returned. The compare exchange operation must be performed using + MP safe mechanisms. + + @param Value A pointer to the 32-bit value for the compare exchange + operation. + @param CompareValue 32-bit value used in compare operation. + @param ExchangeValue 32-bit value used in exchange operation. + + @return The original *Value before exchange. + +**/ +//UINT32 +//EFIAPI +//InternalSyncCompareExchange32 ( +// IN volatile UINT32 *Value, +// IN UINT32 CompareValue, +// IN UINT32 ExchangeValue +// ) +ASM_PFX(InternalSyncCompareExchange32): + dmb sy + +InternalSyncCompareExchange32Again: + ldxr w3, [x0] + cmp w3, w1 + bne InternalSyncCompareExchange32Fail + +InternalSyncCompareExchange32Exchange: + stxr w4, w2, [x0] + cbnz w4, InternalSyncCompareExchange32Again + +InternalSyncCompareExchange32Fail: + dmb sy + mov w0, w3 + ret + +/** + Performs an atomic compare exchange operation on a 64-bit unsigned integer. + + Performs an atomic compare exchange operation on the 64-bit unsigned integer specified + by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and + CompareValue is returned. If Value is not equal to CompareValue, then Value is returned. + The compare exchange operation must be performed using MP safe mechanisms. + + @param Value A pointer to the 64-bit value for the compare exchange + operation. + @param CompareValue 64-bit value used in compare operation. + @param ExchangeValue 64-bit value used in exchange operation. + + @return The original *Value before exchange. + +**/ +//UINT64 +//EFIAPI +//InternalSyncCompareExchange64 ( +// IN volatile UINT64 *Value, +// IN UINT64 CompareValue, +// IN UINT64 ExchangeValue +// ) +ASM_PFX(InternalSyncCompareExchange64): + dmb sy + +InternalSyncCompareExchange64Again: + ldxr x3, [x0] + cmp x3, x1 + bne InternalSyncCompareExchange64Fail + +InternalSyncCompareExchange64Exchange: + stxr w4, x2, [x0] + cbnz w4, InternalSyncCompareExchange64Again + +InternalSyncCompareExchange64Fail: + dmb sy + mov x0, x3 + ret + +/** + Performs an atomic increment of an 32-bit unsigned integer. + + Performs an atomic increment of the 32-bit unsigned integer specified by + Value and returns the incremented value. The increment operation must be + performed using MP safe mechanisms. The state of the return value is not + guaranteed to be MP safe. + + @param Value A pointer to the 32-bit value to increment. + + @return The incremented value. + +**/ +//UINT32 +//EFIAPI +//InternalSyncIncrement ( +// IN volatile UINT32 *Value +// ) +ASM_PFX(InternalSyncIncrement): + dmb sy +TryInternalSyncIncrement: + ldxr w1, [x0] + add w1, w1, #1 + stxr w2, w1, [x0] + cbnz w2, TryInternalSyncIncrement + dmb sy + ret + +/** + Performs an atomic decrement of an 32-bit unsigned integer. + + Performs an atomic decrement of the 32-bit unsigned integer specified by + Value and returns the decrement value. The decrement operation must be + performed using MP safe mechanisms. The state of the return value is not + guaranteed to be MP safe. + + @param Value A pointer to the 32-bit value to decrement. + + @return The decrement value. + +**/ +//UINT32 +//EFIAPI +//InternalSyncDecrement ( +// IN volatile UINT32 *Value +// ) +ASM_PFX(InternalSyncDecrement): + dmb sy +TryInternalSyncDecrement: + ldxr w1, [x0] + sub w1, w1, #1 + stxr w2, w1, [x0] + cbnz w2, TryInternalSyncDecrement + dmb sy + ret diff --git a/MdePkg/Library/BaseSynchronizationLib/AArch64/Synchronization.c b/MdePkg/Library/BaseSynchronizationLib/AArch64/Synchronization.c deleted file mode 100644 index 2e619ccf873f..000000000000 --- a/MdePkg/Library/BaseSynchronizationLib/AArch64/Synchronization.c +++ /dev/null @@ -1,115 +0,0 @@ -/** @file - Implementation of synchronization functions. Still needs to be ported - - Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR> - Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php. - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -/** - Performs an atomic compare exchange operation on a 32-bit unsigned integer. - - Performs an atomic compare exchange operation on the 32-bit unsigned integer - specified by Value. If Value is equal to CompareValue, then Value is set to - ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue, - then Value is returned. The compare exchange operation must be performed using - MP safe mechanisms. - - @param Value A pointer to the 32-bit value for the compare exchange - operation. - @param CompareValue 32-bit value used in compare operation. - @param ExchangeValue 32-bit value used in exchange operation. - - @return The original *Value before exchange. - -**/ -UINT32 -EFIAPI -InternalSyncCompareExchange32 ( - IN volatile UINT32 *Value, - IN UINT32 CompareValue, - IN UINT32 ExchangeValue - ) -{ - return *Value != CompareValue ? *Value : - ((*Value = ExchangeValue), CompareValue); -} - -/** - Performs an atomic compare exchange operation on a 64-bit unsigned integer. - - Performs an atomic compare exchange operation on the 64-bit unsigned integer specified - by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and - CompareValue is returned. If Value is not equal to CompareValue, then Value is returned. - The compare exchange operation must be performed using MP safe mechanisms. - - @param Value A pointer to the 64-bit value for the compare exchange - operation. - @param CompareValue 64-bit value used in compare operation. - @param ExchangeValue 64-bit value used in exchange operation. - - @return The original *Value before exchange. - -**/ -UINT64 -EFIAPI -InternalSyncCompareExchange64 ( - IN volatile UINT64 *Value, - IN UINT64 CompareValue, - IN UINT64 ExchangeValue - ) -{ - return *Value != CompareValue ? *Value : - ((*Value = ExchangeValue), CompareValue); -} - -/** - Performs an atomic increment of an 32-bit unsigned integer. - - Performs an atomic increment of the 32-bit unsigned integer specified by - Value and returns the incremented value. The increment operation must be - performed using MP safe mechanisms. The state of the return value is not - guaranteed to be MP safe. - - @param Value A pointer to the 32-bit value to increment. - - @return The incremented value. - -**/ -UINT32 -EFIAPI -InternalSyncIncrement ( - IN volatile UINT32 *Value - ) -{ - return ++*Value; -} - -/** - Performs an atomic decrement of an 32-bit unsigned integer. - - Performs an atomic decrement of the 32-bit unsigned integer specified by - Value and returns the decrement value. The decrement operation must be - performed using MP safe mechanisms. The state of the return value is not - guaranteed to be MP safe. - - @param Value A pointer to the 32-bit value to decrement. - - @return The decrement value. - -**/ -UINT32 -EFIAPI -InternalSyncDecrement ( - IN volatile UINT32 *Value - ) -{ - return --*Value; -} diff --git a/MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.S b/MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.S new file mode 100644 index 000000000000..6a6a60466c8e --- /dev/null +++ b/MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.S @@ -0,0 +1,167 @@ +// Implementation of synchronization functions for ARM architecture +// +// Copyright (c) 2012-2015, ARM Limited. All rights reserved. +// +// This program and the accompanying materials +// are licensed and made available under the terms and conditions of the BSD License +// which accompanies this distribution. The full text of the license may be found at +// http://opensource.org/licenses/bsd-license.php +// +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +// +// + +.text +.align 3 + +GCC_ASM_EXPORT(InternalSyncCompareExchange32) +GCC_ASM_EXPORT(InternalSyncCompareExchange64) +GCC_ASM_EXPORT(InternalSyncIncrement) +GCC_ASM_EXPORT(InternalSyncDecrement) + +/** + Performs an atomic compare exchange operation on a 32-bit unsigned integer. + + Performs an atomic compare exchange operation on the 32-bit unsigned integer + specified by Value. If Value is equal to CompareValue, then Value is set to + ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue, + then Value is returned. The compare exchange operation must be performed using + MP safe mechanisms. + + @param Value A pointer to the 32-bit value for the compare exchange + operation. + @param CompareValue 32-bit value used in compare operation. + @param ExchangeValue 32-bit value used in exchange operation. + + @return The original *Value before exchange. + +**/ +//UINT32 +//EFIAPI +//InternalSyncCompareExchange32 ( +// IN volatile UINT32 *Value, +// IN UINT32 CompareValue, +// IN UINT32 ExchangeValue +// ) +ASM_PFX(InternalSyncCompareExchange32): + dmb + +InternalSyncCompareExchange32Again: + ldrex r3, [r0] + cmp r3, r1 + bne InternalSyncCompareExchange32Fail + +InternalSyncCompareExchange32Exchange: + strex ip, r2, [r0] + cmp ip, #0 + bne InternalSyncCompareExchange32Again + +InternalSyncCompareExchange32Fail: + dmb + mov r0, r3 + bx lr + +/** + Performs an atomic compare exchange operation on a 64-bit unsigned integer. + + Performs an atomic compare exchange operation on the 64-bit unsigned integer specified + by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and + CompareValue is returned. If Value is not equal to CompareValue, then Value is returned. + The compare exchange operation must be performed using MP safe mechanisms. + + @param Value A pointer to the 64-bit value for the compare exchange + operation. + @param CompareValue 64-bit value used in compare operation. + @param ExchangeValue 64-bit value used in exchange operation. + + @return The original *Value before exchange. + +**/ +//UINT64 +//EFIAPI +//InternalSyncCompareExchange64 ( +// IN volatile UINT64 *Value, // r0-r1 +// IN UINT64 CompareValue, // r2-r3 +// IN UINT64 ExchangeValue // r4-r5 +// ) +ASM_PFX(InternalSyncCompareExchange64): + push { r4-r7 } + ldrd r4, r5, [sp, #16] + dmb + +InternalSyncCompareExchange64Again: + ldrexd r6, r7, [r0] + cmp r6, r2 + cmpeq r7, r3 + bne InternalSyncCompareExchange64Fail + +InternalSyncCompareExchange64Exchange: + strexd ip, r4, r5, [r0] + cmp ip, #0 + bne InternalSyncCompareExchange64Again + +InternalSyncCompareExchange64Fail: + dmb + mov r0, r6 + mov r1, r7 + pop { r4-r7 } + bx lr + +/** + Performs an atomic increment of an 32-bit unsigned integer. + + Performs an atomic increment of the 32-bit unsigned integer specified by + Value and returns the incremented value. The increment operation must be + performed using MP safe mechanisms. The state of the return value is not + guaranteed to be MP safe. + + @param Value A pointer to the 32-bit value to increment. + + @return The incremented value. + +**/ +//UINT32 +//EFIAPI +//InternalSyncIncrement ( +// IN volatile UINT32 *Value +// ) +ASM_PFX(InternalSyncIncrement): + dmb +TryInternalSyncIncrement: + ldrex r1, [r0] + add r1, r1, #1 + strex r2, r1, [r0] + cmp r2, #0 + bne TryInternalSyncIncrement + dmb + bx lr + +/** + Performs an atomic decrement of an 32-bit unsigned integer. + + Performs an atomic decrement of the 32-bit unsigned integer specified by + Value and returns the decrement value. The decrement operation must be + performed using MP safe mechanisms. The state of the return value is not + guaranteed to be MP safe. + + @param Value A pointer to the 32-bit value to decrement. + + @return The decrement value. + +**/ +//UINT32 +//EFIAPI +//InternalSyncDecrement ( +// IN volatile UINT32 *Value +// ) +ASM_PFX(InternalSyncDecrement): + dmb +TryInternalSyncDecrement: + ldrex r1, [r0] + sub r1, r1, #1 + strex r2, r1, [r0] + cmp r2, #0 + bne TryInternalSyncDecrement + dmb + bx lr diff --git a/MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.asm b/MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.asm new file mode 100644 index 000000000000..df007b6301b3 --- /dev/null +++ b/MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.asm @@ -0,0 +1,168 @@ +// Implementation of synchronization functions for ARM architecture +// +// Copyright (c) 2012-2015, ARM Limited. All rights reserved. +// +// This program and the accompanying materials +// are licensed and made available under the terms and conditions of the BSD License +// which accompanies this distribution. The full text of the license may be found at +// http://opensource.org/licenses/bsd-license.php +// +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +// +// + + EXPORT InternalSyncCompareExchange32 + EXPORT InternalSyncCompareExchange64 + EXPORT InternalSyncIncrement + EXPORT InternalSyncDecrement + + AREA ArmSynchronization, CODE, READONLY + +/** + Performs an atomic compare exchange operation on a 32-bit unsigned integer. + + Performs an atomic compare exchange operation on the 32-bit unsigned integer + specified by Value. If Value is equal to CompareValue, then Value is set to + ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue, + then Value is returned. The compare exchange operation must be performed using + MP safe mechanisms. + + @param Value A pointer to the 32-bit value for the compare exchange + operation. + @param CompareValue 32-bit value used in compare operation. + @param ExchangeValue 32-bit value used in exchange operation. + + @return The original *Value before exchange. + +**/ +//UINT32 +//EFIAPI +//InternalSyncCompareExchange32 ( +// IN volatile UINT32 *Value, +// IN UINT32 CompareValue, +// IN UINT32 ExchangeValue +// ) +InternalSyncCompareExchange32 + dmb + +InternalSyncCompareExchange32Again + ldrex r3, [r0] + cmp r3, r1 + bne InternalSyncCompareExchange32Fail + +InternalSyncCompareExchange32Exchange + strex ip, r2, [r0] + cmp ip, #0 + bne InternalSyncCompareExchange32Again + +InternalSyncCompareExchange32Fail + dmb + mov r0, r3 + bx lr + +/** + Performs an atomic compare exchange operation on a 64-bit unsigned integer. + + Performs an atomic compare exchange operation on the 64-bit unsigned integer specified + by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and + CompareValue is returned. If Value is not equal to CompareValue, then Value is returned. + The compare exchange operation must be performed using MP safe mechanisms. + + @param Value A pointer to the 64-bit value for the compare exchange + operation. + @param CompareValue 64-bit value used in compare operation. + @param ExchangeValue 64-bit value used in exchange operation. + + @return The original *Value before exchange. + +**/ +//UINT64 +//EFIAPI +//InternalSyncCompareExchange64 ( +// IN volatile UINT64 *Value, // r0-r1 +// IN UINT64 CompareValue, // r2-r3 +// IN UINT64 ExchangeValue +// ) +InternalSyncCompareExchange64 + push { r4-r7 } + ldrd r4, r5, [sp, #16] + dmb + +InternalSyncCompareExchange64Again + ldrexd r6, r7, [r0] + cmp r6, r2 + cmpeq r7, r3 + bne InternalSyncCompareExchange64Fail + +InternalSyncCompareExchange64Exchange + strexd ip, r4, r5, [r0] + cmp ip, #0 + bne InternalSyncCompareExchange64Again + +InternalSyncCompareExchange64Fail + dmb + mov r0, r6 + mov r1, r7 + pop { r4-r7 } + bx lr + +/** + Performs an atomic increment of an 32-bit unsigned integer. + + Performs an atomic increment of the 32-bit unsigned integer specified by + Value and returns the incremented value. The increment operation must be + performed using MP safe mechanisms. The state of the return value is not + guaranteed to be MP safe. + + @param Value A pointer to the 32-bit value to increment. + + @return The incremented value. + +**/ +//UINT32 +//EFIAPI +//InternalSyncIncrement ( +// IN volatile UINT32 *Value +// ) +InternalSyncIncrement + dmb +TryInternalSyncIncrement + ldrex r1, [r0] + add r1, r1, #1 + strex r2, r1, [r0] + cmp r2, #0 + bne TryInternalSyncIncrement + dmb + bx lr + +/** + Performs an atomic decrement of an 32-bit unsigned integer. + + Performs an atomic decrement of the 32-bit unsigned integer specified by + Value and returns the decrement value. The decrement operation must be + performed using MP safe mechanisms. The state of the return value is not + guaranteed to be MP safe. + + @param Value A pointer to the 32-bit value to decrement. + + @return The decrement value. + +**/ +//UINT32 +//EFIAPI +//InternalSyncDecrement ( +// IN volatile UINT32 *Value +// ) +InternalSyncDecrement + dmb +TryInternalSyncDecrement + ldrex r1, [r0] + sub r1, r1, #1 + strex r2, r1, [r0] + cmp r2, #0 + bne TryInternalSyncDecrement + dmb + bx lr + + END diff --git a/MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.c b/MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.c deleted file mode 100644 index 9ddaa098b22f..000000000000 --- a/MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.c +++ /dev/null @@ -1,115 +0,0 @@ -/** @file - Implementation of synchronization functions. Still needs to be ported - - Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR> - Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php. - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -/** - Performs an atomic compare exchange operation on a 32-bit unsigned integer. - - Performs an atomic compare exchange operation on the 32-bit unsigned integer - specified by Value. If Value is equal to CompareValue, then Value is set to - ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue, - then Value is returned. The compare exchange operation must be performed using - MP safe mechanisms. - - @param Value A pointer to the 32-bit value for the compare exchange - operation. - @param CompareValue 32-bit value used in compare operation. - @param ExchangeValue 32-bit value used in exchange operation. - - @return The original *Value before exchange. - -**/ -UINT32 -EFIAPI -InternalSyncCompareExchange32 ( - IN volatile UINT32 *Value, - IN UINT32 CompareValue, - IN UINT32 ExchangeValue - ) -{ - return *Value != CompareValue ? *Value : - ((*Value = ExchangeValue), CompareValue); -} - -/** - Performs an atomic compare exchange operation on a 64-bit unsigned integer. - - Performs an atomic compare exchange operation on the 64-bit unsigned integer specified - by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and - CompareValue is returned. If Value is not equal to CompareValue, then Value is returned. - The compare exchange operation must be performed using MP safe mechanisms. - - @param Value A pointer to the 64-bit value for the compare exchange - operation. - @param CompareValue 64-bit value used in compare operation. - @param ExchangeValue 64-bit value used in exchange operation. - - @return The original *Value before exchange. - -**/ -UINT64 -EFIAPI -InternalSyncCompareExchange64 ( - IN volatile UINT64 *Value, - IN UINT64 CompareValue, - IN UINT64 ExchangeValue - ) -{ - return *Value != CompareValue ? *Value : - ((*Value = ExchangeValue), CompareValue); -} - -/** - Performs an atomic increment of an 32-bit unsigned integer. - - Performs an atomic increment of the 32-bit unsigned integer specified by - Value and returns the incremented value. The increment operation must be - performed using MP safe mechanisms. The state of the return value is not - guaranteed to be MP safe. - - @param Value A pointer to the 32-bit value to increment. - - @return The incremented value. - -**/ -UINT32 -EFIAPI -InternalSyncIncrement ( - IN volatile UINT32 *Value - ) -{ - return ++*Value; -} - -/** - Performs an atomic decrement of an 32-bit unsigned integer. - - Performs an atomic decrement of the 32-bit unsigned integer specified by - Value and returns the decrement value. The decrement operation must be - performed using MP safe mechanisms. The state of the return value is not - guaranteed to be MP safe. - - @param Value A pointer to the 32-bit value to decrement. - - @return The decrement value. - -**/ -UINT32 -EFIAPI -InternalSyncDecrement ( - IN volatile UINT32 *Value - ) -{ - return --*Value; -} diff --git a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf old mode 100644 new mode 100755 index bf9cf67a85cc..5e3b4e6b9bf2 --- a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf +++ b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf @@ -78,11 +78,12 @@ [Sources.ARM] Synchronization.c - Arm/Synchronization.c + Arm/Synchronization.asm | RVCT + Arm/Synchronization.S | GCC [Sources.AARCH64] Synchronization.c - AArch64/Synchronization.c + AArch64/Synchronization.S [Packages] MdePkg/MdePkg.dec -- 1.8.3.2

10 years, 2 months

Re: [Linaro-uefi] [edk2] GicV3 non-legacy support

by Ard Biesheuvel

On 4 February 2015 at 11:31, Olivier Martin <olivier.martin(a)arm.com> wrote: > I actually added support last week. I wanted to send the patchset on the > mailing-list but my SMTP server was not working. > > The patchset can be found here: > https://github.com/ARM-software/edk2/tree/gicv3-no-legacy > > > > This patchset requires support in the Trusted Firmware. I have already made > the change and send the patch to our internal team. > What kind of changes? > These patches will be pushed when Trusted Firmware support will be > released. > > > > Feedback and comments welcome! > > > > From: linaro-uefi-bounces(a)lists.linaro.org > [mailto:linaro-uefi-bounces@lists.linaro.org] On Behalf Of jayanthi > annadurai > Sent: 04 February 2015 05:31 > To: linaro-uefi(a)lists.linaro.org > Subject: [Linaro-uefi] GicV3 non-legacy support > > > > Hi, > > > > I am adding support for Broadcom server SoC in EDK2. > > > > Is GicV3 non legacy mode supported in EDK2? > > I am not able to find the APIs that use the system registers to program the > CPU interface. > > > > Thanks, > > Jayanthi > > > ------------------------------------------------------------------------------ > Dive into the World of Parallel Programming. The Go Parallel Website, > sponsored by Intel and developed in partnership with Slashdot Media, is your > hub for all things parallel software development, from weekly thought > leadership blogs to news, videos, case studies, tutorials and more. Take a > look and join the conversation now. http://goparallel.sourceforge.net/ > _______________________________________________ > edk2-devel mailing list > edk2-devel(a)lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/edk2-devel >

10 years, 2 months

GicV3 non-legacy support

by jayanthi annadurai

Hi, I am adding support for Broadcom server SoC in EDK2. Is GicV3 non legacy mode supported in EDK2? I am not able to find the APIs that use the system registers to program the CPU interface. Thanks, Jayanthi

10 years, 2 months

EDK2 iSCSI wiki page

by Roy Franz

I have completed my wiki page describing using iSCSI in EDK2: https://wiki.linaro.org/LEG/Engineering/Kernel/UEFI/UEFI_ISCSI Review/feedback appreciated. Thanks, Roy

10 years, 2 months

[PATCH] DxeCore: use 64 KB alignment for all memory allocations

by Ard Biesheuvel

This is a quick and dirty hack to ensure SBBR compliance in terms of memory allocation granularity. Note that it will lead to substantial relative memory waste (even if the absolute waste may be quite tolerable on multi GB machines) due to the fact that each call to AllocatePages () will return a 64 KB aligned buffer, i.e., every time the PeCoffLoader loads one of the multitude of individual modules UEFI consists of, it will round up the allocation. The #defines in the patch suggest that it is possible to use 64 KB granularity for runtime regions and 4 KB for boottime regions, but unfortunately, this does not work due the way the pool allocator is wired up: the AllocatePages () invocations that back the pool allocator use the boottime granularity unconditionally, and fixing this properly is far from trivial. Signed-off-by: Ard Biesheuvel <ard.biesheuvel(a)linaro.org> --- MdeModulePkg/Core/Dxe/Mem/Imem.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/MdeModulePkg/Core/Dxe/Mem/Imem.h b/MdeModulePkg/Core/Dxe/Mem/Imem.h index d09ff3c5220f..2ebd04874714 100644 --- a/MdeModulePkg/Core/Dxe/Mem/Imem.h +++ b/MdeModulePkg/Core/Dxe/Mem/Imem.h @@ -22,6 +22,14 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. #define EFI_ACPI_RUNTIME_PAGE_ALLOCATION_ALIGNMENT (EFI_PAGE_SIZE * 2) #define DEFAULT_PAGE_ALLOCATION (EFI_PAGE_SIZE * 2) +#elif defined (MDE_CPU_AARCH64) +/// +/// ARM Server Base Boot Requirements (SBBR) mandate 64 KB alignment +/// for all memory regions on AArch64. +/// +#define EFI_ACPI_RUNTIME_PAGE_ALLOCATION_ALIGNMENT (SIZE_64KB) +#define DEFAULT_PAGE_ALLOCATION (SIZE_64KB) + #else /// /// For genric EFI machines make the default allocations 4K aligned -- 1.8.3.2

10 years, 2 months

[PATCH] Don't require optional ISCSI negotiation responses.

by Roy Franz

Some simple value negotiation responses are optional, in particular DataPDUInOrder and DataSequenceInOrder. If we send "Yes", then the response from the target is optional, and the Linux target implementation does not return a response. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Roy Franz <roy.franz(a)linaro.org> --- MdeModulePkg/Universal/Network/IScsiDxe/IScsiProto.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/MdeModulePkg/Universal/Network/IScsiDxe/IScsiProto.c b/MdeModulePkg/Universal/Network/IScsiDxe/IScsiProto.c index cb1f79b..b8427ab 100644 --- a/MdeModulePkg/Universal/Network/IScsiDxe/IScsiProto.c +++ b/MdeModulePkg/Universal/Network/IScsiDxe/IScsiProto.c @@ -1290,9 +1290,11 @@ IScsiCheckOpParams ( // // DataPDUInOrder, result function is OR. + // The response is optional if we sent "Yes". + // The AsciiStrCmp is not done if we sent "Yes", so it is OK for Value to be NULL // Value = IScsiGetValueByKeyFromList (KeyValueList, ISCSI_KEY_DATA_PDU_IN_ORDER); - if (Value == NULL) { + if (!Session->DataPDUInOrder && Value == NULL) { goto ON_ERROR; } @@ -1300,9 +1302,11 @@ IScsiCheckOpParams ( // // DataSequenceInorder, result function is OR. + // The response is optional if we sent "Yes". + // The AsciiStrCmp is not done if we sent "Yes", so it is OK for Value to be NULL // Value = IScsiGetValueByKeyFromList (KeyValueList, ISCSI_KEY_DATA_SEQUENCE_IN_ORDER); - if (Value == NULL) { + if (!Session->DataSequenceInOrder && Value == NULL) { goto ON_ERROR; } -- 1.9.1

10 years, 2 months

[PATCH v3 0/5] ArmPlatformPkg: Add Lan91x Dxe driver, and networking support for A15/A15 MPcore/FVP AArch64

by fu.wei＠linaro.org

From: Fu Wei <fu.wei(a)linaro.org> Add a driver for the SMSC Lan91x Ethernet controllers, such as the 91C111 emulated in the ARM RTSM development simulators Add support for including the SMSC LAN 91C111 driver support by specify "-D EDK2_ENABLE_SMSC_91X=?" build variable. A per-platform addition to the .fdf is also required to actually include the driver and network protocol support in the produced image. Add conditionalised networking support for FVP AArch64 RTSM A15 RTSM A15 MPcore by default (EDK2_ENABLE_SMSC_91X=1). If specify "-D EDK2_ENABLE_SMSC_91X=0" build variable, the networking support will be disabled. This repo is including all the patches: https://git.linaro.org/people/fu.wei/uefi.git/shortlog/refs/heads/LAN91x_Dx… Fu Wei (2): ArmPlatformPkg: Add conditionalised networking support for RTSM A15 MPcore ArmPlatformPkg: Add conditionalised networking support for RTSM A15 Leif Lindholm (2): ArmPlatformPkg: Add conditional inclusion of Lan91x ethernet support ArmPlatformPkg: Add the conditionalised networking support for FVP AArch64. It is enabled by default (EDK2_ENABLE_SMSC_91X=1). If specify "-D EDK2_ENABLE_SMSC_91X=0" build variable, the networking support will be disabled. Reece R. Pollack (1): ArmPlatformPkg: Add Lan91x Dxe driver .../ArmVExpressPkg/ArmVExpress-FVP-AArch64.dsc | 3 + .../ArmVExpressPkg/ArmVExpress-FVP-AArch64.fdf | 5 + .../ArmVExpressPkg/ArmVExpress-RTSM-A15.dsc | 4 + .../ArmVExpressPkg/ArmVExpress-RTSM-A15.fdf | 21 +- .../ArmVExpressPkg/ArmVExpress-RTSM-A15_MPCore.dsc | 4 + .../ArmVExpressPkg/ArmVExpress-RTSM-A15_MPCore.fdf | 21 +- .../ArmVExpressPkg/ArmVExpress-networking.fdf.inc | 28 + ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc | 9 + EmbeddedPkg/Drivers/Lan91xDxe/Lan91xDxe.c | 2233 ++++++++++++++++++++ EmbeddedPkg/Drivers/Lan91xDxe/Lan91xDxe.inf | 58 + EmbeddedPkg/Drivers/Lan91xDxe/Lan91xDxeHw.h | 278 +++ EmbeddedPkg/EmbeddedPkg.dec | 3 + 12 files changed, 2635 insertions(+), 32 deletions(-) create mode 100644 ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-networking.fdf.inc create mode 100644 EmbeddedPkg/Drivers/Lan91xDxe/Lan91xDxe.c create mode 100644 EmbeddedPkg/Drivers/Lan91xDxe/Lan91xDxe.inf create mode 100644 EmbeddedPkg/Drivers/Lan91xDxe/Lan91xDxeHw.h -- 1.9.1

10 years, 2 months

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