CoreSight June 2020

coresight@lists.linaro.org

19 participants
34 discussions

[PATCHv3] coresight: tmc: Add shutdown callback for TMC ETR

by Sai Prakash Ranjan

Implement a shutdown callback to ensure ETR hardware is properly shutdown in reboot/shutdown path. This is required for ETR which has SMMU address translation enabled like on SC7180 SoC and few others. If the hardware is still accessing memory after SMMU translation is disabled as part of SMMU shutdown callback in system reboot or shutdown path, then IOVAs(I/O virtual address) which it was using will go on the bus as the physical addresses which might result in unknown crashes (NoC/interconnect errors). So we make sure from this shutdown callback that the ETR is shutdown before SMMU translation is disabled and device_link in SMMU driver will take care of ordering of shutdown callbacks such that SMMU shutdown callback is not called before any of its consumer shutdown callbacks. Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan(a)codeaurora.org> --- Changes since v2: * Remove ETF/ETB disable as suggested by Mathieu and Mike since they are not really affected. * Remove coresight and misc device unregister since it is not required for shutdown callback unlike remove callback and userspace is long gone by this time. Changes since v1: * Use mode flag and drop enable flag as Mike suggested. * Use spinlock before tmc hw disable as Mike suggested. --- .../hwtracing/coresight/coresight-tmc-etr.c | 2 +- drivers/hwtracing/coresight/coresight-tmc.c | 23 +++++++++++++++++++ drivers/hwtracing/coresight/coresight-tmc.h | 1 + 3 files changed, 25 insertions(+), 1 deletion(-) diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index 625882bc8b08..b29c2db94d96 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -1110,7 +1110,7 @@ static void __tmc_etr_disable_hw(struct tmc_drvdata *drvdata) } -static void tmc_etr_disable_hw(struct tmc_drvdata *drvdata) +void tmc_etr_disable_hw(struct tmc_drvdata *drvdata) { __tmc_etr_disable_hw(drvdata); /* Disable CATU device if this ETR is connected to one */ diff --git a/drivers/hwtracing/coresight/coresight-tmc.c b/drivers/hwtracing/coresight/coresight-tmc.c index 39fba1d16e6e..b13ce0daa572 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.c +++ b/drivers/hwtracing/coresight/coresight-tmc.c @@ -538,6 +538,28 @@ static int tmc_probe(struct amba_device *adev, const struct amba_id *id) return ret; } +static void tmc_shutdown(struct amba_device *adev) +{ + unsigned long flags; + struct tmc_drvdata *drvdata = amba_get_drvdata(adev); + + spin_lock_irqsave(&drvdata->spinlock, flags); + + if (drvdata->mode == CS_MODE_DISABLED) + goto out; + + if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) + tmc_etr_disable_hw(drvdata); + + /* + * We do not care about coresight unregister here unlike remove + * callback which is required for making coresight modular since + * the system is going down after this. + */ +out: + spin_unlock_irqrestore(&drvdata->spinlock, flags); +} + static const struct amba_id tmc_ids[] = { CS_AMBA_ID(0x000bb961), /* Coresight SoC 600 TMC-ETR/ETS */ @@ -556,6 +578,7 @@ static struct amba_driver tmc_driver = { .suppress_bind_attrs = true, }, .probe = tmc_probe, + .shutdown = tmc_shutdown, .id_table = tmc_ids, }; builtin_amba_driver(tmc_driver); diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h index 71de978575f3..6e8d2dc33d17 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.h +++ b/drivers/hwtracing/coresight/coresight-tmc.h @@ -268,6 +268,7 @@ ssize_t tmc_etb_get_sysfs_trace(struct tmc_drvdata *drvdata, /* ETR functions */ int tmc_read_prepare_etr(struct tmc_drvdata *drvdata); int tmc_read_unprepare_etr(struct tmc_drvdata *drvdata); +void tmc_etr_disable_hw(struct tmc_drvdata *drvdata); extern const struct coresight_ops tmc_etr_cs_ops; ssize_t tmc_etr_get_sysfs_trace(struct tmc_drvdata *drvdata, loff_t pos, size_t len, char **bufpp); base-commit: 059e38815950dbec65beafe03757bce9436e89a4 -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation

4 years, 6 months

[PATCH] coresight: tmc: Fix TMC mode read in tmc_read_unprepare_etb()

by Sai Prakash Ranjan

Reading TMC mode register without proper coresight power management can lead to exceptions like the one in the call trace below in tmc_read_unprepare_etb() when the trace data is read after the sink is disabled. So fix this by having a check for coresight sysfs mode before reading TMC mode management register in tmc_read_unprepare_etb() similar to tmc_read_prepare_etb(). SError Interrupt on CPU6, code 0xbe000411 -- SError pstate: 80400089 (Nzcv daIf +PAN -UAO) pc : tmc_read_unprepare_etb+0x74/0x108 lr : tmc_read_unprepare_etb+0x54/0x108 sp : ffffff80d9507c30 x29: ffffff80d9507c30 x28: ffffff80b3569a0c x27: 0000000000000000 x26: 00000000000a0001 x25: ffffff80cbae9550 x24: 0000000000000010 x23: ffffffd07296b0f0 x22: ffffffd0109ee028 x21: 0000000000000000 x20: ffffff80d19e70e0 x19: ffffff80d19e7080 x18: 0000000000000000 x17: 0000000000000000 x16: 0000000000000000 x15: 0000000000000000 x14: 0000000000000000 x13: 0000000000000000 x12: 0000000000000000 x11: 0000000000000000 x10: dfffffd000000001 x9 : 0000000000000000 x8 : 0000000000000002 x7 : ffffffd071d0fe78 x6 : 0000000000000000 x5 : 0000000000000080 x4 : 0000000000000001 x3 : ffffffd071d0fe98 x2 : 0000000000000000 x1 : 0000000000000004 x0 : 0000000000000001 Kernel panic - not syncing: Asynchronous SError Interrupt Fixes: 4525412a5046 ("coresight: tmc: making prepare/unprepare functions generic") Reported-by: Mike Leach <mike.leach(a)linaro.org> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan(a)codeaurora.org> --- drivers/hwtracing/coresight/coresight-tmc-etf.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c index 36cce2bfb744..6375504ba8b0 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -639,15 +639,14 @@ int tmc_read_unprepare_etb(struct tmc_drvdata *drvdata) spin_lock_irqsave(&drvdata->spinlock, flags); - /* There is no point in reading a TMC in HW FIFO mode */ - mode = readl_relaxed(drvdata->base + TMC_MODE); - if (mode != TMC_MODE_CIRCULAR_BUFFER) { - spin_unlock_irqrestore(&drvdata->spinlock, flags); - return -EINVAL; - } - /* Re-enable the TMC if need be */ if (drvdata->mode == CS_MODE_SYSFS) { + /* There is no point in reading a TMC in HW FIFO mode */ + mode = readl_relaxed(drvdata->base + TMC_MODE); + if (mode != TMC_MODE_CIRCULAR_BUFFER) { + spin_unlock_irqrestore(&drvdata->spinlock, flags); + return -EINVAL; + } /* * The trace run will continue with the same allocated trace * buffer. As such zero-out the buffer so that we don't end base-commit: 3d439a6c349778f129de19595db564a8366c3634 -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation

4 years, 6 months

Flushing PTM traces manually.

by Mounir NASR ALLAH

Hi all, I am currently facing a problem about manually flushing traces. The traced user application runs on a Linux distribution with an FPGA Board based on a Zynq-7000 SoC. I am setting up coresight components for tracing only the user application PID and his address space, and I exclude tracing kernel. All traces are exported to a monitor present in the FPGA. The flow of the traces: ————————————— ——————— ————————— | | | | | | | ARM Cortex A9 (Core 0) | ==> | TPIU | ==> | FPGA Monitor | | / PTM | | | | | ————————————— ——————— ————————— When there is a syscall on the user application, I have the traces below: … 16274 (a waypoint update packet) ffff0008 (the exception branch address) 16278 .. The relative addresses/assembly instructions extracted from the ELF file are : 16270: e89c0078 ldm ip, {r3, r4, r5, r6} 16274: ef000000 svc 0x00000000 16278: e8bd00f0 pop {r4, r5, r6, r7} During the execution of the syscall (on the Kernel side), the kernel needs to receive a response from the FPGA Monitor and wait actively for it. This response depends on calculations relative to all PTM traces before the syscall (SVC instruction at 16274). That’s why I need to flush all traces during the syscall, I tried to flush traces by setting the FOnMan_W of the Formatter and Flush Control Register (FFCR) into coresight-tpiu.c but that’s not working. Do you have an idea of how correctly flushing all traces to the FPGA Monitor on the kernel? Best regards, Mounir

4 years, 6 months

Re: [Bug] OpenCSD STM infinite loop

by Mike Leach

Thanks for the snapshot. A patch has been sent to the Coresight Mailing list. Please let me know if this solves your problem. Thanks Mike On Wed, 17 Jun 2020 at 12:01, subhasish Karmakar <subhasish.k2301(a)gmail.com> wrote: > > Hello Mike, > > Sorry for the late reply. I missed your email. > Please find the configuration and binary file attached. > > Thanks alot for your support, > Subhasish > > On Fri, Jun 12, 2020 at 9:32 PM Mike Leach <mike.leach(a)linaro.org> wrote: >> >> Hi Subhasish, >> >> Can you provide a reproducer in the form of a trace snapshot for this. >> This would be some binary STM data + config files that can be >> processed by the library test program trc_pkt_lister. >> See opencsd/decoder/tests/snapshots/stm_only for an example of a >> snapshot with STM data. >> >> Thanks >> >> Mike >> >> On Thu, 11 Jun 2020 at 07:38, subhasish Karmakar >> <subhasish.k2301(a)gmail.com> wrote: >> > >> > Hi All, >> > >> > I am seeing this bug in STM decoder. >> > Where STM decoder is going into an infinite loop and never comes out of it. >> > >> > I have pasted the debug patch and log excerpts for your reference. >> > Read "Bug Description" from Step-1 to Step-6 for detailed explanation. >> > Please help me with a fix. >> > >> > Debug Patch: >> > -------------------------------------- >> > diff --git a/decoder/source/stm/trc_pkt_proc_stm.cpp b/decoder/source/stm/trc_pkt_proc_stm.cpp >> > index b39a053..3bc754f 100644 >> > --- a/decoder/source/stm/trc_pkt_proc_stm.cpp >> > +++ b/decoder/source/stm/trc_pkt_proc_stm.cpp >> > @@ -81,7 +81,10 @@ ocsd_datapath_resp_t TrcPktProcStm::processData( const ocsd_trc_index_t index, >> > m_p_data_in = pDataBlock; >> > m_data_in_size = dataBlockSize; >> > m_data_in_used = 0; >> > - >> > + >> > + printf("while-entry (m_data_in_used[%d] < m_data_in_size[%d]) || m_nibble_2nd_valid[%d] || (m_proc_state[%d] == SEND_PKT)\n", >> > + m_data_in_used,m_data_in_size,m_nibble_2nd_valid,m_proc_state); >> > + >> > // while there is data and a continue response on the data path >> > while( dataToProcess() && OCSD_DATA_RESP_IS_CONT(resp) ) >> > { >> > @@ -141,6 +144,8 @@ ocsd_datapath_resp_t TrcPktProcStm::processData( const ocsd_trc_index_t index, >> > fatal.setMessage("Unknown System Error decoding trace."); >> > LogError(fatal); >> > } >> > + >> > + /*** Bug Description Step-4: m_data_in_used = 12 < m_data_in_size = 14, exit condition does not satisfy in processData(). >> > + Control enters into waitForSync() again ***/ >> > + >> > + printf("while-exit (m_data_in_used[%d] < m_data_in_size[%d]) || m_nibble_2nd_valid[%d] || (m_proc_state[%d] == SEND_PKT)\n", >> > + m_data_in_used,m_data_in_size,m_nibble_2nd_valid,m_proc_state); >> > } >> > >> > *numBytesProcessed = m_data_in_used; >> > @@ -249,9 +254,12 @@ void TrcPktProcStm::waitForSync(const ocsd_trc_index_t blk_st_index) >> > >> > m_bWaitSyncSaveSuppressed = true; // no need to save bytes until we want to send data. >> > >> > + /*** Bug Description Step-1: m_data_in_used = 0 and m_data_in_size = 14 for first time entry. ***/ >> > + /*** Bug Description Step-5: m_data_in_used = 12 and m_data_in_size = 14 for second time entry. >> > + But m_is_sync = TRUE, control does not enter into while loop . readNibble() is not called. ***/ >> > + >> > + printf("(bGotData[%d] && !m_is_sync[%d])\n", bGotData, m_is_sync); >> > while(bGotData && !m_is_sync) >> > { >> > bGotData = readNibble(); // read until we have a sync or run out of data >> > + >> > + /*** Bug Description Step-2: m_data_in_used = 12 and m_is_sync = TRUE, when we have found sync packet. ***/ >> > + >> > + printf("m_data_in_used[%d], m_nibble_2nd_valid[%d], m_num_nibbles[%d], m_is_sync[%d]\n", >> > + m_data_in_used, m_nibble_2nd_valid, m_num_nibbles, m_is_sync); >> > } >> > >> > m_bWaitSyncSaveSuppressed = false; >> > @@ -272,7 +280,7 @@ void TrcPktProcStm::waitForSync(const ocsd_trc_index_t blk_st_index) >> > { >> > // for a), b), c) send the none sync data then re-enter >> > // if out of data, or sync with some previous data, this is sent as unsynced. >> > - >> > + >> > + /*** Bug Description Step-3: m_data_in_used = 12 and m_data_in_size = 14 NOTSYNC packet sent ***/ >> > + /*** Bug Description Step-6: step 3 to 6 creates an infinite loop. ***/ >> > + >> > + printf("(!bGotData[%d] || m_num_nibbles[%d] > 22)\n", bGotData, m_num_nibbles); >> > m_curr_packet.setPacketType(STM_PKT_NOTSYNC,false); >> > if(mon_in_use.usingMonitor()) >> > { >> > >> > Log With Debug Patch: >> > ------------------------------------------ >> > while-entry (m_data_in_used[0] < m_data_in_size[14]) || m_nibble_2nd_valid[0] || (m_proc_state[0] == SEND_PKT) >> > (bGotData[1] && !m_is_sync[0]) >> > m_data_in_used[1], m_nibble_2nd_valid[1], m_num_nibbles[1], m_is_sync[0] >> > m_data_in_used[1], m_nibble_2nd_valid[0], m_num_nibbles[2], m_is_sync[0] >> > m_data_in_used[2], m_nibble_2nd_valid[1], m_num_nibbles[3], m_is_sync[0] >> > m_data_in_used[2], m_nibble_2nd_valid[0], m_num_nibbles[4], m_is_sync[0] >> > m_data_in_used[3], m_nibble_2nd_valid[1], m_num_nibbles[5], m_is_sync[0] >> > m_data_in_used[3], m_nibble_2nd_valid[0], m_num_nibbles[6], m_is_sync[0] >> > m_data_in_used[4], m_nibble_2nd_valid[1], m_num_nibbles[7], m_is_sync[0] >> > m_data_in_used[4], m_nibble_2nd_valid[0], m_num_nibbles[8], m_is_sync[0] >> > m_data_in_used[5], m_nibble_2nd_valid[1], m_num_nibbles[9], m_is_sync[0] >> > m_data_in_used[5], m_nibble_2nd_valid[0], m_num_nibbles[10], m_is_sync[0] >> > m_data_in_used[6], m_nibble_2nd_valid[1], m_num_nibbles[11], m_is_sync[0] >> > m_data_in_used[6], m_nibble_2nd_valid[0], m_num_nibbles[12], m_is_sync[0] >> > m_data_in_used[7], m_nibble_2nd_valid[1], m_num_nibbles[13], m_is_sync[0] >> > m_data_in_used[7], m_nibble_2nd_valid[0], m_num_nibbles[14], m_is_sync[0] >> > m_data_in_used[8], m_nibble_2nd_valid[1], m_num_nibbles[15], m_is_sync[0] >> > m_data_in_used[8], m_nibble_2nd_valid[0], m_num_nibbles[16], m_is_sync[0] >> > m_data_in_used[9], m_nibble_2nd_valid[1], m_num_nibbles[17], m_is_sync[0] >> > m_data_in_used[9], m_nibble_2nd_valid[0], m_num_nibbles[18], m_is_sync[0] >> > m_data_in_used[10], m_nibble_2nd_valid[1], m_num_nibbles[19], m_is_sync[0] >> > m_data_in_used[10], m_nibble_2nd_valid[0], m_num_nibbles[20], m_is_sync[0] >> > m_data_in_used[11], m_nibble_2nd_valid[1], m_num_nibbles[21], m_is_sync[0] >> > m_data_in_used[11], m_nibble_2nd_valid[0], m_num_nibbles[22], m_is_sync[0] >> > m_data_in_used[12], m_nibble_2nd_valid[1], m_num_nibbles[23], m_is_sync[0] >> > m_data_in_used[12], m_nibble_2nd_valid[0], m_num_nibbles[24], m_is_sync[1] >> > (!bGotData[1] || m_num_nibbles[24] > 22) >> > while-exit (m_data_in_used[12] < m_data_in_size[14]) || m_nibble_2nd_valid[0] || (m_proc_state[3] == SEND_PKT) >> > Idx:0;[ 0xF1 ];NOTSYNC:STM not synchronised >> > while-exit (m_data_in_used[12] < m_data_in_size[14]) || m_nibble_2nd_valid[0] || (m_proc_state[0] == SEND_PKT) >> > (bGotData[1] && !m_is_sync[1]) >> > (!bGotData[1] || m_num_nibbles[23] > 22) >> > while-exit (m_data_in_used[12] < m_data_in_size[14]) || m_nibble_2nd_valid[0] || (m_proc_state[3] == SEND_PKT) >> > Idx:12;[ 0x0F ];NOTSYNC:STM not synchronised >> > while-exit (m_data_in_used[12] < m_data_in_size[14]) || m_nibble_2nd_valid[0] || (m_proc_state[0] == SEND_PKT) >> > (bGotData[1] && !m_is_sync[1]) >> > (!bGotData[1] || m_num_nibbles[23] > 22) >> > while-exit (m_data_in_used[12] < m_data_in_size[14]) || m_nibble_2nd_valid[0] || (m_proc_state[3] == SEND_PKT) >> > Idx:12;[ 0x0F ];NOTSYNC:STM not synchronised >> > while-exit (m_data_in_used[12] < m_data_in_size[14]) || m_nibble_2nd_valid[0] || (m_proc_state[0] == SEND_PKT) >> > (bGotData[1] && !m_is_sync[1]) >> > (!bGotData[1] || m_num_nibbles[23] > 22) >> > while-exit (m_data_in_used[12] < m_data_in_size[14]) || m_nibble_2nd_valid[0] || (m_proc_state[3] == SEND_PKT) >> > Idx:12;[ 0x0F ];NOTSYNC:STM not synchronised >> > while-exit (m_data_in_used[12] < m_data_in_size[14]) || m_nibble_2nd_valid[0] || (m_proc_state[0] == SEND_PKT) >> > (bGotData[1] && !m_is_sync[1]) >> > (!bGotData[1] || m_num_nibbles[23] > 22) >> > while-exit (m_data_in_used[12] < m_data_in_size[14]) || m_nibble_2nd_valid[0] || (m_proc_state[3] == SEND_PKT) >> > Idx:12;[ 0x0F ];NOTSYNC:STM not synchronised >> > while-exit (m_data_in_used[12] < m_data_in_size[14]) || m_nibble_2nd_valid[0] || (m_proc_state[0] == SEND_PKT) >> > (bGotData[1] && !m_is_sync[1]) >> > (!bGotData[1] || m_num_nibbles[23] > 22) >> > >> > >> > Thank alot for your support, >> > Subhasish >> > _______________________________________________ >> > CoreSight mailing list >> > CoreSight(a)lists.linaro.org >> > https://lists.linaro.org/mailman/listinfo/coresight >> >> >> >> -- >> Mike Leach >> Principal Engineer, ARM Ltd. >> Manchester Design Centre. UK -- Mike Leach Principal Engineer, ARM Ltd. Manchester Design Centre. UK

4 years, 6 months

[PATCH] opencsd: stm: Fix Async detection bug.

by Mike Leach

Issue with ASYNC detection caused infinite loop if a 21x 0xF 1x 0x0 async was preceded by one or more 0xF nibbles. Patch ensures 0xF sync nibble count capped at 21. Reported by subhasish.k2301(a)gmail.com. Signed-off-by: Mike Leach <mike.leach(a)linaro.org> --- decoder/include/opencsd/stm/trc_pkt_proc_stm.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/decoder/include/opencsd/stm/trc_pkt_proc_stm.h b/decoder/include/opencsd/stm/trc_pkt_proc_stm.h index 909ac0c..bc4391b 100644 --- a/decoder/include/opencsd/stm/trc_pkt_proc_stm.h +++ b/decoder/include/opencsd/stm/trc_pkt_proc_stm.h @@ -239,7 +239,8 @@ inline void TrcPktProcStm::checkSyncNibble() if((m_nibble == 0) && (m_num_F_nibbles >= 21)) { - m_is_sync = true; //this nibble marks a sync sequence - keep the F nibble count + m_is_sync = true; //this nibble marks a sync sequence + m_num_F_nibbles = 21; // set the F nibble count - lose any extra as unsynced data. } else { -- 2.17.1

4 years, 6 months

[PATCH 0/3] coresight: minor fixes for CoreSight and ETMv4

by Mike Leach

Set consists of minor fixes discovered during other development work. Fixes are stand-alone and not directly part of new work. Mike Leach (3): coresight: Fix comment in main header file. coresight: etmv4: Counter values not saved on disable. coresight: etmv4: Fix resource selector constant. drivers/hwtracing/coresight/coresight-etm4x.c | 6 ++++++ drivers/hwtracing/coresight/coresight-etm4x.h | 4 ++-- include/linux/coresight.h | 3 ++- 3 files changed, 10 insertions(+), 3 deletions(-) -- 2.17.1

4 years, 6 months

[PATCH v5] perf: cs-etm: Allow no CoreSight sink to be specified on command line

by Mike Leach

Adjust the handling of the session sink selection to allow no sink to be selected on the command line. This then forwards the sink selection to the CoreSight infrastructure which will attempt to select a sink based on the default sink select priorities. Signed-off-by: Mike Leach <mike.leach(a)linaro.org> Tested-by: Leo Yan <leo.yan(a)linaro.org> --- tools/perf/arch/arm/util/cs-etm.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/tools/perf/arch/arm/util/cs-etm.c b/tools/perf/arch/arm/util/cs-etm.c index cea5e33d61d2..cad7bf783413 100644 --- a/tools/perf/arch/arm/util/cs-etm.c +++ b/tools/perf/arch/arm/util/cs-etm.c @@ -243,10 +243,10 @@ static int cs_etm_set_sink_attr(struct perf_pmu *pmu, } /* - * No sink was provided on the command line - for _now_ treat - * this as an error. + * No sink was provided on the command line - allow the CoreSight + * system to look for a default */ - return ret; + return 0; } static int cs_etm_recording_options(struct auxtrace_record *itr, -- 2.17.1

4 years, 6 months

Do you need mask, nitrile gloves, goggles, protective clothing, infrared thermometer and sprayer? - Dr.(AD)

by Dr. B. S. Robinson

4 years, 6 months

COVID-19: Face Masks & Hand Sanitizer

by Tony Beig

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4 years, 6 months

OpenCSD v0.14.2 Released

by Mike Leach

Fixes reported issues #24 and #25 from github. Removes globals from instruction decode lib to improve usability in multi threaded environment. -- Mike Leach Principal Engineer, ARM Ltd. Manchester Design Centre. UK

4 years, 6 months

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2016

2015

CoreSight June 2020