Hi Christoph.
[adding in Suzuki and Mathieu who maintain the coresight subsystem & lists]
You are correct - in this patchset we are adding the use of a binary
attribute to load and unload Coresight configurations and features -
which action has a side effect of adding and removing entries in
particular sub-directories in our configfs sub-system.
Our use case for configfs is somewhat more complex than the other
existing usages - such as ACPI, where the format of the directory
structure and attributes is static, and known ahead of time.
The CoreSight configurations have variable numbers of attributes
appearing in the configfs directories - so the attribute arrays are
built dynamically at load time. The load process and also result in
elements appearing in both the cs-syscfg/configurations and the
cs-syscfg/features sub directories. This dynamic nature and split
elements means that the traditional mkdir/rmdir configfs paradigm
cannot be made to work.
We currently have two methods upstreamed for loading configurations, 1
is a configuration directly built into the coresight core code, and
the other is to allow configurations to be loaded as kernel loadable
modules.
However these 2 are dependent on compile time operations, and have
kernel dependencies.
Hence we have introduced the direct load via configfs binary attribute
- which is more portable, flexible and convenient for the end user.
I appreciate that this may not be a usage you anticipated for
configfs, but it does serve our purposes very well, and as far a I can
tell from examination of configfs code and considerable testing, works
fine and does not have any operational issues, other than the lockdep
warnings on unload, which are caused be the fragment locks (lockdep
being confused by holding the fragment for the initial cs-syscfg root
system, and the one for the sub-directory we want to unload).
I am open to suggestions for a different way of doing this within the
established directory structure we need to maintain.
Thanks and Regards
Mike
On Fri, 29 Jul 2022 at 14:24, Christoph Hellwig <hch(a)lst.de> wrote:
>
> On Fri, Jul 29, 2022 at 07:41:00AM +0100, Mike Leach wrote:
> > Sure - see below
> >
> > Happens during the unload process of the coresight configuration.
>
> Hmm. It seems like youre bin_attr ->write handler (which gets called
> from configfs_release_bin_file) tries to unregister a group. That's
> not really how the configfs API is supposed to be used.
--
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK
Hi all,
I have a system that only has an ETF as a trace sink, so I only have 8 kB of memory available for my trace, which limits me to quite small programs.
What would be the go-to solution for longer trace-runs, when I want to do on-device-trace-capturing? Is it possible at all with my setup?
It is important that I don't loose any trace, I need a trace of the whole execution. For tracing I use CSAL.
Best regards,
Finn
Hi Bhupesh,
On 03/08/2022 20:12, Bhupesh Sharma wrote:
> Some Qualcomm ETM implementations require skipping powering up
> the trace unit, as the ETMs are in the same power domain as
> their CPU cores.
>
> Via commit 5214b563588e ("coresight: etm4x: Add support for
> sysreg only devices"), the setting of 'skip_power_up' flag was
> moved after the 'etm4_init_arch_data' function is called, whereas
> the flag value is itself used inside the function. This causes
> a crash when ETM mode 'Low-power state behavior override' is set
> on some Qualcomm parts.
>
> Fix the same.
>
Thanks for the patch. The patch is correct. But please see my comment
below.
> Fixes: 5214b563588e ("coresight: etm4x: Add support for sysreg only devices")
> Cc: Mike Leach <mike.leach(a)linaro.org>
> Cc: Suzuki K Poulose <suzuki.poulose(a)arm.com>
> Cc: Mathieu Poirier <mathieu.poirier(a)linaro.org>
> Cc: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org>
> Signed-off-by: Bhupesh Sharma <bhupesh.sharma(a)linaro.org>
> ---
> drivers/hwtracing/coresight/coresight-etm4x-core.c | 13 +++++++++++--
> 1 file changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> index d39660a3e50c..cf6254b87fd5 100644
> --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
> +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> @@ -1943,6 +1943,16 @@ static int etm4_probe(struct device *dev, void __iomem *base, u32 etm_pid)
> init_arg.csa = &desc.access;
> init_arg.pid = etm_pid;
>
> + /*
> + * Some Qualcomm implementations require skipping powering up the trace unit,
> + * as the ETMs are in the same power domain as their CPU cores.
> + *
> + * Since the 'skip_power_up' flag is used inside 'etm4_init_arch_data' function,
> + * initialize it before the function is called.
> + */
> + if (fwnode_property_present(dev_fwnode(dev), "qcom,skip-power-up"))
> + drvdata->skip_power_up = true;
> +
> if (smp_call_function_single(drvdata->cpu,
> etm4_init_arch_data, &init_arg, 1))
> dev_err(dev, "ETM arch init failed\n");
> @@ -1951,8 +1961,7 @@ static int etm4_probe(struct device *dev, void __iomem *base, u32 etm_pid)
> return -EINVAL;
>
> /* TRCPDCR is not accessible with system instructions. */
> - if (!desc.access.io_mem ||
> - fwnode_property_present(dev_fwnode(dev), "qcom,skip-power-up"))
> + if (!desc.access.io_mem)
> drvdata->skip_power_up = true;
>
Please could you move this setting into "etm4_init_sysreg_access()" ? It
looks a bit odd to split the check in the same function. Moving this to
the sysreg_access() makes it explicit.
Suzuki
> major = ETM_ARCH_MAJOR_VERSION(drvdata->arch);
This is a prelude to adding more tests to shell tests and in order to
support putting those tests into subdirectories, I need to change the
test code that scans/finds and runs them.
To support subdirs I have to recurse so it's time to refactor the code to
allow this and centralize the shell script finding into one location and
only one single scan that builds a list of all the found tests in memory
instead of it being duplicated in 3 places.
This code also optimizes things like knowing the max width of desciption
strings (as we can do that while we scan instead of a whole new pass
of opening files). It also more cleanly filters scripts to see only
*.sh files thus skipping random other files in directories like *~
backup files, other random junk/data files that may appear and the
scripts must be executable to make the cut (this ensures the script
lib dir is not seen as scripts to run). This avoids perf test running
previous older versions of test scripts that are editor backup files
as well as skipping perf.data files that may appear and so on.
Signed-off-by: Carsten Haitzler <carsten.haitzler(a)arm.com>
On 02/08/2022 19:09, Trilok Soni wrote:
> Hi Suzuki,
>
> On 8/2/2022 10:43 AM, Suzuki K Poulose wrote:
>> Hi Trilok,
>>
>> On 02/08/2022 18:33, Trilok Soni wrote:
>>>
>>>
>>> On 8/2/2022 7:43 AM, Jinlong Mao wrote:
>>>> Hi Reviewers,
>>>>
>>>> Please help to review V12 series of TPDM/TPDA patches.
>>>>
>>>> Thanks
>>>>
>>>
>>> Suzuki and Mathieu, we are almost there it seems in getting the
>>> acceptance of these patches, so I hope you find the time to review
>>> these patches. I guess it is almost a year now for these patches and
>>> had a good amount of reviews and revisions :)
>>
>> This series has been reviewed for the previous versions (which is why
>> we have it in v12) and this one depends on a series worked on by Mike
>> Leach. We cannot push this without the dynamic Trace ID allocation
>> scheme, which is clearly mentioned in the cover letter for this
>> series.
>>
>> As such this series is in a good shape, assuming all the comments
>> in the previous version has been addressed. So, we would rather
>> get Mike's work priority and pull that in, so that we can eventually
>> get this upstream.
>>
>>
>
> I believe we have addressed all the comments in v12. Are you ok, if we
> post additional features series (around ~2k to ~3k SLOC)? I just want to
> make sure we are not creating flood of patches w/ features.
You are free to post the patches, as long as you clearly mention the
dependencies in the cover letter. Please be mindful about the merge window.
Suzuki
Hi Trilok,
On 02/08/2022 18:33, Trilok Soni wrote:
>
>
> On 8/2/2022 7:43 AM, Jinlong Mao wrote:
>> Hi Reviewers,
>>
>> Please help to review V12 series of TPDM/TPDA patches.
>>
>> Thanks
>>
>
> Suzuki and Mathieu, we are almost there it seems in getting the
> acceptance of these patches, so I hope you find the time to review these
> patches. I guess it is almost a year now for these patches and had a
> good amount of reviews and revisions :)
This series has been reviewed for the previous versions (which is why
we have it in v12) and this one depends on a series worked on by Mike
Leach. We cannot push this without the dynamic Trace ID allocation
scheme, which is clearly mentioned in the cover letter for this
series.
As such this series is in a good shape, assuming all the comments
in the previous version has been addressed. So, we would rather
get Mike's work priority and pull that in, so that we can eventually
get this upstream.
Kind regards
Suzuki
>
> ---Trilok Soni
This series adds support for the trace performance monitoring and
diagnostics hardware (TPDM and TPDA). It is composed of two major
elements.
a) Changes for original coresight framework to support for TPDM and TPDA.
b) Add driver code for TPDM and TPDA.
Introduction of changes for original coresight framework
Support TPDM as new coresight source.
Since only STM and ETM are supported as coresight source originally.
TPDM is a newly added coresight source. We need to change
the original way of saving coresight path to support more types source
for coresight driver.
The following patch is to add support more coresight sources.
coresight: core: Use IDR for non-cpu bound sources' paths.
Introduction of TPDM and TPDA
TPDM - The trace performance monitoring and diagnostics monitor or TPDM in
short serves as data collection component for various dataset types
specified in the QPMDA(Qualcomm performance monitoring and diagnostics
architecture) spec. The primary use case of the TPDM is to collect data
from different data sources and send it to a TPDA for packetization,
timestamping and funneling.
Coresight: Add coresight TPDM source driver
dt-bindings: arm: Adds CoreSight TPDM hardware definitions
coresight-tpdm: Add DSB dataset support
coresight-tpdm: Add integration test support
docs: sysfs: coresight: Add sysfs ABI documentation for TPDM
TPDA - The trace performance monitoring and diagnostics aggregator or
TPDA in short serves as an arbitration and packetization engine for the
performance monitoring and diagnostics network as specified in the QPMDA
(Qualcomm performance monitoring and diagnostics architecture)
specification. The primary use case of the TPDA is to provide
packetization, funneling and timestamping of Monitor data as specified
in the QPMDA specification.
The following patch is to add driver for TPDA.
Coresight: Add TPDA link driver
dt-bindings: arm: Adds CoreSight TPDA hardware definitions
The last patch of this series is a device tree modification, which add
the TPDM and TPDA configuration to device tree for validating.
ARM: dts: msm: Add coresight components for SM8250
ARM: dts: msm: Add tpdm mm/prng for sm8250
Once this series patches are applied properly, the tpdm and tpda nodes
should be observed at the coresight path /sys/bus/coresight/devices
e.g.
/sys/bus/coresight/devices # ls -l | grep tpd
tpda0 -> ../../../devices/platform/soc(a)0/6004000.tpda/tpda0
tpdm0 -> ../../../devices/platform/soc(a)0/6c08000.mm.tpdm/tpdm0
We can use the commands are similar to the below to validate TPDMs.
Enable coresight sink first.
echo 1 > /sys/bus/coresight/devices/tmc_etf0/enable_sink
echo 1 > /sys/bus/coresight/devices/tpdm0/enable_source
echo 1 > /sys/bus/coresight/devices/tpdm0/integration_test
echo 2 > /sys/bus/coresight/devices/tpdm0/integration_test
The test data will be collected in the coresight sink which is enabled.
If rwp register of the sink is keeping updating when do
integration_test (by cat tmc_etf0/mgmt/rwp), it means there is data
generated from TPDM to sink.
There must be a tpda between tpdm and the sink. When there are some
other trace event hw components in the same HW block with tpdm, tpdm
and these hw components will connect to the coresight funnel. When
there is only tpdm trace hw in the HW block, tpdm will connect to
tpda directly.
+---------------+ +-------------+
| tpdm@6c08000 | |tpdm@684C000 |
+-------|-------+ +------|------+
| |
+-------|-------+ |
| funnel@6c0b000| |
+-------|-------+ |
| |
+-------|-------+ |
|funnel@6c2d000 | |
+-------|-------+ |
| |
| +---------------+ |
+----- tpda@6004000 -----------+
+-------|-------+
|
+-------|-------+
|funnel@6005000 |
+---------------+
This patch series depends on patch series:
"[v2,00/13] coresight: Add new API to allocate trace source ID values"
https://patchwork.kernel.org/project/linux-arm-kernel/cover/20220704081149.…
Changes from V11:
1. Clear bits for atid before setting them and relese atid when tpda
remove. -- Suzuki K Poulose <suzuki.poulose(a)arm.com>
Mao Jinlong (9):
coresight: core: Use IDR for non-cpu bound sources' paths.
Coresight: Add coresight TPDM source driver
dt-bindings: arm: Adds CoreSight TPDM hardware definitions
coresight-tpdm: Add DSB dataset support
coresight-tpdm: Add integration test support
Coresight: Add TPDA link driver
dt-bindings: arm: Adds CoreSight TPDA hardware definitions
arm64: dts: qcom: sm8250: Add coresight components
arm64: dts: qcom: sm8250: Add tpdm mm/prng
.../testing/sysfs-bus-coresight-devices-tpdm | 13 +
.../bindings/arm/qcom,coresight-tpda.yaml | 111 +++
.../bindings/arm/qcom,coresight-tpdm.yaml | 93 +++
MAINTAINERS | 2 +
arch/arm64/boot/dts/qcom/sm8250.dtsi | 671 ++++++++++++++++++
drivers/hwtracing/coresight/Kconfig | 23 +
drivers/hwtracing/coresight/Makefile | 2 +
drivers/hwtracing/coresight/coresight-core.c | 42 +-
drivers/hwtracing/coresight/coresight-tpda.c | 208 ++++++
drivers/hwtracing/coresight/coresight-tpda.h | 35 +
drivers/hwtracing/coresight/coresight-tpdm.c | 259 +++++++
drivers/hwtracing/coresight/coresight-tpdm.h | 62 ++
include/linux/coresight.h | 1 +
13 files changed, 1510 insertions(+), 12 deletions(-)
create mode 100644 Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml
create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
create mode 100644 drivers/hwtracing/coresight/coresight-tpda.c
create mode 100644 drivers/hwtracing/coresight/coresight-tpda.h
create mode 100644 drivers/hwtracing/coresight/coresight-tpdm.c
create mode 100644 drivers/hwtracing/coresight/coresight-tpdm.h
--
2.17.1