As suggested by Catalin here's the change to add Coresight to defconfig.
Unfortunately I don't think we should add CONFIG_CORESIGHT_SOURCE_ETM4X
which builds a few files until [1] is merged because of the overhead
of CONFIG_PID_IN_CONTEXTIDR.
[1]: https://lore.kernel.org/lkml/20211021134530.206216-1-leo.yan@linaro.org/T/
James Clark (1):
arm64: defconfig: Add Coresight as module
arch/arm64/configs/defconfig | 9 +++++++++
1 file changed, 9 insertions(+)
--
2.28.0
在 9/13/2022 8:48 AM, Rob Herring 写道:
> On Thu, Sep 08, 2022 at 04:44:57PM +0800, Tao Zhang wrote:
>> Add property "qcom,dsb-elem-size" to support DSB element for TPDA.
>> Specifies the DSB element size supported by each monitor connected
>> to the aggregator on each port. Should be specified in pairs (port,
>> dsb element size).
> What is DSB?
The full name of DSB is "Discrete Single Bit".
The DSB element size supported by different DSB subunit TPDMs is
different, so TPDA needs to be informed through configuration in device
tree.
>> Signed-off-by: Tao Zhang <quic_taozha(a)quicinc.com>
>> ---
>> Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml | 9 +++++++++
>> 1 file changed, 9 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml
>> index eb9bfc5..1bb3fdf 100644
>> --- a/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml
>> +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml
>> @@ -40,6 +40,13 @@ properties:
>> minItems: 1
>> maxItems: 2
>>
>> + qcom,dsb-elem-size:
>> + description: |
>> + Specifies the DSB element size supported by each monitor
>> + connected to the aggregator on each port. Should be specified
>> + in pairs (port, dsb element size).
>> + $ref: /schemas/types.yaml#/definitions/uint32-array
> The binding (not yet upstream) says there is just 1 port (port 0). So
> why do you need more than a single uint32?
>
> Rob
TPDA(Trace, Profiling and Diagnostics Aggregator) is to provide
packetization, funneling and timestamping of TPDM data.
Multiple monitors are connected to different input ports of TPDA.
- - - - - - - - - - - -
| TPDM 0| | TPDM 1 | | TPDM 2|
- - - - - - - - - - - -
| | |
|_ _ _ _ _ _ | _ _ _ _ |
| | |
| | |
------------------
| TPDA |
------------------
There may be multiple DSB subunit TPDMs connected to different input
ports of the same TPDA, so we need to use port here to define the
distinction in device tree.
Best regards,
Tao
在 9/8/2022 6:54 PM, Krzysztof Kozlowski 写道:
> On 08/09/2022 10:44, Tao Zhang wrote:
>> Add property "qcom,dsb-elem-size" to support DSB element for TPDA.
>> Specifies the DSB element size supported by each monitor connected
>> to the aggregator on each port. Should be specified in pairs (port,
>> dsb element size).
>>
>> Signed-off-by: Tao Zhang <quic_taozha(a)quicinc.com>
>> ---
>> Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml | 9 +++++++++
>> 1 file changed, 9 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml
>> index eb9bfc5..1bb3fdf 100644
>> --- a/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml
>> +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml
>> @@ -40,6 +40,13 @@ properties:
>> minItems: 1
>> maxItems: 2
>>
>> + qcom,dsb-elem-size:
>> + description: |
>> + Specifies the DSB element size supported by each monitor
>> + connected to the aggregator on each port. Should be specified
>> + in pairs (port, dsb element size).
>> + $ref: /schemas/types.yaml#/definitions/uint32-array
> So it is rather uint32-matrix (need to describe the items subschema).
> What about maxItems?
>
> Best regards,
> Krzysztof
Yes, indeed it should be uint32-matrix here. I will update in the next
release.
The "maxItems" cannot be known explicitly because it depends on how many
DSB subunit TPDMs are connected to the TPDA input ports.
Usually the number of the items is 1 to several, but there is no limit
to its maximum value.
Best regards,
Tao
Cc: acme
On 22/08/2022 17:02, Mathieu Poirier wrote:
> On Sun, Jul 31, 2022 at 09:06:48AM +0200, Christophe JAILLET wrote:
>> Since the commit in Fixes: tag, "coresight-cpu-debug.txt" has been turned
>> into "arm,coresight-cpu-debug.yaml".
>>
>> Update the doc accordingly to avoid a 'make htmldocs' warning
>>
>> Fixes: 66d052047ca8 ("dt-bindings: arm: Convert CoreSight CPU debug to DT schema")
>> Signed-off-by: Christophe JAILLET <christophe.jaillet(a)wanadoo.fr>
>> ---
>> Documentation/trace/coresight/coresight-cpu-debug.rst | 3 ++-
>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>
>
> Applied.
fyi, there is another patch fixing the same here.
https://lkml.kernel.org/r/20815dbff3d27f5d3e6876363f052d2a08ad2e72.16608294…
We may have to decide which one goes in.
Cheers
Suzuki
>
> Thanks,
> Mathieu
>
>> diff --git a/Documentation/trace/coresight/coresight-cpu-debug.rst b/Documentation/trace/coresight/coresight-cpu-debug.rst
>> index 993dd294b81b..836b35532667 100644
>> --- a/Documentation/trace/coresight/coresight-cpu-debug.rst
>> +++ b/Documentation/trace/coresight/coresight-cpu-debug.rst
>> @@ -117,7 +117,8 @@ divide into below cases:
>> Device Tree Bindings
>> --------------------
>>
>> -See Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt for details.
>> +See Documentation/devicetree/bindings/arm/arm,coresight-cpu-debug.yaml for
>> +details.
>>
>>
>> How to use the module
>> --
>> 2.34.1
>>
On 18/08/2022 14:38, Mauro Carvalho Chehab wrote:
> Using wildcards for cross-reference doesn't work, as the Sphinx
> automarkup plugin is not smart enough. So, changeset
> c06475910b52 ("Documentation: coresight: Escape coresight bindings file wildcard")
> tried to fix it, but at the wrong way, as it the building system
> will keep producing warnings about that:
>
> Warning: Documentation/trace/coresight/coresight.rst references a file that doesn't exist: Documentation/devicetree/bindings/arm/arm,coresight-
>
> As automarkup will still try (and fail) to create a cross reference.
> So, instead, change the markup to ensure that the warning won't be
> reported.
>
> Fixes: c06475910b52 ("Documentation: coresight: Escape coresight bindings file wildcard")
> Cc: Bagas Sanjaya <bagasdotme(a)gmail.com>
> Signed-off-by: Mauro Carvalho Chehab <mchehab(a)kernel.org>
Acked-by: Suzuki K Poulose <suzuki.poulose(a)arm.com>
> ---
>
> See [PATCH 00/13] at: https://lore.kernel.org/all/cover.1660829433.git.mchehab@kernel.org/
>
> Documentation/trace/coresight/coresight.rst | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Documentation/trace/coresight/coresight.rst b/Documentation/trace/coresight/coresight.rst
> index 4a71ea6cb390..826e59a698da 100644
> --- a/Documentation/trace/coresight/coresight.rst
> +++ b/Documentation/trace/coresight/coresight.rst
> @@ -130,7 +130,7 @@ Misc:
> Device Tree Bindings
> --------------------
>
> -See Documentation/devicetree/bindings/arm/arm,coresight-\*.yaml for details.
> +See ``Documentation/devicetree/bindings/arm/arm,coresight-*.yaml`` for details.
>
> As of this writing drivers for ITM, STMs and CTIs are not provided but are
> expected to be added as the solution matures.