Some HW has static trace id which cannot be changed via
software programming. For this case, configure the trace id
in device tree with "arm,static-trace-id = <xxx>", and
call coresight_trace_id_get_static_system_id with the trace id value
in device probe function. The id will be reserved for the HW
all the time if the device is probed.
Changes since V3:
1. Adda new API function
int coresight_trace_id_get_system_static_id(int trace_id).
2. Use the term "static trace id" for these devices where
the hardware sets a non-programmable trace ID.
Changes since V2:
1. Change "trace-id" to "arm,trace-id".
2. Add trace id flag for getting preferred id or ODD id.
Changes since V1:
1. Add argument to coresight_trace_id_get_system_id for preferred id
instead of adding new function coresight_trace_id_reserve_system_id.
2. Add constraint to trace-id in dt-binding file.
Mao Jinlong (3):
dt-bindings: arm: Add arm,trace-id for coresight dummy source
coresight: Add support to get static id for system trace sources
coresight: dummy: Add static trace id support for dummy source
.../sysfs-bus-coresight-devices-dummy-source | 15 +++++
.../arm/arm,coresight-dummy-source.yaml | 6 ++
drivers/hwtracing/coresight/coresight-dummy.c | 59 +++++++++++++++++--
.../hwtracing/coresight/coresight-platform.c | 26 ++++++++
.../hwtracing/coresight/coresight-trace-id.c | 38 ++++++++----
.../hwtracing/coresight/coresight-trace-id.h | 9 +++
include/linux/coresight.h | 1 +
7 files changed, 140 insertions(+), 14 deletions(-)
create mode 100644 Documentation/ABI/testing/sysfs-bus-coresight-devices-dummy-source
--
2.41.0
This will allow sessions with more than CORESIGHT_TRACE_IDS_MAX ETMs
as long as there are fewer than that many ETMs connected to each sink.
Each sink owns its own trace ID map, and any Perf session connecting to
that sink will allocate from it, even if the sink is currently in use by
other users. This is similar to the existing behavior where the dynamic
trace IDs are constant as long as there is any concurrent Perf session
active. It's not completely optimal because slightly more IDs will be
used than necessary, but the optimal solution involves tracking the PIDs
of each session and allocating ID maps based on the session owner. This
is difficult to do with the combination of per-thread and per-cpu modes
and some scheduling issues. The complexity of this isn't likely to worth
it because even with multiple users they'd just see a difference in the
ordering of ID allocations rather than hitting any limits (unless the
hardware does have too many ETMs connected to one sink).
Per-thread mode works but only until there are any overlapping IDs, at
which point Perf will error out. Both per-thread mode and sysfs mode are
left to future changes, but both can be added on top of this initial
implementation and only sysfs mode requires further driver changes.
The HW_ID version field hasn't been bumped in order to not break Perf
which already has an error condition for other values of that field.
Instead a new minor version has been added which signifies that there
are new fields but the old fields are backwards compatible.
Changes since v5:
* Hide queue number printout behind -v option
* Style change in cs_etm__process_aux_output_hw_id()
* Move new format enum to an earlier commit to reduce churn
Changes since v4:
* Fix compilation failure when TRACE_ID_DEBUG is set
* Expand comment about not freeing individual trace IDs in
free_event_data()
Changes since v3:
* Fix issue where trace IDs were overwritten by possibly invalid ones
by Perf in unformatted mode. Now the HW_IDs are also used for
unformatted mode unless the kernel didn't emit any.
* Add a commit to check the OpenCSD version.
* Add a commit to not save invalid IDs in the Perf header.
* Replace cs_etm_queue's formatted and formatted_set members with a
single enum which is easier to use.
* Drop CORESIGHT_TRACE_ID_UNUSED_FLAG as it's no longer needed.
* Add a commit to print the queue number in the raw dump.
* Don't assert on the number of unformatted decoders if decoders == 0.
Changes since v2:
* Rebase on coresight-next 6.10-rc2 (b9b25c8496).
* Fix double free of csdev if device registration fails.
* Fix leak of coresight_trace_id_perf_start() if trace ID allocation
fails.
* Don't resend HW_ID for sink changes in per-thread mode. The existing
CPU field on AUX records can be used to track this instead.
* Tidy function doc for coresight_trace_id_release_all()
* Drop first two commits now that they are in coresight-next
* Add a commit to make the trace ID spinlock local to the map
Changes since V1:
* Rename coresight_device.perf_id_map to perf_sink_id_map.
* Instead of outputting a HW_ID for each reachable ETM, output
the sink ID and continue to output only the HW_ID once for
each mapping.
* Keep the first two Perf patches so that it applies cleanly
on coresight-next, although they have been applied on perf-tools-next
* Add new *_map() functions to the trace ID public API instead of
modifying existing ones.
* Collapse "coresight: Pass trace ID map into source enable" into
"coresight: Use per-sink trace ID maps for Perf sessions" because the
first commit relied on the default map being accessible which is no
longer necessary due to the previous bullet point.
James Clark (17):
perf: cs-etm: Create decoders after both AUX and HW_ID search passes
perf: cs-etm: Allocate queues for all CPUs
perf: cs-etm: Move traceid_list to each queue
perf: cs-etm: Create decoders based on the trace ID mappings
perf: cs-etm: Only save valid trace IDs into files
perf: cs-etm: Support version 0.1 of HW_ID packets
perf: cs-etm: Print queue number in raw trace dump
perf: cs-etm: Add runtime version check for OpenCSD
coresight: Remove unused ETM Perf stubs
coresight: Clarify comments around the PID of the sink owner
coresight: Move struct coresight_trace_id_map to common header
coresight: Expose map arguments in trace ID API
coresight: Make CPU id map a property of a trace ID map
coresight: Use per-sink trace ID maps for Perf sessions
coresight: Remove pending trace ID release mechanism
coresight: Emit sink ID in the HW_ID packets
coresight: Make trace ID map spinlock local to the map
drivers/hwtracing/coresight/coresight-core.c | 37 +-
drivers/hwtracing/coresight/coresight-dummy.c | 3 +-
.../hwtracing/coresight/coresight-etm-perf.c | 43 +-
.../hwtracing/coresight/coresight-etm-perf.h | 18 -
.../coresight/coresight-etm3x-core.c | 9 +-
.../coresight/coresight-etm4x-core.c | 9 +-
drivers/hwtracing/coresight/coresight-priv.h | 1 +
drivers/hwtracing/coresight/coresight-stm.c | 3 +-
drivers/hwtracing/coresight/coresight-sysfs.c | 3 +-
.../hwtracing/coresight/coresight-tmc-etr.c | 5 +-
drivers/hwtracing/coresight/coresight-tmc.h | 5 +-
drivers/hwtracing/coresight/coresight-tpdm.c | 3 +-
.../hwtracing/coresight/coresight-trace-id.c | 138 ++--
.../hwtracing/coresight/coresight-trace-id.h | 70 +-
include/linux/coresight-pmu.h | 17 +-
include/linux/coresight.h | 21 +-
tools/build/feature/test-libopencsd.c | 4 +-
tools/include/linux/coresight-pmu.h | 17 +-
tools/perf/Makefile.config | 2 +-
tools/perf/arch/arm/util/cs-etm.c | 11 +-
.../perf/util/cs-etm-decoder/cs-etm-decoder.c | 49 +-
.../perf/util/cs-etm-decoder/cs-etm-decoder.h | 3 +-
.../util/cs-etm-decoder/cs-etm-min-version.h | 13 +
tools/perf/util/cs-etm.c | 629 +++++++++++-------
tools/perf/util/cs-etm.h | 12 +-
25 files changed, 650 insertions(+), 475 deletions(-)
create mode 100644 tools/perf/util/cs-etm-decoder/cs-etm-min-version.h
--
2.34.1
In our hardware design, by combining a funnel and a replicator, it
implement a hardware device with one-to-one correspondence between
output ports and input ports. The programming usage on this device
is the same as funnel. The software uses a funnel and a static
replicator to implement the driver of this device. Since original
funnels only support a single output connection and original
replicator only support a single input connection, the code needs
to be modified to support this new feature. The following is a
typical topology diagram of multi-port output mechanism.
|----------| |---------| |----------| |---------|
| TPDM 0 | | Source0 | | Source 1 | | TPDM 1 |
|----------| |---------| |----------| |---------|
| | | |
| | | |
| --------- | | |
| | | |
| | | |
| | | |
\-------------/ ---------------------- |
\ Funnel 0 / | |
----------- | ------------------------------
| | |
| | |
\------------------/
\ Funnel 1 / ----|
\--------------/ |
| |----> Combine a funnel and a
| | static replicator
/-----------------\ |
/ replicator 0 \ ----|
/---------------------\
| | |
| | |-----------|
| |---------| |
| |TPDM0 |TPDM1
| \-----------------/
| \ TPDA 0 /
| \-------------/
| |
| |
|Source0/1 |
\-------------------------------/
\ Funnel 2 /
\---------------------------/
Changes in V2:
1. Change the reference for endpoint property in dt-binding.
-- Krzysztof Kozlowski
2. Change the property name "filter_src" to "filter-src".
-- Krzysztof Kozlowski
3. Fix the errors in running 'make dt_binding_check'.
-- Rob Herring
4. Pass in the source parameter instead of path.
-- Suzuki K Poulose
5. Reset the "filter_src_dev" if the "src" csdev is being removed.
-- Suzuki K Poulose
6. Add a warning if the "filter_src_dev" is of not the
type DEV_TYPE_SOURCE.
-- Suzuki K Poulose
7. Optimize the procedure for handling all possible cases.
-- Suzuki K Poulose
Changes in V1:
1. Add a static replicator connect to a funnel to implement the
correspondence between the output ports and the input ports on
funnels.
-- Suzuki K Poulose
2. Add filter_src_dev and filter_src_dev phandle to
"coresight_connection" struct, and populate them if there is one.
-- Suzuki K Poulose
3. To look at the phandle and then fixup/remove the filter_src
device in fixup/remove connections.
-- Suzuki K Poulose
4. When TPDA reads DSB/CMB element size, it is implemented by
looking up filter src device in the connections.
-- Suzuki K Poulose
Tao Zhang (3):
dt-bindings: arm: qcom,coresight-static-replicator: Add property for
source filtering
coresight: Add source filtering for multi-port output
coresight-tpda: Optimize the function of reading element size
.../arm/arm,coresight-static-replicator.yaml | 19 ++-
drivers/hwtracing/coresight/coresight-core.c | 125 ++++++++++++++++--
.../hwtracing/coresight/coresight-platform.c | 18 +++
drivers/hwtracing/coresight/coresight-tpda.c | 3 +-
include/linux/coresight.h | 5 +
5 files changed, 155 insertions(+), 15 deletions(-)
--
2.17.1
With current design, the name of the non-cpu bounded coresight
component is the device type with the number. And with 'ls' command
we can get the register address of the component. But from these
information, we can't know what the HW or system the component belongs
to. Add device-name in DT to support it.
cti_sys0 -> ../../../devices/platform/soc(a)0/138f0000.cti/cti_sys0
cti_sys1 -> ../../../devices/platform/soc(a)0/13900000.cti/cti_sys1
tpdm0 -> ../../../devices/platform/soc(a)0/10b0d000.tpdm/tpdm0
tpdm1 -> ../../../devices/platform/soc(a)0/10c28000.tpdm/tpdm1
tpdm2 -> ../../../devices/platform/soc(a)0/10c29000.tpdm/tpdm2
Change since V3:
1. Change device-name to arm,cs-dev-name.
2. Add arm,cs-dev-name to only CTI and sources' dt-binding.
Change since V2:
1. Fix the error in coresight core.
drivers/hwtracing/coresight/coresight-core.c:1775:7: error: assigning to 'char *' from 'const char *' discards qualifiers
2. Fix the warning when run dtbinding check.
Documentation/devicetree/bindings/arm/arm,coresight-cpu-debug.yaml: device-name: missing type definition
Change since V1:
1. Change coresight-name to device name.
2. Add the device-name in coresight dt bindings.
Mao Jinlong (2):
coresight: core: Add device name support
dt-bindings: arm: Add device-name in the coresight components
.../bindings/arm/arm,coresight-catu.yaml | 6 +++
.../bindings/arm/arm,coresight-cpu-debug.yaml | 6 +++
.../bindings/arm/arm,coresight-cti.yaml | 6 +++
.../arm/arm,coresight-dummy-sink.yaml | 6 +++
.../arm/arm,coresight-dummy-source.yaml | 6 +++
.../arm/arm,coresight-dynamic-funnel.yaml | 6 +++
.../arm/arm,coresight-dynamic-replicator.yaml | 6 +++
.../bindings/arm/arm,coresight-etb10.yaml | 6 +++
.../bindings/arm/arm,coresight-etm.yaml | 6 +++
.../arm/arm,coresight-static-funnel.yaml | 6 +++
.../arm/arm,coresight-static-replicator.yaml | 6 +++
.../bindings/arm/arm,coresight-stm.yaml | 6 +++
.../bindings/arm/arm,coresight-tmc.yaml | 6 +++
.../bindings/arm/arm,coresight-tpiu.yaml | 6 +++
.../bindings/arm/qcom,coresight-tpda.yaml | 6 +++
.../bindings/arm/qcom,coresight-tpdm.yaml | 6 +++
drivers/hwtracing/coresight/coresight-core.c | 37 ++++++++++---------
.../hwtracing/coresight/coresight-platform.c | 31 ++++++++++++++++
include/linux/coresight.h | 3 +-
19 files changed, 149 insertions(+), 18 deletions(-)
Mao Jinlong (2):
dt-bindings: arm: Add device-name in the coresight components
coresight: core: Add device name support
.../bindings/arm/arm,coresight-cti.yaml | 6 +++
.../arm/arm,coresight-dummy-source.yaml | 6 +++
.../bindings/arm/arm,coresight-stm.yaml | 6 +++
.../bindings/arm/qcom,coresight-tpdm.yaml | 6 +++
drivers/hwtracing/coresight/coresight-core.c | 37 ++++++++++---------
.../hwtracing/coresight/coresight-platform.c | 30 +++++++++++++++
include/linux/coresight.h | 3 +-
7 files changed, 76 insertions(+), 18 deletions(-)
--
2.41.0
On Mon, Jul 29, 2024 at 09:48:57AM +0100, Leo Yan wrote:
> On 7/25/2024 4:40 PM, Adrian Hunter wrote:
> > On 25/07/24 09:46, Leo Yan wrote:
> >> When finished to read AUX trace data from mmaped buffer, based on the
> >
> > Here and elsewhere 'mmapped' is more common than 'mmaped' so maybe:
> >
> > mmaped -> mmapped
>
> Will fix.
>
> >> AUX buffer index the core layer needs to search the corresponding PMU
> >> event and re-enable it to continue tracing.
> >>
> >> However, current code only searches the first AUX event. It misses to
> >> search other enabled AUX events, thus, it returns failure if the buffer
> >> index does not belong to the first AUX event.
> >>
> >> This patch extends the auxtrace_record__read_finish() function to
> >> search for every enabled AUX events, so all the mmaped buffer indexes
> >> can be covered.
> >
> > Looking at this again, a couple more things came to mind - see below.
> >
> >>
> >> Signed-off-by: Leo Yan <leo.yan(a)arm.com>
> >> ---
> >> tools/perf/util/auxtrace.c | 25 ++++++++++++++++++++-----
> >> 1 file changed, 20 insertions(+), 5 deletions(-)
> >>
> >> diff --git a/tools/perf/util/auxtrace.c b/tools/perf/util/auxtrace.c
> >> index b99e72f7da88..61835a6a9ea3 100644
> >> --- a/tools/perf/util/auxtrace.c
> >> +++ b/tools/perf/util/auxtrace.c
> >> @@ -670,18 +670,33 @@ static int evlist__enable_event_idx(struct evlist *evlist, struct evsel *evsel,
> >> int auxtrace_record__read_finish(struct auxtrace_record *itr, int idx)
> >> {
> >> struct evsel *evsel;
> >> + int ret = -EINVAL;
> >>
> >> - if (!itr->evlist || !itr->pmu)
> >> + if (!itr->evlist)
> >> return -EINVAL;
> >>
> >> evlist__for_each_entry(itr->evlist, evsel) {
> >> - if (evsel->core.attr.type == itr->pmu->type) {
> >> + if (evsel__is_aux_event(evsel)) {
> >> if (evsel->disabled)
> >> - return 0;
> >> - return evlist__enable_event_idx(itr->evlist, evsel, idx);
> >> + continue;
> >
> > That will make the evsel->disabled case an error, which
> > might be a problem. Possibly the event can be disabled
> > (e.g. via control fifo) but still have data to read out.
>
> If so, we need to extend evlist__enable_event_idx() or create a new function
> to check if the memory index is belonged to an evsel. If the idx is found for
> an evsel, then we can check the evsel->disabled flag.
>
> >> + /*
> >> + * Multiple AUX events might be opened in a session.
> >> + * Bail out for success case as the AUX event has been
> >> + * found and enabled, otherwise, continue to check if
> >> + * the next AUX event can cover the mmaped buffer with
> >> + * 'idx'.
> >> + */
> >
> > Thinking about this some more, raised some questions:
> >
> > How do we know there is only one AUX event per mmap?
>
> On my test platform, there have two Arm SPE events, the first one's cpumask is
> 2-5 and the second SPE's cpumask is 6-7. The AUX events do not intersect CPU
> maps. Therefore, a mmapped AUX buffer only binds to a AUX event.
>
> I think we can add a checking in the function record__auxtrace_init(). After
> it calls auxtrace_record__init(), we can report failure if the AUX events have
> the overlapped cpumask.
>
> > They would have to be on different CPUs for that to be true?
>
> Yes.
>
> > And wouldn't --per-thread have all AUX events in every mmap?
>
> Before I roughly tested '--per-thread' mode and did not see issue. But this
> time I tested '--per-thread' mode and found the failure by the kernel checking
> [1] - it does not allow the different AUX events to bind to the same FD.
>
> Here I need to dig a bit for two options, either we need to fix the perf
> tool to open multiple AUX events for '--per-thread' mode, or remove the
> kernel's checking to allow different AUX events to bind to same FD.
>
> Thanks a lot for review!
Ok, the two patches from Adrian are in, I'll now wait for you to refresh
this series,
Thanks,
- Arnaldo
On Fri, Jul 26, 2024 at 07:00:55PM +0300, Adrian Hunter wrote:
> On 26/07/24 17:41, Arnaldo Carvalho de Melo wrote:
> > On Thu, Jul 18, 2024 at 06:06:16PM +0300, Adrian Hunter wrote:
> >> On 18/07/24 15:58, Peter Zijlstra wrote:
> >>> On Thu, Jul 18, 2024 at 01:51:26PM +0200, Peter Zijlstra wrote:
> >>>
> >>>> OK, let me do that and make a few more edits and see if I can stare at
> >>>> that next patch some.
> >>>
> >>> I pushed out a stack of patches into queue.git perf/core
> >>> Could you please double check I didn't wreck anything?
> >>
> >> Looks fine, and seems to work OK in a brief test.
> >>
> >> Thank you! :-)
> >
> > So should I go ahead and pick the tooling patches since the kernel bits
> > are merged?
>
> Not exactly merged. Probably should wait until it is in tip at least.
Ok, so I get just these, as you asked on another message:
acme@x1:~/git/perf-tools-next$ git log --oneline -5 perf-tools-next/tmp.perf-tools-next
9140fec01b2de8d3 (HEAD -> perf-tools-next, perf-tools-next/tmp.perf-tools-next, perf-tools-next.korg/tmp.perf-tools-next, number/perf-tools-next, acme.korg/tmp.perf-tools-next) perf tools: Enable evsel__is_aux_event() to work for S390_CPUMSF
c3b7dba6ea81a5b1 perf tools: Enable evsel__is_aux_event() to work for ARM/ARM64
866400c0b08ef9d9 perf scripts python cs-etm: Restore first sample log in verbose mode
08ee74eb03e37191 perf cs-etm: Output 0 instead of 0xdeadbeef when exception packets are flushed
c22dd7ec2b2808b2 perf inject: Convert comma to semicolon
acme@x1:~/git/perf-tools-next$
It'll go to perf-tools-next once 6.11-rc1 is out.
- Arnaldo
On Tue, Jul 23, 2024 at 12:09:46PM +0300, Adrian Hunter wrote:
> On 23/07/24 11:26, Leo Yan wrote:
> > On 7/15/2024 5:07 PM, Adrian Hunter wrote:
> >>
> >> evsel__is_aux_event() identifies AUX area tracing selected events.
> >>
> >> S390_CPUMSF uses a raw event type (PERF_TYPE_RAW - refer
> >> s390_cpumsf_evsel_is_auxtrace()) not a PMU type value that could be checked
> >> in evsel__is_aux_event(). However it sets needs_auxtrace_mmap (refer
> >> auxtrace_record__init()), so check that first.
> >>
> >> Currently, the features that use evsel__is_aux_event() are used only by
> >> Intel PT, but that may change in the future.
> >>
> >> Signed-off-by: Adrian Hunter <adrian.hunter(a)intel.com>
> >> Acked-by: Ian Rogers <irogers(a)google.com>
> >> Reviewed-by: Andi Kleen <ak(a)linux.intel.com>
> >
> > Reviewed-by: Leo Yan <leo.yan(a)arm.com>
>
> Namhyung, could we get patches 5 and 6 from this series
> applied? They are independent and Leo's new patch set is
> dependent on patch 5.
I'm getting those two into tmp.perf-tools-next, probably should pick the
rest as peterz has the kernel bits already in his queue.git/perf/core,
right?
- Arnaldo
> >
> >> ---
> >> tools/perf/util/pmu.c | 6 +++++-
> >> 1 file changed, 5 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/tools/perf/util/pmu.c b/tools/perf/util/pmu.c
> >> index 986166bc7c78..0b38c51bd6eb 100644
> >> --- a/tools/perf/util/pmu.c
> >> +++ b/tools/perf/util/pmu.c
> >> @@ -1199,8 +1199,12 @@ void perf_pmu__warn_invalid_formats(struct perf_pmu *pmu)
> >>
> >> bool evsel__is_aux_event(const struct evsel *evsel)
> >> {
> >> - struct perf_pmu *pmu = evsel__find_pmu(evsel);
> >> + struct perf_pmu *pmu;
> >>
> >> + if (evsel->needs_auxtrace_mmap)
> >> + return true;
> >> +
> >> + pmu = evsel__find_pmu(evsel);
> >> return pmu && pmu->auxtrace;
> >> }
> >>
> >> --
> >> 2.34.1
> >>
> >>
On Thu, Jul 18, 2024 at 06:06:16PM +0300, Adrian Hunter wrote:
> On 18/07/24 15:58, Peter Zijlstra wrote:
> > On Thu, Jul 18, 2024 at 01:51:26PM +0200, Peter Zijlstra wrote:
> >
> >> OK, let me do that and make a few more edits and see if I can stare at
> >> that next patch some.
> >
> > I pushed out a stack of patches into queue.git perf/core
> > Could you please double check I didn't wreck anything?
>
> Looks fine, and seems to work OK in a brief test.
>
> Thank you! :-)
So should I go ahead and pick the tooling patches since the kernel bits
are merged?
- Arnaldo