perf cs-etm module converts decoder elements to packets and then we have
more context crossing packets to generate synthenize samples, finally
perf tool can faciliate samples for statistics and report the results.
This patch series is to address several issues found related with
packets handling and samples generation when worked firstly on branch
sample flags support for Arm CoreSight trace data, so this patch series
is dependency for sample flags setting, will send another dedicated
patch series for sample flags later.
In this patch series, the first two patches are mainly to fix issues in
cs_etm__flush(): patch 0001 corrects packets swapping in cs_etm__flush()
and this can fix the wrong branch sample caused by the missed packets
swapping; patch 0002 is to fix the wrong samples generation with stale
packets at the end of trace block.
Patch 0003 is to rename CS_ETM_TRACE_ON to CS_ETM_DISCONTINUITY, we use
a more general packet type to present trace discontinuity, so it can be
used by TRACE_ON event, and also can be used by NO_SYNC and EO_TRACE
elements.
Patch 0004 is used to support NO_SYNC packet, otherwise the trace
decoding cannot reflect the tracing discontinuity caused by NO_SYNC
packet.
Patch 0005 is used to support EO_TRACE packet, which also introduces
the tracing discontinuity at the end of trace and we should save last
trace data for it.
Patch 0006 is used to generate branch sample for exception packets.
This patch series is applied on the acme's perf/core branch [1] with
latest commit 4085fed6373f ("perf trace: Add ordered processing");
Since Rob's patch 'perf: Support for Arm A32/T32 instruction sets in
CoreSight trace' has been merged into perf/core branch, this patch
series can directly be applied onto perf/core branch.
With applying the dependency patch, this patch series has been tested
for branch samples dumping with below command on Juno board:
# perf script -F,-time,+ip,+sym,+dso,+addr,+symoff -k vmlinux
Changes from v1:
* Synced the consistent code in patch 0001 for condition checking.
* Introduced new function cs_etm__end_block() for flushing packet
at the end of trace block.
* Added new patch 0003 to rename CS_ETM_TRACE_ON to
CS_ETM_DISCONTINUITY.
* Used the same one packet type CS_ETM_DISCONTINUITY for all
trace discontinuity (include support TRACE_ON/EO_TRACE/NO_SYNC
packets).
* Removed tracking exception number patch, which will be added in
sample flag patch series.
Leo Yan (6):
perf cs-etm: Correct packets swapping in cs_etm__flush()
perf cs-etm: Avoid stale branch samples when flush packet
perf cs-etm: Rename CS_ETM_TRACE_ON to CS_ETM_DISCONTINUITY
perf cs-etm: Treat NO_SYNC element as trace discontinuity
perf cs-etm: Treat EO_TRACE element as trace discontinuity
perf cs-etm: Generate branch sample for exception packet
tools/perf/util/cs-etm-decoder/cs-etm-decoder.c | 40 +++++++++----
tools/perf/util/cs-etm-decoder/cs-etm-decoder.h | 10 ++--
tools/perf/util/cs-etm.c | 77 ++++++++++++++++++++++---
3 files changed, 102 insertions(+), 25 deletions(-)
--
2.7.4
Patch release incorporating build dependency updates from pull request #14
Minor change to auto-fdo document.
No functionality changes.
--
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK
Hi Leo,
This information should not be added to the library here - for a number of
reasons:-
1) It adds a type that is not actually used in the library - and a
maintenance burden that is unrelated to the library.
2) It adds another compile time dependence between perf and the version of
the library installed.
3) Exception number mapping to type of exception differs between trace
protocols - for example exception number values output for ETMv3 differ
from those used in ETMv4 - PE reset is 0b1000 in ETMv3, 0b00000 in ETMv4.
This is why we output the exception number rather than type in the generic
packets. Clients can map an exception number to particular type as they
will know the trace protocol and core architecture.
My recommendation is that the exception type mapping if required by perf is
localised to the perf etm decoder code - cs-etm.h or cs-etm-decoder.h - and
care must be taken to map exception types according to underlying protocol
as well as number.
Regards
Mike
On Mon, 10 Dec 2018 at 05:14, Leo Yan <notifications(a)github.com> wrote:
> Add enumeration for exception number in header file, this can be used
> for Linux perf tool building to support sample flags setting.
>
> Signed-off-by: Leo Yan leo.yan(a)linaro.org
> ------------------------------
> You can view, comment on, or merge this pull request online at:
>
> https://github.com/Linaro/OpenCSD/pull/15
> Commit Summary
>
> - opencsd: Add enumeration for exception number
>
> File Changes
>
> - *M* decoder/include/opencsd/ocsd_if_types.h
> <https://github.com/Linaro/OpenCSD/pull/15/files#diff-0> (16)
>
> Patch Links:
>
> - https://github.com/Linaro/OpenCSD/pull/15.patch
> - https://github.com/Linaro/OpenCSD/pull/15.diff
>
> —
> You are receiving this because you are subscribed to this thread.
> Reply to this email directly, view it on GitHub
> <https://github.com/Linaro/OpenCSD/pull/15>, or mute the thread
> <https://github.com/notifications/unsubscribe-auth/AMvws3K9wHZ_EjfD42kq1704q…>
> .
>
--
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK
The latest ARM CoreSight specification updates the component identification
requirements for all components attached to an AMBA bus. (ARM IHI 0029E)
This specification defines bits 15:12 in the ComponentID (CID) value as the
device class. Identification requirements now depend on this class.
Class 0xF: Traditional components identified by Peripheral ID (PID) only.
Class 0x9: CoreSight components may be identified by a Universal Component
Identifier (UCI) consisting of the PID plus CoreSight DevType and DevArch
values.
Current and future ARM CoreSight IP will now use the same PID for
components on the same function - e.g. the ETM, CTI, PMU and Debug elements
associated with a core. The first core to use this UCI method is the A35,
which currently has binding entries in the ETMv4 driver.
This patchset prepares for the addition of the upcoming CTI driver, which
will need to correctly bind with A35 and future hardware, while overcoming
the limitation of binding by PID alone, which cannot now work.
The patchset updates the current AMBA Identification mechanism, which was
already differentiating between 0xF and 0x9 CIDs, to add
additional UCI compliant tests for the for the 0x9 device class.
Additional UCI structures are provided and added to the ETMv4 driver as
appropriate.
Changes since v2:
Simplification of amba_cs_uci_id_match().
Fix CID class bitfield comments.
Dropped RFC tag on patchset.
Mike Leach (2):
drivers: amba: Updates to component identification for driver
matching.
coresight: etmv4: Update ID register table to add UCI support
drivers/amba/bus.c | 45 +++++++++++++++----
drivers/hwtracing/coresight/coresight-etm4x.c | 18 +++++++-
include/linux/amba/bus.h | 32 +++++++++++++
3 files changed, 86 insertions(+), 9 deletions(-)
--
2.19.1
perf cs-etm module converts decoder elements to packets and then we have
more context crossing packets to generate synthenize samples, finally
perf tool can faciliate samples for statistics and report the results.
This patch series is to address several issues found related with
packets handling and samples generation when worked firstly on branch
sample flags support for Arm CoreSight trace data, so this patch series
also is dependency for another patch series for sample flags.
The first two patches are mainly to fix issues in cs_etm__flush():
Patch 0001 corrects packets swapping in cs_etm__flush() and this can fix
the wrong branch sample caused by the missed packets swapping; patch
0002 is to fix the wrong samples generation with stale packets at the
end of every trace buffer.
Patch 0003 is used to support NO_SYNC packet, otherwise the trace
decoding cannot reflect the tracing discontinuity caused by NO_SYNC
packet.
Patch 0004/0005 has been published in the patch series 'perf cs-etm: Add
support for sample flags' before but at this time I move them into this
patch series due these two patches are more relative with packets
handling. Patch 0004 is used to generate branch sample for exception
packets; and patch 0005 is to track the exception number.
This patch series is applied on the acme's perf core branch [1] with the
latest commit f1d23afaf677 ("perf bpf: Reduce the hardcoded .max_entries
for pid_maps") and has one prerequisite from Rob's patch 'perf: Support
for Arm A32/T32 instruction sets in CoreSight trace' [2].
With applying the dependency patch, this patch series has been tested
for branch samples dumping with below command on Juno board:
# perf script -F,-time,+ip,+sym,+dso,+addr,+symoff -k vmlinux
[1] https://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git/log/?h=perf/…
[2] http://archive.armlinux.org.uk/lurker/message/20181109.091126.9d69489d.en.h…
Leo Yan (5):
perf cs-etm: Correct packets swapping in cs_etm__flush()
perf cs-etm: Avoid stale branch samples when flush packet
perf cs-etm: Support for NO_SYNC packet
perf cs-etm: Generate branch sample for exception packet
perf cs-etm: Track exception number
tools/perf/util/cs-etm-decoder/cs-etm-decoder.c | 91 ++++++++++++++++++++++---
tools/perf/util/cs-etm-decoder/cs-etm-decoder.h | 11 +--
tools/perf/util/cs-etm.c | 65 +++++++++++++++---
3 files changed, 146 insertions(+), 21 deletions(-)
--
2.7.4
This patch seris adds support for sample flags so can facilitate perf
to print sample flags for branch instruction.
The patch 0001 is to set branch instruction flags in packet, this
patch has the core code in this series to set flags according to the
decoding element type, and also based on the elements including
instruction type, subtype and condition flag to help making decision
to set flags value.
The patch 0002 is to support sample flags by copying the flags value
from packet structure to sample structure, and it includes three fixing
up for TRACE_ON/TRACE_OFF and exception packets.
The patch series is based on OpenCSD v0.10.0 and Rob's patch 'perf:
Support for Arm A32/T32 instruction sets in CoreSight trace' also is
prerequisite to support A32/T32 ISAs.
This patch series is applied on the acme's perf core branch [1] with the
latest commit f1d23afaf677 ("perf bpf: Reduce the hardcoded .max_entries
for pid_maps") and has two prerequisites:
1) It's dependent on Rob's patch 'perf: Support for Arm A32/T32
instruction sets in CoreSight trace' [2];
2) It's dependent on another patch series 'perf cs-etm: Correct packets
handling' [3].
After applying the dependency patches and this patch series, we can
verify sample flags with below command:
# perf script -F,-time,+flags,+ip,+sym,+dso,+addr,+symoff -k vmlinux
Changes from v1:
* Moved exception packets handling patches into patch series 'perf
cs-etm: Correct packets handling'.
* Added sample flags fixing up for TRACE_OFF packet.
* Created a new function which is used to maintain flags fixing up.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git/log/?h=perf/…
[2] http://archive.armlinux.org.uk/lurker/message/20181109.091126.9d69489d.en.h…
[3] http://archive.armlinux.org.uk/lurker/message/20181111.045938.782b378b.en.h…
Leo Yan (2):
perf cs-etm: Set branch instruction flags in packet
perf cs-etm: Add support sample flags
tools/perf/util/cs-etm-decoder/cs-etm-decoder.c | 168 ++++++++++++++++++++++++
tools/perf/util/cs-etm-decoder/cs-etm-decoder.h | 1 +
tools/perf/util/cs-etm.c | 43 +++++-
3 files changed, 210 insertions(+), 2 deletions(-)
--
2.7.4