CoreSight

coresight@lists.linaro.org

7 participants
2472 discussions

[PATCH v4 0/3] coresight-tnoc: Add support for Interconnect TNOC

by Yuanfang Zhang

This patch series adds support for the Qualcomm CoreSight Interconnect TNOC (Trace Network On Chip) block, which acts as a CoreSight graph link forwarding trace data from subsystems to the Aggregator TNOC. Unlike the Aggregator TNOC, this block does not support aggregation or ATID assignment. Signed-off-by: Yuanfang Zhang <yuanfang.zhang(a)oss.qualcomm.com> --- Changes in v4: - Fix unintended blank line removals in trace_noc_enable_hw. - Link to v3: https://lore.kernel.org/r/20250828-itnoc-v3-0-f1b55dea7a27@oss.qualcomm.com Changes in v3: - Add detail for changes in V2. - Remove '#address-cells' and '#size-cells' properties from in-ports field. - Fix comment indentation for packet description. - Link to v2: https://lore.kernel.org/r/20250819-itnoc-v2-0-2d0e6be44e2f@oss.qualcomm.com Changes in v2: - Removed the trailing '|' after the description in qcom,coresight-itnoc.yaml. - Dropped the 'select' section from the YAML file. - Updated node name to use a more generic naming convention. - Removed the 'items' property from the compatible field. - Deleted the description for the reg property. - Dropped clock-names and adjusted the order of clock-names and clocks. - Moved additionalProperties to follow the $ref of out-ports. - Change "atid" type from u32 to int, set it as "-EOPNOTSUPP" for non-AMBA device. - Link to v1: https://lore.kernel.org/r/20250815-itnoc-v1-0-62c8e4f7ad32@oss.qualcomm.com --- Yuanfang Zhang (3): dt-bindings: arm: qcom: Add Coresight Interconnect TNOC coresight-tnoc: add platform driver to support Interconnect TNOC coresight-tnoc: Add runtime PM support for Interconnect TNOC .../bindings/arm/qcom,coresight-itnoc.yaml | 90 ++++++++++++++ drivers/hwtracing/coresight/coresight-tnoc.c | 136 +++++++++++++++++++-- 2 files changed, 215 insertions(+), 11 deletions(-) --- base-commit: 2b52cf338d39d684a1c6af298e8204902c026aca change-id: 20250815-itnoc-460273d1b80c Best regards, -- Yuanfang Zhang <yuanfang.zhang(a)oss.qualcomm.com>

5 hours, 1 minute

Re: [PATCH v3] coresight: Fix possible deadlock in coresight_panic_cb

by Leo Yan

On Tue, Sep 16, 2025 at 12:51:11PM -0400, Sean Anderson wrote: > On 9/16/25 12:48, Leo Yan wrote: > > On Tue, Sep 16, 2025 at 12:14:40PM -0400, Sean Anderson wrote: > > > > [...] > > > >> > Could you check if the drafted patch below looks good to you? If so, I > >> > >> As stated above I disagree with a half-hearted removal. If you want to do that, > >> then I will resend v2 done with an rcu list and you can make your own follow-up. > > > > It is fine to disagree, but please don't resend v2 :) > > > > We have plan to refactor locking in CoreSight driver, I will try my > > best to avoid adding new lock unless with a strong reason. > > As said above it will be done with an rcu list, so no new lock. > > Or I can do this patch but stick the notifier block in csdev as suggested by Suzuki. I am fine for adding the notifier block in csdev. Suzuki, could you confirm if this is the right way to move forward? Thanks, Leo

14 hours, 57 minutes

Re: [PATCH v3] coresight: Fix possible deadlock in coresight_panic_cb

by Leo Yan

On Mon, Sep 15, 2025 at 10:31:24AM -0400, Sean Anderson wrote: > On 9/15/25 05:58, Leo Yan wrote: > > On Fri, Sep 12, 2025 at 11:13:14AM -0400, Sean Anderson wrote: > >> coresight_panic_cb is called with interrupts disabled during panics. > >> However, bus_for_each_dev calls bus_to_subsys which takes > >> bus_kset->list_lock without disabling IRQs. This may cause a deadlock. > > > > I would rephrase it to make it clearer for anyone reading it later: > > > > coresight_panic_cb() is called during panics, which can preempt a flow > > that triggers exceptions (such as data or instruction aborts). > > I don't see what exceptions have to do with it. You can also panic > during a regular interrupt. The commit mentioned "without disabling IRQs" gives the impression that the deadlock is caused by IRQ-unsafe locking, which might mislead into thinking why the issue cannot be fixed with IRQ-safe locking. Regardless of whether IRQs are disabled, and regardless of the context (interrupt, bottom-half, or normal thread), the conditions for the deadlock are only about: (a) The bus lock has been acquired; (b) A panic is triggered to try to acquire the same lock. [...] > > When I review this patch, I recognize we can consolidate panic notifier > > in coresight-tmc-core.c, so we don't need to distribute the changes > > into ETF and ETR drivers (sorry if I misled you in my previous reply). > > And this kind of thing is why I went with the straightforward fix > initially. I do not want to bikeshed the extent that this gets removed. > IMO the whole "panic ops" stuff should be done directly with the panic > notifier, hence this patch. If you do not agree with that, then ack v2 > and send a follow up of your own to fix it how you see fit. I would fix it in one go. I agree with you that "the whole panic ops stuff should be done directly with the panic". The only difference between us is that I would keep the `panic_ops` callback. To me, this encapsulates panic callbacks into different modules, to make the code more general. Could you check if the drafted patch below looks good to you? If so, I will send out a formal patch. ---8<--- From ea78dd22cbdd97f709c5991d5bd3be97be6e137e Mon Sep 17 00:00:00 2001 From: Sean Anderson <sean.anderson(a)linux.dev> Date: Tue, 16 Sep 2025 16:03:58 +0100 Subject: [PATCH] coresight: Fix possible deadlock in coresight_panic_cb() coresight_panic_cb() is called during a panic. It invokes bus_for_each_dev(), which then calls bus_to_subsys() and takes the 'bus_kset->list_lock'. If a panic occurs after the lock has been acquired, it can lead to a deadlock. Instead of using a common panic notifier to iterate the bus, this commit directly registers the TMC device's panic notifier. This avoids bus iteration and effectively eliminates the race condition that could cause the deadlock. Fixes: 46006ceb5d02 ("coresight: core: Add provision for panic callbacks") Signed-off-by: Sean Anderson <sean.anderson(a)linux.dev> Signed-off-by: Leo Yan <leo.yan(a)arm.com> --- drivers/hwtracing/coresight/coresight-core.c | 42 ------------------- .../hwtracing/coresight/coresight-tmc-core.c | 26 ++++++++++++ drivers/hwtracing/coresight/coresight-tmc.h | 2 + 3 files changed, 28 insertions(+), 42 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c index 3267192f0c1c..cb0cc8d77056 100644 --- a/drivers/hwtracing/coresight/coresight-core.c +++ b/drivers/hwtracing/coresight/coresight-core.c @@ -21,7 +21,6 @@ #include <linux/property.h> #include <linux/delay.h> #include <linux/pm_runtime.h> -#include <linux/panic_notifier.h> #include "coresight-etm-perf.h" #include "coresight-priv.h" @@ -1566,36 +1565,6 @@ const struct bus_type coresight_bustype = { .name = "coresight", }; -static int coresight_panic_sync(struct device *dev, void *data) -{ - int mode; - struct coresight_device *csdev; - - /* Run through panic sync handlers for all enabled devices */ - csdev = container_of(dev, struct coresight_device, dev); - mode = coresight_get_mode(csdev); - - if ((mode == CS_MODE_SYSFS) || (mode == CS_MODE_PERF)) { - if (panic_ops(csdev)) - panic_ops(csdev)->sync(csdev); - } - - return 0; -} - -static int coresight_panic_cb(struct notifier_block *self, - unsigned long v, void *p) -{ - bus_for_each_dev(&coresight_bustype, NULL, NULL, - coresight_panic_sync); - - return 0; -} - -static struct notifier_block coresight_notifier = { - .notifier_call = coresight_panic_cb, -}; - static int __init coresight_init(void) { int ret; @@ -1608,20 +1577,11 @@ static int __init coresight_init(void) if (ret) goto exit_bus_unregister; - /* Register function to be called for panic */ - ret = atomic_notifier_chain_register(&panic_notifier_list, - &coresight_notifier); - if (ret) - goto exit_perf; - /* initialise the coresight syscfg API */ ret = cscfg_init(); if (!ret) return 0; - atomic_notifier_chain_unregister(&panic_notifier_list, - &coresight_notifier); -exit_perf: etm_perf_exit(); exit_bus_unregister: bus_unregister(&coresight_bustype); @@ -1631,8 +1591,6 @@ static int __init coresight_init(void) static void __exit coresight_exit(void) { cscfg_exit(); - atomic_notifier_chain_unregister(&panic_notifier_list, - &coresight_notifier); etm_perf_exit(); bus_unregister(&coresight_bustype); } diff --git a/drivers/hwtracing/coresight/coresight-tmc-core.c b/drivers/hwtracing/coresight/coresight-tmc-core.c index 36599c431be6..108ed9daf56d 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-core.c +++ b/drivers/hwtracing/coresight/coresight-tmc-core.c @@ -21,6 +21,7 @@ #include <linux/slab.h> #include <linux/dma-mapping.h> #include <linux/spinlock.h> +#include <linux/panic_notifier.h> #include <linux/pm_runtime.h> #include <linux/of.h> #include <linux/of_address.h> @@ -769,6 +770,21 @@ static void register_crash_dev_interface(struct tmc_drvdata *drvdata, "Valid crash tracedata found\n"); } +static int tmc_panic_cb(struct notifier_block *nb, unsigned long v, void *p) +{ + struct tmc_drvdata *drvdata = container_of(nb, struct tmc_drvdata, + panic_notifier); + struct coresight_device *csdev = drvdata->csdev; + + if (coresight_get_mode(csdev) == CS_MODE_DISABLED) + return 0; + + if (panic_ops(csdev)) + panic_ops(csdev)->sync(csdev); + + return 0; +} + static int __tmc_probe(struct device *dev, struct resource *res) { int ret = 0; @@ -885,6 +901,12 @@ static int __tmc_probe(struct device *dev, struct resource *res) goto out; } + if (panic_ops(drvdata->csdev)) { + drvdata->panic_notifier.notifier_call = tmc_panic_cb; + atomic_notifier_chain_register(&panic_notifier_list, + &drvdata->panic_notifier); + } + out: if (is_tmc_crashdata_valid(drvdata) && !tmc_prepare_crashdata(drvdata)) @@ -929,6 +951,10 @@ static void __tmc_remove(struct device *dev) { struct tmc_drvdata *drvdata = dev_get_drvdata(dev); + if (panic_ops(drvdata->csdev)) + atomic_notifier_chain_unregister(&panic_notifier_list, + &drvdata->panic_notifier); + /* * Since misc_open() holds a refcount on the f_ops, which is * etb fops in this case, device is there until last file diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h index cbb4ba439158..873c5427673c 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.h +++ b/drivers/hwtracing/coresight/coresight-tmc.h @@ -243,6 +243,7 @@ struct tmc_resrv_buf { * (after crash) by default. * @crash_mdata: Reserved memory for storing tmc crash metadata. * Used by ETR/ETF. + * @panic_notifier: Notifier used to clean up during a panic */ struct tmc_drvdata { struct clk *atclk; @@ -273,6 +274,7 @@ struct tmc_drvdata { struct etr_buf *perf_buf; struct tmc_resrv_buf resrv_buf; struct tmc_resrv_buf crash_mdata; + struct notifier_block panic_notifier; }; struct etr_buf_operations { -- 2.34.1

15 hours, 18 minutes

Re: [PATCH v3] coresight: Fix possible deadlock in coresight_panic_cb

by Leo Yan

On Tue, Sep 16, 2025 at 12:14:40PM -0400, Sean Anderson wrote: [...] > > Could you check if the drafted patch below looks good to you? If so, I > > As stated above I disagree with a half-hearted removal. If you want to do that, > then I will resend v2 done with an rcu list and you can make your own follow-up. It is fine to disagree, but please don't resend v2 :) We have plan to refactor locking in CoreSight driver, I will try my best to avoid adding new lock unless with a strong reason. Thanks, Leo

15 hours, 25 minutes

[PATCH v3 00/31] CoreSight: Address CPU Power Management Issues

by Leo Yan

This series addresses CPU power management issues in the CoreSight drivers. For easier review, the patches are organized into two categories: o Patches 01 ~ 10 focus on CPU power management within the ETM drivers. These patches fix SMP-safe access to the mode, correct context synchronization, and refactor the CPU suspend/resume flows. o Patches 11 ~ 31 extend CPU power management to cover activated paths, including helpers, links, and sinks. These changes move CPU PM and hotplug notifiers from the ETMv4 driver into the CoreSight core layer. Summary: - Patches 01 ~ 03: Fix device mode access in the SMP mode. - Patch 04 : A minor fix for polling bit. - Patches 05 ~ 07: Improve the context synchronization based on the ETM specification (IHI0064H.b) and Arm ARM (ARM DDI 0487 L.a). - Patches 08 ~ 10: Refactor the context save/restore flow in the ETMv4 driver, in the end, the CPU PM callbacks reuse the normal enabling and disabling flows. - Patches 11 ~ 17: Move CPU PM code from ETMv4 driver to the core layer. - Patches 18 ~ 23: Enhance the CTI driver for preparation dynamically controlling CTI devices in PM flows. This includes device mode handling in the CTI driver and distinguishing trace modes (Perf or SysFS). Refactor the PM notifier and improve locking usage (including for syscfg). - Patches 24 ~ 31: Support save and restore context for TRBE and manages activated paths during CPU idle and CPU hotplug. Verification: This series has been verified on Juno-r0 and r2 platform. Stress test script: #!/usr/bin/bash echo 1 > /sys/bus/coresight/devices/tmc_etr0/enable_sink while true; do echo 0 > /sys/devices/system/cpu/cpu2/online; echo 1 > /sys/devices/system/cpu/cpu2/online; done & while true; do echo 1 > /sys/bus/coresight/devices/etm2/enable_source; echo 0 > /sys/bus/coresight/devices/etm2/enable_source; done & Test script with kernel module insmod / rmmod: #!/bin/bash modules=( "coresight" "coresight_dummy" "coresight_replicator" "coresight_tpiu" "coresight_cpu_debug" "coresight_etb10" "coresight_stm" "coresight_trbe" "coresight_tmc" "coresight_ctcu" "coresight_catu" "coresight_etm4x" "coresight_cti" "coresight_funnel" "coresight_tnoc" ) module_dir="/mnt/build/drivers/hwtracing/coresight/" if [[ "$1" == "in" ]]; then echo "Inserting modules..." for mod in "${modules[@]}"; do modprobe $mod && echo "Loaded $mod" || echo "Failed to load $mod" done elif [[ "$1" == "rm" ]]; then echo "Removing modules..." # Remove in reverse order to respect dependencies for (( idx=${#modules[@]}-1 ; idx>=0 ; idx-- )); do mod="${modules[$idx]}" echo "Removing $mod..." rmmod "$mod" && echo "Removed $mod" || echo "Failed to remove $mod" done fi --- Changes in v3: - Fixed building failure in ETMv3 driver (kernel test robot). - Refactoring ETMv3 change for checking CPU ID (Levi). - Fixed NULL pointer issue during CPU idle (James). - Fixed lockdep complaint for HARDIRQ-safe and HARDIRA-unsafe (James). - Fixed acquiring mutex in atomic context (James). - Rebased on the latest coresight-next branch. - Link to v2: https://lore.kernel.org/r/20250701-arm_cs_pm_fix_v3-v2-0-23ebb864fcc1@arm.c… Changes in v2: - Refactored ETMv4 suspend and resume for reusing the normal enabling and disabling flows (James). - Used a per-CPU structure to maintain path pointers (James). - Supported helpers in CPU PM flows (James). - Fixed the SMP-safe access to device mode. - Fixed the context synchronization in ETMv4x driver. - Link to v1: https://lore.kernel.org/linux-arm-kernel/20250516160742.1200904-1-leo.yan@a… Signed-off-by: Leo Yan <leo.yan(a)arm.com> --- Leo Yan (30): coresight: Change device mode to atomic type coresight: etm4x: Always set tracer's device mode on target CPU coresight: etm3x: Always set tracer's device mode on target CPU coresight: etm4x: Correct polling IDLE bit coresight: etm4x: Ensure context synchronization is not ignored coresight: etm4x: Add context synchronization before enabling trace coresight: etm4x: Properly control filter in CPU idle with FEAT_TRF coresight: etm4x: Remove the state_needs_restore flag coresight: etm4x: Add flag to control single-shot restart coresight: etm4x: Reuse normal enable and disable logic in CPU idle coresight: Populate CPU ID into the coresight_device structure coresight: sysfs: Validate CPU online status for per-CPU sources coresight: Set per CPU source pointer coresight: Register CPU PM notifier in core layer coresight: etm4x: Hook CPU PM callbacks coresight: Add callback to determine if context save/restore is needed coresight: etm4x: Remove redundant condition checks in save and restore coresight: cti: Fix race condition by using device mode coresight: cti: Introduce CS_MODE_DEBUG mode coresight: cti: Register PM notifier after data initialization coresight: cti: Properly handle modes in CPU PM notifiers coresight: cti: Make spin lock usage consistent coresight: syscfg: Use spinlock to protect active variables coresight: Add per-CPU path pointer coresight: Add 'in_idle' argument to path enable/disable functions coresight: Control path during CPU idle coresight: Add PM callbacks for percpu sink coresight: Take hotplug lock in enable_source_store() for Sysfs mode coresight: Move CPU hotplug callbacks to core layer coresight: Manage activated path during CPU hotplug Yabin Cui (1): coresight: trbe: Save and restore state across CPU low power state drivers/hwtracing/coresight/coresight-catu.c | 1 + drivers/hwtracing/coresight/coresight-core.c | 337 ++++++++++++-- drivers/hwtracing/coresight/coresight-ctcu-core.c | 1 + drivers/hwtracing/coresight/coresight-cti-core.c | 69 ++- drivers/hwtracing/coresight/coresight-cti-sysfs.c | 2 +- drivers/hwtracing/coresight/coresight-dummy.c | 1 + drivers/hwtracing/coresight/coresight-etb10.c | 1 + drivers/hwtracing/coresight/coresight-etm3x-core.c | 55 ++- drivers/hwtracing/coresight/coresight-etm4x-core.c | 491 ++++++--------------- drivers/hwtracing/coresight/coresight-etm4x.h | 62 --- drivers/hwtracing/coresight/coresight-funnel.c | 1 + drivers/hwtracing/coresight/coresight-replicator.c | 1 + drivers/hwtracing/coresight/coresight-stm.c | 1 + drivers/hwtracing/coresight/coresight-syscfg.c | 22 +- drivers/hwtracing/coresight/coresight-syscfg.h | 2 + drivers/hwtracing/coresight/coresight-sysfs.c | 10 + drivers/hwtracing/coresight/coresight-tmc-core.c | 1 + drivers/hwtracing/coresight/coresight-tpda.c | 1 + drivers/hwtracing/coresight/coresight-tpdm.c | 1 + drivers/hwtracing/coresight/coresight-tpiu.c | 1 + drivers/hwtracing/coresight/coresight-trbe.c | 85 ++++ drivers/hwtracing/coresight/ultrasoc-smb.c | 1 + include/linux/coresight.h | 55 ++- 23 files changed, 687 insertions(+), 515 deletions(-) --- base-commit: 559d6c380ea0a27e71d0269410301303515e4179 change-id: 20250909-arm_coresight_power_management_fix-139873f942e8 Best regards, -- Leo Yan <leo.yan(a)arm.com>

1 day, 19 hours

Re: [PATCH v3] coresight: Fix possible deadlock in coresight_panic_cb

by Leo Yan

On Fri, Sep 12, 2025 at 11:13:14AM -0400, Sean Anderson wrote: > coresight_panic_cb is called with interrupts disabled during panics. > However, bus_for_each_dev calls bus_to_subsys which takes > bus_kset->list_lock without disabling IRQs. This may cause a deadlock. I would rephrase it to make it clearer for anyone reading it later: coresight_panic_cb() is called during panics, which can preempt a flow that triggers exceptions (such as data or instruction aborts). However, bus_for_each_dev() calls bus_to_subsys(), which takes 'bus_kset->list_lock'. If a panic occurs after the lock has been acquired, it will cause a deadlock. > Instead of adding a panic API for coresight devices, just have coresight > drivers that need a panic callback register directly with the panic > notifier. > > Fixes: 46006ceb5d02 ("coresight: core: Add provision for panic callbacks") > Fixes: 6dbcbcfc4496 ("coresight: tmc: Enable panic sync handling") Let us fix the bug caused by the commit 46006ceb5d02. OTOH, I think we should not touch change introduced in the commit 6dbcbcfc4496. Please see details below. > Signed-off-by: Sean Anderson <sean.anderson(a)linux.dev> > --- > > Changes in v3: > - Rewrite patch to remove the panic sync API entirely > > Changes in v2: > - Add a comment describing csdev_lock/list > - Consolidate list removal in coresight_device_release > > drivers/hwtracing/coresight/coresight-core.c | 42 ------------------- > .../hwtracing/coresight/coresight-tmc-core.c | 20 ++++++++- > .../hwtracing/coresight/coresight-tmc-etf.c | 12 +++--- > .../hwtracing/coresight/coresight-tmc-etr.c | 12 +++--- > drivers/hwtracing/coresight/coresight-tmc.h | 10 ++++- > include/linux/coresight.h | 11 +---- > 6 files changed, 38 insertions(+), 69 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c > index fa758cc21827..297af270bf3d 100644 > --- a/drivers/hwtracing/coresight/coresight-core.c > +++ b/drivers/hwtracing/coresight/coresight-core.c > @@ -19,7 +19,6 @@ > #include <linux/property.h> > #include <linux/delay.h> > #include <linux/pm_runtime.h> > -#include <linux/panic_notifier.h> > > #include "coresight-etm-perf.h" > #include "coresight-priv.h" > @@ -1563,36 +1562,6 @@ const struct bus_type coresight_bustype = { > .name = "coresight", > }; > > -static int coresight_panic_sync(struct device *dev, void *data) > -{ > - int mode; > - struct coresight_device *csdev; > - > - /* Run through panic sync handlers for all enabled devices */ > - csdev = container_of(dev, struct coresight_device, dev); > - mode = coresight_get_mode(csdev); > - > - if ((mode == CS_MODE_SYSFS) || (mode == CS_MODE_PERF)) { > - if (panic_ops(csdev)) > - panic_ops(csdev)->sync(csdev); > - } > - > - return 0; > -} > - > -static int coresight_panic_cb(struct notifier_block *self, > - unsigned long v, void *p) > -{ > - bus_for_each_dev(&coresight_bustype, NULL, NULL, > - coresight_panic_sync); > - > - return 0; > -} > - > -static struct notifier_block coresight_notifier = { > - .notifier_call = coresight_panic_cb, > -}; > - > static int __init coresight_init(void) > { > int ret; > @@ -1605,20 +1574,11 @@ static int __init coresight_init(void) > if (ret) > goto exit_bus_unregister; > > - /* Register function to be called for panic */ > - ret = atomic_notifier_chain_register(&panic_notifier_list, > - &coresight_notifier); > - if (ret) > - goto exit_perf; > - > /* initialise the coresight syscfg API */ > ret = cscfg_init(); > if (!ret) > return 0; > > - atomic_notifier_chain_unregister(&panic_notifier_list, > - &coresight_notifier); > -exit_perf: > etm_perf_exit(); > exit_bus_unregister: > bus_unregister(&coresight_bustype); > @@ -1628,8 +1588,6 @@ static int __init coresight_init(void) > static void __exit coresight_exit(void) > { > cscfg_exit(); > - atomic_notifier_chain_unregister(&panic_notifier_list, > - &coresight_notifier); > etm_perf_exit(); > bus_unregister(&coresight_bustype); > } Removing panic notifier in coresight-core.c looks good to me. > diff --git a/drivers/hwtracing/coresight/coresight-tmc-core.c b/drivers/hwtracing/coresight/coresight-tmc-core.c > index 88afb16bb6be..012f76dbf7d3 100644 > --- a/drivers/hwtracing/coresight/coresight-tmc-core.c > +++ b/drivers/hwtracing/coresight/coresight-tmc-core.c > @@ -16,6 +16,7 @@ > #include <linux/fs.h> > #include <linux/miscdevice.h> > #include <linux/mutex.h> > +#include <linux/panic_notifier.h> > #include <linux/property.h> > #include <linux/uaccess.h> > #include <linux/slab.h> > @@ -834,6 +835,7 @@ static int __tmc_probe(struct device *dev, struct resource *res) > desc.type = CORESIGHT_DEV_TYPE_SINK; > desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_SYSMEM; > desc.ops = &tmc_etr_cs_ops; > + drvdata->panic_notifier.notifier_call = tmc_panic_sync_etr; > ret = tmc_etr_setup_caps(dev, devid, &desc.access); > if (ret) > goto out; > @@ -847,6 +849,7 @@ static int __tmc_probe(struct device *dev, struct resource *res) > desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER; > desc.subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_FIFO; > desc.ops = &tmc_etf_cs_ops; > + drvdata->panic_notifier.notifier_call = tmc_panic_sync_etf; > dev_list = &etf_devs; > break; > default: > @@ -869,11 +872,18 @@ static int __tmc_probe(struct device *dev, struct resource *res) > dev->platform_data = pdata; > desc.pdata = pdata; > > + if (drvdata->panic_notifier.notifier_call) { > + ret = atomic_notifier_chain_register(&panic_notifier_list, > + &drvdata->panic_notifier); > + if (ret) > + goto out; > + } When I review this patch, I recognize we can consolidate panic notifier in coresight-tmc-core.c, so we don't need to distribute the changes into ETF and ETR drivers (sorry if I misled you in my previous reply). How about we change like below? We still can keep the panic_ops callback, and then register a common callback tmc_panic_cb(), which still checks device state and invoke device's sync callback. diff --git a/drivers/hwtracing/coresight/coresight-tmc-core.c b/drivers/hwtracing/coresight/coresight-tmc-core.c index bd783c9dcb56..f7c175b3ae4c 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-core.c +++ b/drivers/hwtracing/coresight/coresight-tmc-core.c @@ -21,6 +21,7 @@ #include <linux/slab.h> #include <linux/dma-mapping.h> #include <linux/spinlock.h> +#include <linux/panic_notifier.h> #include <linux/pm_runtime.h> #include <linux/of.h> #include <linux/of_address.h> @@ -769,6 +770,22 @@ static void register_crash_dev_interface(struct tmc_drvdata *drvdata, "Valid crash tracedata found\n"); } +static int tmc_panic_cb(struct notifier_block *nb, unsigned long v, void *p) +{ + struct tmc_drvdata *drvdata = container_of(nb, struct tmc_drvdata, + panic_notifier); + struct coresight_device *csdev = drvdata->csdev; + int mode = coresight_get_mode(csdev); + + if (mode == CS_MODE_DISABLED) + return 0; + + if (panic_ops(csdev)) + panic_ops(csdev)->sync(csdev); + + return 0; +} + static int __tmc_probe(struct device *dev, struct resource *res) { int ret = 0; @@ -886,6 +903,12 @@ static int __tmc_probe(struct device *dev, struct resource *res) goto out; } + if (panic_ops(drvdata->csdev)) { + drvdata->panic_notifier.notifier_call = tmc_panic_cb; + atomic_notifier_chain_register(&panic_notifier_list, + &drvdata->panic_notifier); + } + out: if (is_tmc_crashdata_valid(drvdata) && !tmc_prepare_crashdata(drvdata)) @@ -930,6 +953,10 @@ static void __tmc_remove(struct device *dev) { struct tmc_drvdata *drvdata = dev_get_drvdata(dev); + if (panic_ops(drvdata->csdev)) + atomic_notifier_chain_unregister(&panic_notifier_list, + &drvdata->panic_notifier); + /* * Since misc_open() holds a refcount on the f_ops, which is * etb fops in this case, device is there until last file diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h index cbb4ba439158..873c5427673c 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.h +++ b/drivers/hwtracing/coresight/coresight-tmc.h @@ -243,6 +243,7 @@ struct tmc_resrv_buf { * (after crash) by default. * @crash_mdata: Reserved memory for storing tmc crash metadata. * Used by ETR/ETF. + * @panic_notifier: Notifier used to clean up during a panic */ struct tmc_drvdata { struct clk *atclk; @@ -273,6 +274,7 @@ struct tmc_drvdata { struct etr_buf *perf_buf; struct tmc_resrv_buf resrv_buf; struct tmc_resrv_buf crash_mdata; + struct notifier_block panic_notifier; }; struct etr_buf_operations {

1 day, 22 hours

[PATCH] coresight: tnoc: add new AMBA ID to support Trace Noc V2

by Yuanfang Zhang

Add the new AMBA ID 0x001f0c00 to support Trace Noc V2 instances. Signed-off-by: Yuanfang Zhang <yuanfang.zhang(a)oss.qualcomm.com> --- drivers/hwtracing/coresight/coresight-tnoc.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/hwtracing/coresight/coresight-tnoc.c b/drivers/hwtracing/coresight/coresight-tnoc.c index d542df46ea39314605290311f683010337bfd4bd..ff9a0a9cfe96e5f5e3077c750ea2f890cdd50d94 100644 --- a/drivers/hwtracing/coresight/coresight-tnoc.c +++ b/drivers/hwtracing/coresight/coresight-tnoc.c @@ -222,6 +222,10 @@ static struct amba_id trace_noc_ids[] = { .id = 0x000f0c00, .mask = 0x00ffff00, }, + { + .id = 0x001f0c00, + .mask = 0x00ffff00, + }, {}, }; MODULE_DEVICE_TABLE(amba, trace_noc_ids); --- base-commit: a80198ba650f50d266d7fc4a6c5262df9970f9f2 change-id: 20250814-tnoc_v2-ec86ebebf62e Best regards, -- Yuanfang Zhang <yuanfang.zhang(a)oss.qualcomm.com>

1 day, 22 hours

[PATCH v11 0/2] coresight: Add label sysfs node support

by Mao Jinlong

Change since V10: 1. Update kernel version to 6.18 V10 link: https://lkml.org/lkml/2025/8/6/520 Change since V9: 1. Replace scnprintf with sysfs_emit. 2. Update date in ABI files. V9 link: https://lkml.org/lkml/2025/7/17/832 Change since V8: 1. Add label in all documentations of coresight components. 2. Add control of the visibility of the label sysfs attribute. V8 link: https://lkml.org/lkml/2025/7/3/985 Change since V7: 1. Update the conflict when apply to coresight next. 2. Update the Date and version in ABI file. V7 link: https://patchwork.kernel.org/project/linux-arm-kernel/patch/20250226121926.… Change since V6: 1. Update the date and version in ABI file. Change since V5: 1. Update the kernel version of ABI files. 2. Add link of different patch versions. V5 link: https://patchwork.kernel.org/project/linux-arm-msm/cover/20241210122253.319… Change since V4: 1. Add label in DT and add label sysfs node for each coresight device. V4 link: https://patchwork.kernel.org/project/linux-arm-msm/cover/20240703122340.268… Change since V3: 1. Change device-name to arm,cs-dev-name. 2. Add arm,cs-dev-name to only CTI and sources' dt-binding. V3 link: https://patchwork.kernel.org/project/linux-arm-msm/cover/20240131082628.628… Change since V2: 1. Fix the error in coresight core. drivers/hwtracing/coresight/coresight-core.c:1775:7: error: assigning to 'char *' from 'const char *' discards qualifiers 2. Fix the warning when run dtbinding check. Documentation/devicetree/bindings/arm/arm,coresight-cpu-debug.yaml: device-name: missing type definition V2 link: https://patchwork.kernel.org/project/linux-arm-msm/cover/20240115164252.265… Change since V1: 1. Change coresight-name to device name. 2. Add the device-name in coresight dt bindings. V1 link: https://patchwork.kernel.org/project/linux-arm-kernel/patch/20230208110716.… Mao Jinlong (2): dt-bindings: arm: Add label in the coresight components coresight: Add label sysfs node support .../testing/sysfs-bus-coresight-devices-cti | 6 ++ .../sysfs-bus-coresight-devices-dummy-source | 6 ++ .../testing/sysfs-bus-coresight-devices-etb10 | 6 ++ .../testing/sysfs-bus-coresight-devices-etm3x | 6 ++ .../testing/sysfs-bus-coresight-devices-etm4x | 6 ++ .../sysfs-bus-coresight-devices-funnel | 6 ++ .../testing/sysfs-bus-coresight-devices-stm | 6 ++ .../testing/sysfs-bus-coresight-devices-tmc | 6 ++ .../testing/sysfs-bus-coresight-devices-tpdm | 6 ++ .../testing/sysfs-bus-coresight-devices-trbe | 6 ++ .../bindings/arm/arm,coresight-cti.yaml | 4 ++ .../arm/arm,coresight-dummy-sink.yaml | 4 ++ .../arm/arm,coresight-dummy-source.yaml | 4 ++ .../arm/arm,coresight-dynamic-funnel.yaml | 4 ++ .../arm/arm,coresight-dynamic-replicator.yaml | 4 ++ .../bindings/arm/arm,coresight-etb10.yaml | 4 ++ .../bindings/arm/arm,coresight-etm.yaml | 4 ++ .../arm/arm,coresight-static-funnel.yaml | 4 ++ .../arm/arm,coresight-static-replicator.yaml | 4 ++ .../bindings/arm/arm,coresight-tmc.yaml | 4 ++ .../bindings/arm/arm,coresight-tpiu.yaml | 4 ++ .../bindings/arm/qcom,coresight-ctcu.yaml | 4 ++ .../arm/qcom,coresight-remote-etm.yaml | 4 ++ .../bindings/arm/qcom,coresight-tpda.yaml | 4 ++ .../bindings/arm/qcom,coresight-tpdm.yaml | 4 ++ drivers/hwtracing/coresight/coresight-sysfs.c | 71 ++++++++++++++++++- 26 files changed, 189 insertions(+), 2 deletions(-) -- 2.34.1

1 day, 22 hours

Re: [PATCH] coresight: trbe: Use scope-based resource management in arm_trbe_alloc_buffer()

by Anshuman Khandual

On 09/09/25 5:58 PM, Markus Elfring wrote: > From: Markus Elfring <elfring(a)users.sourceforge.net> > Date: Tue, 9 Sep 2025 14:20:06 +0200 > > Scope-based resource management became supported for some > programming interfaces by contributions of Peter Zijlstra on 2023-05-26. > See also the commit 54da6a0924311c7cf5015533991e44fb8eb12773 ("locking: ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ SHA ID here just needs first 12 digits not the entire string. > Introduce __cleanup() based infrastructure"). > > * Thus use the attribute “__free(kfree)”. > > * Reduce the scopes for the local variables “buf” and “pglist”. What is that required ? > > * Omit four kfree() calls accordingly. Right. The commit message should be re-written with little more context from arm_trbe_alloc_buffer(), after describing the new scope-based resource management. > > Signed-off-by: Markus Elfring <elfring(a)users.sourceforge.net> > --- > drivers/hwtracing/coresight/coresight-trbe.c | 21 ++++++++------------ > 1 file changed, 8 insertions(+), 13 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c > index 8f9bbef71f23..1b0d58bf8613 100644 > --- a/drivers/hwtracing/coresight/coresight-trbe.c > +++ b/drivers/hwtracing/coresight/coresight-trbe.c > @@ -733,8 +733,6 @@ static void *arm_trbe_alloc_buffer(struct coresight_device *csdev, > struct perf_event *event, void **pages, > int nr_pages, bool snapshot) > { > - struct trbe_buf *buf; > - struct page **pglist; > int i; > > /* > @@ -746,32 +744,29 @@ static void *arm_trbe_alloc_buffer(struct coresight_device *csdev, > if (nr_pages < 2) > return NULL; > > - buf = kzalloc_node(sizeof(*buf), GFP_KERNEL, trbe_alloc_node(event)); > + struct trbe_buf *buf __free(kfree) = kzalloc_node(sizeof(*buf), > + GFP_KERNEL, > + trbe_alloc_node(event)); > if (!buf) > return NULL; > > - pglist = kcalloc(nr_pages, sizeof(*pglist), GFP_KERNEL); > - if (!pglist) { > - kfree(buf); > + struct page **pglist __free(kfree) = kcalloc(nr_pages, sizeof(*pglist), GFP_KERNEL); > + if (!pglist) > return NULL; > - } > > for (i = 0; i < nr_pages; i++) > pglist[i] = virt_to_page(pages[i]); > > buf->trbe_base = (unsigned long)vmap(pglist, nr_pages, VM_MAP, PAGE_KERNEL); > - if (!buf->trbe_base) { > - kfree(pglist); > - kfree(buf); > + if (!buf->trbe_base) > return NULL; > - } > + > buf->trbe_limit = buf->trbe_base + nr_pages * PAGE_SIZE; > buf->trbe_write = buf->trbe_base; > buf->snapshot = snapshot; > buf->nr_pages = nr_pages; > buf->pages = pages; > - kfree(pglist); > - return buf; > + return_ptr(buf); > } > > static void arm_trbe_free_buffer(void *config) Seems like a good idea though. But please keep the local variable declaration in the current place which is bit cleaner and reduces code churn as well. diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c index 7a226316c48f..7babba1a9afb 100644 --- a/drivers/hwtracing/coresight/coresight-trbe.c +++ b/drivers/hwtracing/coresight/coresight-trbe.c @@ -733,8 +733,8 @@ static void *arm_trbe_alloc_buffer(struct coresight_device *csdev, struct perf_event *event, void **pages, int nr_pages, bool snapshot) { - struct trbe_buf *buf; - struct page **pglist; + struct trbe_buf *buf __free(kfree); + struct page **pglist __free(kfree); int i; /* @@ -751,27 +751,22 @@ static void *arm_trbe_alloc_buffer(struct coresight_device *csdev, return NULL; pglist = kcalloc(nr_pages, sizeof(*pglist), GFP_KERNEL); - if (!pglist) { - kfree(buf); + if (!pglist) return NULL; - } for (i = 0; i < nr_pages; i++) pglist[i] = virt_to_page(pages[i]); buf->trbe_base = (unsigned long)vmap(pglist, nr_pages, VM_MAP, PAGE_KERNEL); - if (!buf->trbe_base) { - kfree(pglist); - kfree(buf); + if (!buf->trbe_base) return NULL; - } + buf->trbe_limit = buf->trbe_base + nr_pages * PAGE_SIZE; buf->trbe_write = buf->trbe_base; buf->snapshot = snapshot; buf->nr_pages = nr_pages; buf->pages = pages; - kfree(pglist); - return buf; + return_ptr(buf); } static void arm_trbe_free_buffer(void *config)

4 days, 21 hours

Re: [PATCH v2] coresight: Fix possible deadlock in coresight_panic_cb

by Leo Yan

Hi Sean, On Thu, Sep 11, 2025 at 11:33:15AM -0400, Sean Anderson wrote: > coresight_panic_cb is called with interrupts disabled during panics. > However, bus_for_each_dev calls bus_to_subsys which takes > bus_kset->list_lock without disabling IRQs. This will cause a deadlock > if a panic occurs while one of the other coresight functions that uses > bus_for_each_dev is running. The decription is a bit misleading. Even when IRQ is disabled, if an exception happens, a CPU still can be trapped for handling kernel panic. > Maintain a separate list of coresight devices to access during a panic. Rather than maintaining a separate list and introducing a new spinlock, I would argue if we can simply register panic notifier in TMC ETR and ETF drviers (see tmc_panic_sync_etr() and tmc_panic_sync_etf()). If there is no dependency between CoreSight modules in panic sync flow, it is not necessary to maintain list (and lock) for these modules. I have not involved in panic patches before, so I would like to know the maintainers' opinion. Thanks, Leo

4 days, 22 hours

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

CoreSight