This series enables detection of ACPI based TRBE devices via a stand alone
purpose built representative platform device. But as a pre-requisite this
changes coresight_platform_data structure assignment for the TRBE device.
This series is based on v6.5-rc1 kernel, is also dependent on the following
EDK2 changes posted earlier by Sami.
https://edk2.groups.io/g/devel/message/107239https://edk2.groups.io/g/devel/message/107241
Cc: Sami Mujawar <sami.mujawar(a)arm.com>
Cc: Catalin Marinas <catalin.marinas(a)arm.com>
Cc: Will Deacon <will(a)kernel.org>
Cc: Mark Rutland <mark.rutland(a)arm.com>
Cc: Suzuki K Poulose <suzuki.poulose(a)arm.com>
Cc: Mike Leach <mike.leach(a)linaro.org>
Cc: Leo Yan <leo.yan(a)linaro.org>
Cc: Alexander Shishkin <alexander.shishkin(a)linux.intel.com>
Cc: James Clark <james.clark(a)arm.com>
Cc: coresight(a)lists.linaro.org
Cc: linux-arm-kernel(a)lists.infradead.org
Cc: linux-kernel(a)vger.kernel.org
Anshuman Khandual (3):
arm_pmu: acpi: Add a representative platform device for TRBE
coresight: trbe: Add a representative coresight_platform_data for TRBE
coresight: trbe: Enable ACPI based TRBE devices
arch/arm64/include/asm/acpi.h | 3 +
drivers/hwtracing/coresight/coresight-trbe.c | 15 ++++-
drivers/hwtracing/coresight/coresight-trbe.h | 1 +
drivers/perf/arm_pmu_acpi.c | 63 ++++++++++++++++++++
include/linux/perf/arm_pmu.h | 1 +
5 files changed, 80 insertions(+), 3 deletions(-)
--
2.25.1
On 26/07/2023 18:03, Steve Clevenger OS wrote:
>
> Hi Suzuki,
>
> On 7/26/2023 9:59 AM, Suzuki K Poulose wrote:
>> On 10/07/2023 07:24, Anshuman Khandual wrote:
>>> CoreSight ETM4x devices could be accessed either via MMIO (handled via
>>> amba_driver) or CPU system instructions (handled via platform driver).
>>> But
>>> this has the following issues :
>>>
>>> - Each new CPU comes up with its own PID and thus we need to keep on
>>> adding the "known" PIDs to get it working with AMBA driver. While
>>> the ETM4 architecture (and CoreSight architecture) defines way to
>>> identify a device as ETM4. Thus older kernels won't be able to
>>> "discover" a newer CPU, unless we add the PIDs.
>>>
>>> - With ACPI, the ETM4x devices have the same HID to identify the
>>> device
>>> irrespective of the mode of access. This creates a problem where two
>>> different drivers (both AMBA based driver and platform driver) would
>>> hook into the "HID" and could conflict. e.g., if AMBA driver gets
>>> hold of a non-MMIO device, the probe fails. If we have single driver
>>> hooked into the given "HID", we could handle them seamlessly,
>>> irrespective of the mode of access.
>>>
>>> - CoreSight is heavily dependent on the runtime power management. With
>>> ACPI, amba_driver doesn't get us anywhere with handling the power
>>> and thus one need to always turn the power ON to use them. Moving to
>>> platform driver gives us the power management for free.
>>>
>>> Due to all of the above, we are moving ACPI MMIO based etm4x devices
>>> to be
>>> supported via tha platform driver. The series makes the existing platform
>>> driver generic to handle both type of the access modes. Although existing
>>> AMBA driver would still continue to support DT based etm4x MMIO devices.
>>> Although some problems still remain, such as manually adding PIDs for all
>>> new AMBA DT based devices.
>>>
>>> The series applies on 6.5-rc1.
>>>
>>> Changes in V6:
>>>
>>> - Rebased on 6.5-rc1
>>>
>>
>> I have queued this version for v6.6, should appear on coresight/next soon.
>>
>> Suzuki
>
> Is there anyway to queue this for 6.5? Or has that ship sailed?
Only fixes are allowed for v6.5 at this time.
Suzuki
>
> Thanks,
>
> Steve C.
The kernel test robot looks for new warnings in a W=1 build, so fix all
the existing warnings to make it easier to spot new ones when building
locally.
The fixes are for undocumented function arguments and an incorrect doc
style.
Signed-off-by: James Clark <james.clark(a)arm.com>
---
drivers/hwtracing/coresight/coresight-cti-core.c | 2 +-
drivers/hwtracing/coresight/coresight-etm4x-cfg.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-cti-core.c b/drivers/hwtracing/coresight/coresight-cti-core.c
index 7023ff70cc28..3999d0a2cb60 100644
--- a/drivers/hwtracing/coresight/coresight-cti-core.c
+++ b/drivers/hwtracing/coresight/coresight-cti-core.c
@@ -22,7 +22,7 @@
#include "coresight-priv.h"
#include "coresight-cti.h"
-/**
+/*
* CTI devices can be associated with a PE, or be connected to CoreSight
* hardware. We have a list of all CTIs irrespective of CPU bound or
* otherwise.
diff --git a/drivers/hwtracing/coresight/coresight-etm4x-cfg.c b/drivers/hwtracing/coresight/coresight-etm4x-cfg.c
index d2ea903231b2..c302072b293a 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x-cfg.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x-cfg.c
@@ -40,7 +40,7 @@
* Invalid offsets will result in fail code return and feature load failure.
*
* @drvdata: driver data to map into.
- * @reg: register to map.
+ * @reg_csdev: register to map.
* @offset: device offset for the register
*/
static int etm4_cfg_map_reg_offset(struct etmv4_drvdata *drvdata,
@@ -132,7 +132,7 @@ static int etm4_cfg_map_reg_offset(struct etmv4_drvdata *drvdata,
* etm4_cfg_load_feature - load a feature into a device instance.
*
* @csdev: An ETMv4 CoreSight device.
- * @feat: The feature to be loaded.
+ * @feat_csdev: The feature to be loaded.
*
* The function will load a feature instance into the device, checking that
* the register definitions are valid for the device.
--
2.34.1
CoreSight ETM4x devices could be accessed either via MMIO (handled via
amba_driver) or CPU system instructions (handled via platform driver). But
this has the following issues :
- Each new CPU comes up with its own PID and thus we need to keep on
adding the "known" PIDs to get it working with AMBA driver. While
the ETM4 architecture (and CoreSight architecture) defines way to
identify a device as ETM4. Thus older kernels won't be able to
"discover" a newer CPU, unless we add the PIDs.
- With ACPI, the ETM4x devices have the same HID to identify the device
irrespective of the mode of access. This creates a problem where two
different drivers (both AMBA based driver and platform driver) would
hook into the "HID" and could conflict. e.g., if AMBA driver gets
hold of a non-MMIO device, the probe fails. If we have single driver
hooked into the given "HID", we could handle them seamlessly,
irrespective of the mode of access.
- CoreSight is heavily dependent on the runtime power management. With
ACPI, amba_driver doesn't get us anywhere with handling the power
and thus one need to always turn the power ON to use them. Moving to
platform driver gives us the power management for free.
Due to all of the above, we are moving ACPI MMIO based etm4x devices to be
supported via tha platform driver. The series makes the existing platform
driver generic to handle both type of the access modes. Although existing
AMBA driver would still continue to support DT based etm4x MMIO devices.
Although some problems still remain, such as manually adding PIDs for all
new AMBA DT based devices.
The series applies on 6.5-rc1.
Changes in V6:
- Rebased on 6.5-rc1
Changes in V5:
https://lore.kernel.org/all/20230529062511.52016-1-anshuman.khandual@arm.co…
- Updated the comment for apb clock in drvdata structure
- Updated conditional check in etm4_runtime_suspend/resume()
- Asserted that the APB clock is present and also enabled
Changes in V4:
https://lore.kernel.org/all/20230523044553.1525048-1-anshuman.khandual@arm.…
- Changed in-code comment in etm4_check_arch_features()
- Re-ordered pm_runtime_disable() in etm4_remove_platform_dev()
- Renamed back etm4_match as etm4_sysreg_match
- Moved back [PATCH 6/6] as [PATCH 5/6]
Changes in V3:
https://lore.kernel.org/all/20230519052149.1367814-1-anshuman.khandual@arm.…
- Returned from etm4_check_arch_features() for non iomem devices
- Renamed ETM_DEVTYPE_ETMv4x_ARCH as CS_DEVTYPE_PE_TRACE
- Renamed is_etm4x_devtype() as is_devtype_cpu_trace()
- Added a patch to ignore the absence of graph connections
Changes in V2:
https://lore.kernel.org/all/20230327050537.30861-1-anshuman.khandual@arm.co…
- Enables ACPI etm4x device support in the existing platform driver
- Dropped last two patches from the series
- Dropped redundant 'devarch' checking from is_etm4x_device()
- Renamed updated is_etm4x_device() as is_etm4x_devtype()
- Fixed arguments in fallback stub for etm4_check_arch_features()
- Tagged etm4_dev_pm_ops with etm4_platform_driver
- Updated the comment for coresight_get_enable_apb_pclk() helper
- Updated the comment for new 'pclk' element in struct etm4_drvdata
- Dropped the clock when devm_ioremap_resource() fails
- Convert IS_ERR() into a direct pointer check in etm4_remove_platform_dev()
- Dropped "arm,coresight-etm4x" compatible property from etm4_match[]
Changes in V1:
https://lore.kernel.org/all/20230317030501.1811905-1-anshuman.khandual@arm.…
Cc: Ganapatrao Kulkarni <gankulkarni(a)os.amperecomputing.com>
Cc: Steve Clevenger <scclevenger(a)os.amperecomputing.com>
Cc: Rob Herring <robh+dt(a)kernel.org>
Cc: Frank Rowand <frowand.list(a)gmail.com>
Cc: Russell King (Oracle) <linux(a)armlinux.org.uk>
Cc: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org>
Cc: "Rafael J. Wysocki" <rafael(a)kernel.org>
Cc: Len Brown <lenb(a)kernel.org>
Cc: Sudeep Holla <sudeep.holla(a)arm.com>
Cc: Lorenzo Pieralisi <lpieralisi(a)kernel.org>
Cc: Mathieu Poirier <mathieu.poirier(a)linaro.org>
Cc: Suzuki K Poulose <suzuki.poulose(a)arm.com>
Cc: Mike Leach <mike.leach(a)linaro.org>
Cc: Leo Yan <leo.yan(a)linaro.org>
Cc: devicetree(a)vger.kernel.org
Cc: linux-acpi(a)vger.kernel.org
Cc: coresight(a)lists.linaro.org
Cc: linux-arm-kernel(a)lists.infradead.org
Cc: linux-kernel(a)vger.kernel.org
Anshuman Khandual (4):
coresight: etm4x: Allocate and device assign 'struct etmv4_drvdata' earlier
coresight: etm4x: Drop iomem 'base' argument from etm4_probe()
coresight: etm4x: Drop pid argument from etm4_probe()
coresight: etm4x: Change etm4_platform_driver driver for MMIO devices
Suzuki K Poulose (2):
coresight: platform: acpi: Ignore the absence of graph
coresight: etm4x: Add ACPI support in platform driver
drivers/acpi/acpi_amba.c | 1 -
.../coresight/coresight-etm4x-core.c | 118 ++++++++++++++----
drivers/hwtracing/coresight/coresight-etm4x.h | 4 +
.../hwtracing/coresight/coresight-platform.c | 6 +-
include/linux/coresight.h | 59 +++++++++
5 files changed, 164 insertions(+), 24 deletions(-)
--
2.25.1
Hi,all
[1] Despite not yielding any benefits in the past, it has been shown that utilizing
ARM ETM+AutoFDO can optimize the Linux kernel. I am interested in determining
if conducting a trial run on my platform would be beneficial.
[1] https://lpc.events/event/7/contributions/798/
[2][3] Show an simple examples optimize a program using simpleperf and perf
in perf method
I would like to build a version of 'perf' with CORESIGHT=1 that supports ETM and can run on my platform(aarch64).
OpenCSD/decoder/tests/auto-fdo/autofdo.md at master · Linaro/OpenCSD · GitHub
cd linux && PYTHON=python3 && make install ARCH=arm64 CORESIGHT=1 CROSS_COMPILE=aarch64-linux-gnu- LDFLAGS=-static NO_LIBPERF_BUILD=1 NO_LIBELF=1 NO_JVMTI=1 NO_LIBPYTHON=1 NO_LIBTRACEEVENT=1 NO_PERF_READ_VDSO32=1 NO_PERF_READ_VDSOX32=1 EXTRA_CFLAGS=-Wno-error -C tools/perf/
Makefile.config:525: *** Error: No libopencsd library found or the version is not up-to-date. Please install recent libopencsd to build with CORESIGHT=1. Stop.
make[1]: *** [Makefile.perf:242: sub-make] Error 2
make: *** [Makefile:113: install] Error 2
make: Leaving directory '/linux/linux/tools/perf'
I have already installed libopencsd through apt-get, but I am still unable to locate my library.
/usr/include/opencsd
How can I fix this problem? Where should I move /usr/include/opencsd to?
Thanks
Zack
On 18/07/2023 15:31, Rob Herring wrote:
> The DT of_device.h and of_platform.h date back to the separate
> of_platform_bus_type before it as merged into the regular platform bus.
> As part of that merge prepping Arm DT support 13 years ago, they
> "temporarily" include each other. They also include platform_device.h
> and of.h. As a result, there's a pretty much random mix of those include
> files used throughout the tree. In order to detangle these headers and
> replace the implicit includes with struct declarations, users need to
> explicitly include the correct includes.
>
> Signed-off-by: Rob Herring <robh(a)kernel.org>
> ---
> v2:
> - Fix double include of of.h
> ---
> drivers/hwtracing/coresight/coresight-core.c | 2 +-
> drivers/hwtracing/coresight/coresight-platform.c | 2 --
> 2 files changed, 1 insertion(+), 3 deletions(-)
Rob,
Thanks for the updated version, I will queue this.
Suzuki
Hi Rob
Thanks for the cleanup. Please find my comments below.
On 14/07/2023 18:46, Rob Herring wrote:
> The DT of_device.h and of_platform.h date back to the separate
> of_platform_bus_type before it as merged into the regular platform bus.
> As part of that merge prepping Arm DT support 13 years ago, they
> "temporarily" include each other. They also include platform_device.h
> and of.h. As a result, there's a pretty much random mix of those include
> files used throughout the tree. In order to detangle these headers and
> replace the implicit includes with struct declarations, users need to
> explicitly include the correct includes.
>
> Signed-off-by: Rob Herring <robh(a)kernel.org>
> ---
> drivers/hwtracing/coresight/coresight-core.c | 2 +-
> drivers/hwtracing/coresight/coresight-platform.c | 3 +--
> 2 files changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c
> index 118fcf27854d..9fabe00a40d6 100644
> --- a/drivers/hwtracing/coresight/coresight-core.c
> +++ b/drivers/hwtracing/coresight/coresight-core.c
> @@ -17,7 +17,7 @@
> #include <linux/mutex.h>
> #include <linux/clk.h>
> #include <linux/coresight.h>
> -#include <linux/of_platform.h>
> +#include <linux/property.h>
> #include <linux/delay.h>
> #include <linux/pm_runtime.h>
This looks correct to me.
>
> diff --git a/drivers/hwtracing/coresight/coresight-platform.c b/drivers/hwtracing/coresight/coresight-platform.c
> index 3e2e135cb8f6..d94b0e77bcfc 100644
> --- a/drivers/hwtracing/coresight/coresight-platform.c
> +++ b/drivers/hwtracing/coresight/coresight-platform.c
> @@ -9,9 +9,8 @@
> #include <linux/slab.h>
> #include <linux/clk.h>
> #include <linux/of.h>
> -#include <linux/of_address.h>
> +#include <linux/of.h>
We already include of.h two lines above, so we could skip this.
> #include <linux/of_graph.h>
> -#include <linux/of_platform.h>
> #include <linux/platform_device.h>
> #include <linux/amba/bus.h>
> #include <linux/coresight.h>
Suzuki
On 6/20/2023 3:37 PM, Greg Kroah-Hartman wrote:
> On Tue, Jun 20, 2023 at 03:32:37PM +0800, Tao Zhang wrote:
>> Add the nodes to set value for DSB edge control and DSB edge
>> control mask. Each DSB subunit TPDM has maximum of n(n<16) EDCR
>> resgisters to configure edge control. DSB edge detection control
>> 00: Rising edge detection
>> 01: Falling edge detection
>> 10: Rising and falling edge detection (toggle detection)
>> And each DSB subunit TPDM has maximum of m(m<8) ECDMR registers to
>> configure mask. Eight 32 bit registers providing DSB interface
>> edge detection mask control.
>>
>> Signed-off-by: Tao Zhang <quic_taozha(a)quicinc.com>
>> ---
>> .../ABI/testing/sysfs-bus-coresight-devices-tpdm | 32 +++++
>> drivers/hwtracing/coresight/coresight-tpdm.c | 143 ++++++++++++++++++++-
>> drivers/hwtracing/coresight/coresight-tpdm.h | 22 ++++
>> 3 files changed, 196 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
>> index 2a82cd0..34189e4a 100644
>> --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
>> +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
>> @@ -60,3 +60,35 @@ Description:
>> Bit[3] : Set to 0 for low performance mode.
>> Set to 1 for high performance mode.
>> Bit[4:8] : Select byte lane for high performance mode.
>> +
>> +What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge_ctrl
>> +Date: March 2023
>> +KernelVersion 6.5
>> +Contact: Jinlong Mao (QUIC) <quic_jinlmao(a)quicinc.com>, Tao Zhang (QUIC) <quic_taozha(a)quicinc.com>
>> +Description:
>> + Read/Write a set of the edge control registers of the DSB
>> + in TPDM.
>> +
>> + Expected format is the following:
>> + <integer1> <integer2> <integer3>
> sysfs is "one value", not 3. Please never have to parse a sysfs file.
Do you mean sysfs file can only accept "one value"?
I see that more than one value are written to the sysfs file
"trigout_attach".
>
>> +static ssize_t dsb_edge_ctrl_show(struct device *dev,
>> + struct device_attribute *attr,
>> + char *buf)
>> +{
>> + struct tpdm_drvdata *drvdata = dev_get_drvdata(dev->parent);
>> + ssize_t size = 0;
>> + unsigned long bytes;
>> + int i;
>> +
>> + spin_lock(&drvdata->spinlock);
>> + for (i = 0; i < TPDM_DSB_MAX_EDCR; i++) {
>> + bytes = sysfs_emit_at(buf, size,
>> + "Index:0x%x Val:0x%x\n", i,
> Again, no, one value, no "string" needed to parse anything.
I also see other sysfs files can be read more than one value in other
drivers.
Is this "one value" limitation the usage rule of Linux sysfs system?
Or am I misunderstanding what you mean?
Best,
Tao
>
> greg k-h
On 11/07/2023 15:05, Greg Kroah-Hartman wrote:
> On Tue, Jul 11, 2023 at 03:05:36PM +0800, quanyang.wang(a)windriver.com wrote:
>> From: Quanyang Wang <quanyang.wang(a)windriver.com>
>>
>> For PREEMPT_RT kernel, spinlock_t locks become sleepable. The functions
>> etm_dying_cpu and etm_starting_cpu which call spin_lock/unlock run in
>> an irq-disabled context, this will trigger the following calltrace:
>>
>> BUG: sleeping function called from invalid context at kernel/locking/spinlock_rt.c:46
>> in_atomic(): 1, irqs_disabled(): 128, non_block: 0, pid: 25, name: migration/1
>> preempt_count: 1, expected: 0
>> RCU nest depth: 0, expected: 0
>> 1 lock held by migration/1/25:
>> #0: 82a7587c (&drvdata->spinlock){....}-{2:2}, at: etm_dying_cpu+0x28/0x54
>> Preemption disabled at:
>> [<801ec760>] cpu_stopper_thread+0x94/0x120
>> CPU: 1 PID: 25 Comm: migration/1 Not tainted 6.1.35-rt10-yocto-preempt-rt #30
>> Hardware name: Xilinx Zynq Platform
>> Stopper: multi_cpu_stop+0x0/0x174 <- __stop_cpus.constprop.0+0x48/0x88
>> unwind_backtrace from show_stack+0x18/0x1c
>> show_stack from dump_stack_lvl+0x58/0x70
>> dump_stack_lvl from __might_resched+0x14c/0x1c0
>> __might_resched from rt_spin_lock+0x4c/0x84
>> rt_spin_lock from etm_dying_cpu+0x28/0x54
>> etm_dying_cpu from cpuhp_invoke_callback+0x140/0x33c
>> cpuhp_invoke_callback from __cpuhp_invoke_callback_range+0xa4/0x104
>> __cpuhp_invoke_callback_range from take_cpu_down+0x7c/0xa8
>> take_cpu_down from multi_cpu_stop+0x15c/0x174
>> multi_cpu_stop from cpu_stopper_thread+0x9c/0x120
>> cpu_stopper_thread from smpboot_thread_fn+0x31c/0x360
>> smpboot_thread_fn from kthread+0x100/0x124
>> kthread from ret_from_fork+0x14/0x2c
>>
>> Convert struct etm_drvdata's spinlock to raw_spinlock to fix it.
>
> wait, why will a raw_spinlock fix this? Why not fix the root problem
> here, that of calling these locks inproperly in irq context?
>
> How is changing to a raw_spinlock going to fix the above splat?
>
> thanks,
>
> greg k-h
>
If it's just etm_starting_cpu() and etm_dying_cpu() as mentioned in the
commit message then can those spinlocks be removed?
Surely there can't be any concurrent access to the per-cpu data when the
hotplug callbacks are called?
James
> _______________________________________________
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