Hi,
As per my comments in the previous patch in this set....
On Mon, 27 Mar 2023 at 08:38, Hao Zhang <quic_hazha(a)quicinc.com> wrote:
>
> Hi Krzysztof,
>
> On 3/25/2023 7:49 PM, Krzysztof Kozlowski wrote:
> > On 24/03/2023 07:16, Hao Zhang wrote:
> >> Add new coresight-dummy.yaml file describing the bindings required
> >> to define coresight dummy trace in the device trees.
> >>
> >
> > Subject: drop second/last, redundant "YAML schema". The "dt-bindings"
> > prefix is already stating that these are bindings and all new must be DT
> > schema. You cannot add anything else, so this is redundant.
> >
> I will take your advice to drop redundant part of title in the next
> version of patch.
> >
> >> Signed-off-by: Hao Zhang <quic_hazha(a)quicinc.com>
> >> ---
> >> .../bindings/arm/qcom,coresight-dummy.yaml | 118 ++++++++++++++++++
> >> 1 file changed, 118 insertions(+)
> >> create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-dummy.yaml
> >>
> >> diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-dummy.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-dummy.yaml
> >> new file mode 100644
> >> index 000000000000..7b719b084d72
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-dummy.yaml
> >> @@ -0,0 +1,118 @@
> >> +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
> >> +# Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
> >> +%YAML 1.2
> >> +---
> >> +$id: http://devicetree.org/schemas/arm/qcom,coresight-dummy.yaml#
> >> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> >> +
> >> +title: QCOM Coresight Dummy component
> >> +
> >> +description: |
> >> + The Coresight Dummy component is for the specific devices that HLOS don't have
> >> + permission to access or configure. Such as Coresight sink EUD, some TPDMs etc.
> >> + So there need driver to register dummy devices as Coresight devices. Provide
> >> + Coresight API for dummy device operations, such as enabling and disabling
> >> + dummy devices. Build the Coresight path for dummy sink or dummy source for
> >> + debugging.
> >> +
> >> + The primary use case of the coresight dummy is to build path for dummy sink or
> >> + dummy source.
> >> +
> >> +maintainers:
> >> + - Mao Jinlong <quic_jinlmao(a)quicinc.com>
> >> + - Tao Zhang <quic_taozha(a)quicinc.com>
> >> + - Hao Zhang <quic_hazha(a)quicinc.com>
> >> +
> >> +select:
> >> + properties:
> >> + compatible:
> >> + contains:
> >> + enum:
> >> + - qcom,coresight-dummy
Can we have coresight-dummy-source and coresight-dummy-sink?
> >> + required:
> >> + - compatible
> >
> > Why do you need the select?
> >
> This is a mistake, will remove it in the next version of patch.
> >> +
> >> +properties:
> >> + $nodename:
> >> + pattern: "^dummy_.*(sink|source)_[0-9]+.*$"
> >
> > We do not enforce node names in individual bindings. Why do you need it?
> > Plus underscore is not even proper character...
> >
> I will remove this node.
>
> >> + compatible:
> >> + items:
> >
> > Drop items. You have only one item, so no need for list.
>
> I will take your advice and update it in the next version of patch.
>
> >> + - const: qcom,coresight-dummy
> >> +
> >> + qcom,dummy-sink:
> >> + type: boolean
> >> + description:
> >> + Indicates that the type of this coresight node is dummy sink.
> >
> > You just duplicated property name. Write something useful.
> >
> >> +
> >> + qcom,dummy-source:
> >> + type: boolean
> >> + description:
> >> + Indicates that the type of this coresight node is dummy source.
> >
> > You just duplicated property name. Write something useful.
> >
>
These properties not required if the compatible name is more specific
> Sure, I will add more details for it.
>
> >> +
> >> + out-ports:
> >> + description: |
> >
> > No need for |
> >
> >> + Output connections from the dummy source to Coresight Trace bus.
> >> + $ref: /schemas/graph.yaml#/properties/ports
> >> +
> >> + properties:
> >> + port:
> >> + description: Output connection from the dummy source to Coresight
> >> + Trace bus.
> >> + $ref: /schemas/graph.yaml#/properties/port
> >> +
> >> + in-ports:
> >> + description: |
> >
> > Ditto
> >
> I will remove it in the next version of patch.
>
> >> + Input connections from the CoreSight Trace bus to dummy sink.
> >> + $ref: /schemas/graph.yaml#/properties/ports
> >> +
> >> + properties:
> >> + port:
> >> + description: Input connection from the Coresight Trace bus to
> >> + dummy sink.
> >> + $ref: /schemas/graph.yaml#/properties/port
> >> +
> >> +required:
> >> + - compatible
> >> +
The binding should constrain out ports to dummy-source only, and in
ports to dummy sink only.
Regards
Mike
> >> +additionalProperties: false
> >> +
> >> +oneOf:
> >> + - required:
> >> + - qcom,dummy-sink
> >> + - required:
> >> + - qcom,dummy-source
> >> +
> >> +examples:
> >> + # minimum dummy sink definition. dummy sink connect to coresight replicator.
> >> + - |
> >> + dummy_sink_1 {
> >
> > Node names should be generic, so "sink"
> > https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetr…
> >
> >> + compatible = "qcom,coresight-dummy";
> >> + qcom,dummy-sink;
> >> +
> >> + in-ports {
> >> + port {
> >> + eud_in_replicator_swao: endpoint {
> >> + remote-endpoint =
> >> + <&replicator_swao_out_eud>;
> >
> > Why line break after =?
> >
>
> >> + };
> >> + };
> >> + };
> >> + };
> >> +
> >> + # minimum dummy source definition. dummy source connect to coresight funnel.
> >
> > If you use sentences, then start with capital letter.
> >
>
> I will update it according to your advice in the next version of patch.
>
> >> + - |
> >> + dummy_source_1 {
> >> + compatible = "qcom,coresight-dummy";
> >> + qcom,dummy-source;
> >> +
> >> + out-ports {
> >> + port {
> >> + dummy_riscv_out_funnel_swao: endpoint {
> >> + remote-endpoint =
> >> + <&funnel_swao_in_dummy_riscv>;
> >
> > Why line break?
>
> I copy it from device tree and keep the original format, will correct
> the format in the next version of patch.
>
> Thanks,
> Hao
>
> >> + };
> >> + };
> >> + };
> >> + };
> >> +
> >> +...
> >
> > Best regards,
> > Krzysztof
> >
--
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK
On 28/03/2023 01:53, Yang Shi wrote:
> Hi Leo,
>
> Just follow up on this one. Any update?
>
Hi Yang,
Sorry no update on this yet from me. I was just finishing off
"coresight: Fix CTI module refcount leak by making it a helper device"
which I hope to post in the next day or two and then I will start on this.
James
> Thanks,
> Yang
>
> On Mon, Mar 13, 2023 at 5:36 PM Leo Yan <leo.yan(a)linaro.org> wrote:
>>
>> On Mon, Mar 13, 2023 at 11:15:44AM -0700, Yang Shi wrote:
>>
>> [...]
>>
>>>> Just a quick summary, here we have two issues:
>>>>
>>>> - With command:
>>>> perf record -e cs_etm/@tmc_etf63/k --kcore --per-thread \
>>>> -- taskset --cpu-list 1 uname",
>>>>
>>>> perf doesn't enable "text poke" attribution.
>>>
>>> No, it enables "text poke" and perf fails to decode coresight trace
>>> data too. It doesn't matter whether "--kcore" is after or before "-e
>>> cs/etm/@tmc_etf63/k".
>>
>> Understand now. Thanks for correction, if so we can ignore this one.
>>
>> Leo
Check whether the CPU corresponding to the CPU CTI is activated.
If it is not activated, the CPU CTI node should not exist, and
an error will be returned in the initialization function.
Signed-off-by: Tao Zhang <quic_taozha(a)quicinc.com>
---
drivers/hwtracing/coresight/coresight-cti-core.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-cti-core.c b/drivers/hwtracing/coresight/coresight-cti-core.c
index 277c890..aaa83ae 100644
--- a/drivers/hwtracing/coresight/coresight-cti-core.c
+++ b/drivers/hwtracing/coresight/coresight-cti-core.c
@@ -899,10 +899,12 @@ static int cti_probe(struct amba_device *adev, const struct amba_id *id)
drvdata->config.hw_powered = true;
/* set up device name - will depend if cpu bound or otherwise */
- if (drvdata->ctidev.cpu >= 0)
+ if (drvdata->ctidev.cpu >= 0) {
+ if (!cpu_active(drvdata->ctidev.cpu))
+ return -ENXIO;
cti_desc.name = devm_kasprintf(dev, GFP_KERNEL, "cti_cpu%d",
drvdata->ctidev.cpu);
- else
+ } else
cti_desc.name = coresight_alloc_device_name(&cti_sys_devs, dev);
if (!cti_desc.name)
return -ENOMEM;
--
2.7.4
On 24/03/2023 06:16, Hao Zhang wrote:
> Add documentation for Coresight Dummy Trace under trace/coresight.
>
> Signed-off-by: Hao Zhang <quic_hazha(a)quicinc.com>
> ---
> .../trace/coresight/coresight-dummy.rst | 58 +++++++++++++++++++
> 1 file changed, 58 insertions(+)
> create mode 100644 Documentation/trace/coresight/coresight-dummy.rst
>
> diff --git a/Documentation/trace/coresight/coresight-dummy.rst b/Documentation/trace/coresight/coresight-dummy.rst
> new file mode 100644
> index 000000000000..819cabab8623
> --- /dev/null
> +++ b/Documentation/trace/coresight/coresight-dummy.rst
> @@ -0,0 +1,58 @@
> +.. SPDX-License-Identifier: GPL-2.0
> +
> +=============================
> +Coresight Dummy Trace Module
> +=============================
> +
> + :Author: Hao Zhang <quic_hazha(a)quicinc.com>
> + :Date: March 2023
> +
> +Introduction
> +---------------------------
> +
> +Coresight Dummy Trace Module is for the specific devices that HLOS don't
Please do not use cryptic abbreviations, please use "kernel"
> +have permission to access or configure.
Such as Coresight sink EUD, some
> +TPDMs etc.
Say "e.g., CoreSight TPDMs on Qualcomm platforms.:
So there need driver to register dummy devices as Coresight
> +devices.
Add:
"It may also be used to define components that may not have any
programming interfaces (e.g, static links), so that paths can
be established in the driver.
"
Provide Coresight API for dummy device operations, such as
> +enabling and disabling dummy devices. Build the Coresight path for dummy
> +sink or dummy source for debugging.
I think the following content may not be needed as they are part
of the standard source/sink type devices, nothing specific to
dummy devices.
--- vvvvv ---
> +
> +Sysfs files and directories
> +---------------------------
> +
> +Root: ``/sys/bus/coresight/devices/dummy<N>``
> +
> +----
> +
> +:File: ``enable_source`` (RW)
> +:Notes:
> + - > 0 : enable the datasets of dummy source.
> +
> + - = 0 : disable the datasets of dummy source.
> +
> +:Syntax:
> + ``echo 1 > enable_source``
> +
> +----
> +
> +:File: ``enable_sink`` (RW)
> +:Notes:
> + - > 0 : enable the datasets of dummy sink.
> +
> + - = 0 : disable the datasets of dummy sink.
> +
> +:Syntax:
> + ``echo 1 > enable_sink``
> +
> +----
> +
--- You may remove the above ^^^ ----
> +Config details
> +---------------------------
> +
> +There are two types of nodes, dummy sink and dummy source. The nodes
> +should be observed at the coresight path
> +"/sys/bus/coresight/devices".
> +e.g.
> +/sys/bus/coresight/devices # ls -l | grep dummy
> +dummy0 -> ../../../devices/platform/soc@0/soc@0:dummy_source/dummy0
> +dummy1 -> ../../../devices/platform/soc@0/soc@0:dummy_sink/dummy1
Suzuki
On 24/03/2023 06:16, Hao Zhang wrote:
> Add new coresight-dummy.yaml file describing the bindings required
> to define coresight dummy trace in the device trees.
>
> Signed-off-by: Hao Zhang <quic_hazha(a)quicinc.com>
> ---
> .../bindings/arm/qcom,coresight-dummy.yaml | 118 ++++++++++++++++++
> 1 file changed, 118 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-dummy.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-dummy.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-dummy.yaml
> new file mode 100644
> index 000000000000..7b719b084d72
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-dummy.yaml
> @@ -0,0 +1,118 @@
> +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
> +# Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/qcom,coresight-dummy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: QCOM Coresight Dummy component
As mentioned in the previous email, please make this Arm CoreSight. This
is not specific to Qcom, rather something the CoreSight driver exposes
as a dummy framework. Otherwise looks good to me.
Suzuki
Greg,
Please find a couple of fixes for coresight self-hosted tracing for v6.3. Kindly
consider pulling.
Suzuki
The following changes since commit eeac8ede17557680855031c6f305ece2378af326:
Linux 6.3-rc2 (2023-03-12 16:36:44 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git tags/coresight-fixes-v6.3
for you to fetch changes up to 735e7b30a53a1679c050cddb73f5e5316105d2e3:
coresight: etm4x: Do not access TRCIDR1 for identification (2023-03-21 12:31:02 +0000)
----------------------------------------------------------------
coresight: Fixes for v6.3
Fixes for coresight subsystem includes:
- Fix etm4_enable_hw to program all the address comparator pairs (instead of
half of them)
- Do not access TRCIDR1 register without OSLK cleared in etm4_probe for mmio
access.
Signed-off-by: Suzuki K Poulose <suzuki.poulose(a)arm.com>
----------------------------------------------------------------
Steve Clevenger (1):
coresight-etm4: Fix for() loop drvdata->nr_addr_cmp range bug
Suzuki K Poulose (1):
coresight: etm4x: Do not access TRCIDR1 for identification
drivers/hwtracing/coresight/coresight-etm4x-core.c | 24 +++++++++-------------
drivers/hwtracing/coresight/coresight-etm4x.h | 20 ++++++------------
2 files changed, 16 insertions(+), 28 deletions(-)