On 12/20/2023 9:21 PM, Krzysztof Kozlowski wrote:
On 20/12/2023 14:07, Jinlong Mao wrote:
On 12/20/2023 8:46 PM, Krzysztof Kozlowski wrote:
On 20/12/2023 13:40, Mao Jinlong wrote:
Add coresight components on Qualcomm SM8450 Soc. The components include TMC ETF/ETR, ETE, STM, TPDM, CTI.
Signed-off-by: Mao Jinlong quic_jinlmao@quicinc.com
arch/arm64/boot/dts/qcom/sm8450.dtsi | 742 +++++++++++++++++++++++++++ 1 file changed, 742 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 1783fa78bdbc..112b5a069c94 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -285,6 +285,192 @@ CLUSTER_SLEEP_1: cluster-sleep-1 { }; };
- ete0 {
ete-0
Thanks for the review.
In arm,embedded-trace-extension.yaml, the node name pattern is "^ete([0-9a-f]+)$".
I don't understand why this binding requires ete name. It's not like it is a generic name worth preserving. Also, the recommended suffix for names is with '-'.
The number in the ete name should be the same as the number of the CPU. So we can know which CPU this ete belongs to from the name.
I will update the binding in arm,embedded-trace-extension.yaml.
Thanks Jinlong Mao
Best regards, Krzysztof