CMB (continuous multi-bit) is one of TPDM's dataset type. CMB subunit can be enabled for data collection by writing 1 to the first bit of CMB_CR register. This change is to add enable/disable function for CMB dataset by writing CMB_CR register.
Signed-off-by: Mao Jinlong quic_jinlmao@quicinc.com --- drivers/hwtracing/coresight/coresight-tpdm.c | 30 ++++++++++++++++++-- drivers/hwtracing/coresight/coresight-tpdm.h | 9 ++++++ 2 files changed, 37 insertions(+), 2 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c b/drivers/hwtracing/coresight/coresight-tpdm.c index 3240bc4a8b30..d92432329c9c 100644 --- a/drivers/hwtracing/coresight/coresight-tpdm.c +++ b/drivers/hwtracing/coresight/coresight-tpdm.c @@ -149,6 +149,17 @@ static void tpdm_enable_dsb(struct tpdm_drvdata *drvdata) writel_relaxed(val, drvdata->base + TPDM_DSB_CR); }
+static void tpdm_enable_cmb(struct tpdm_drvdata *drvdata) +{ + u32 val; + + val = readl_relaxed(drvdata->base + TPDM_CMB_CR); + val |= TPDM_CMB_CR_ENA; + + /* Set the enable bit of CMB control register to 1 */ + writel_relaxed(val, drvdata->base + TPDM_CMB_CR); +} + /* TPDM enable operations */ /* The TPDM or Monitor serves as data collection component for various * dataset types. It covers Basic Counts(BC), Tenure Counts(TC), @@ -160,9 +171,11 @@ static void __tpdm_enable(struct tpdm_drvdata *drvdata) { CS_UNLOCK(drvdata->base);
- /* Check if DSB datasets is present for TPDM. */ + /* Enable dataset packets */ if (drvdata->datasets & TPDM_PIDR0_DS_DSB) tpdm_enable_dsb(drvdata); + if (drvdata->datasets & TPDM_PIDR0_DS_CMB) + tpdm_enable_cmb(drvdata);
CS_LOCK(drvdata->base); } @@ -196,14 +209,27 @@ static void tpdm_disable_dsb(struct tpdm_drvdata *drvdata) writel_relaxed(val, drvdata->base + TPDM_DSB_CR); }
+static void tpdm_disable_cmb(struct tpdm_drvdata *drvdata) +{ + u32 val; + + val = readl_relaxed(drvdata->base + TPDM_CMB_CR); + val &= ~TPDM_CMB_CR_ENA; + + /* Set the enable bit of CMB control register to 0 */ + writel_relaxed(val, drvdata->base + TPDM_CMB_CR); +} + /* TPDM disable operations */ static void __tpdm_disable(struct tpdm_drvdata *drvdata) { CS_UNLOCK(drvdata->base);
- /* Check if DSB datasets is present for TPDM. */ + /* Disable dataset packet */ if (drvdata->datasets & TPDM_PIDR0_DS_DSB) tpdm_disable_dsb(drvdata); + if (drvdata->datasets & TPDM_PIDR0_DS_CMB) + tpdm_disable_cmb(drvdata);
CS_LOCK(drvdata->base); } diff --git a/drivers/hwtracing/coresight/coresight-tpdm.h b/drivers/hwtracing/coresight/coresight-tpdm.h index 355a499635c2..4c065a4b8a75 100644 --- a/drivers/hwtracing/coresight/coresight-tpdm.h +++ b/drivers/hwtracing/coresight/coresight-tpdm.h @@ -9,6 +9,13 @@ /* The max number of the datasets that TPDM supports */ #define TPDM_DATASETS 7
+/* CMB Subunit Registers*/ +/*CMB subunit global control register*/ +#define TPDM_CMB_CR (0xA00) + +/* Enable bit for CMB subunit */ +#define TPDM_CMB_CR_ENA BIT(0) + /* DSB Subunit Registers */ #define TPDM_DSB_CR (0x780) #define TPDM_DSB_TIER (0x784) @@ -65,10 +72,12 @@ * * PERIPHIDR0[0] : Fix to 1 if ImplDef subunit present, else 0 * PERIPHIDR0[1] : Fix to 1 if DSB subunit present, else 0 + * PERIPHIDR0[2] : Fix to 1 if CMB subunit present, else 0 */
#define TPDM_PIDR0_DS_IMPDEF BIT(0) #define TPDM_PIDR0_DS_DSB BIT(1) +#define TPDM_PIDR0_DS_CMB BIT(2)
#define TPDM_DSB_MAX_LINES 256 /* MAX number of EDCR registers */