On Fri, Oct 03, 2025 at 12:42:39PM +0100, Mike Leach wrote:
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@@ -502,6 +503,10 @@ static void coresight_disable_path_from(struct coresight_path *path, CORESIGHT_DEV_TYPE_SINK : CORESIGHT_DEV_TYPE_LINK;
/* To reduce latency, CPU idle does not touch the sink */if (in_idle && type == CORESIGHT_DEV_TYPE_SINK)continue;Why not - if this is the last/only active path then you absolutely want to disable the sink to flush trace through the system. If it is not, then the disable sink will simply reduce the refcount by one.
CPU idle is latency sensitive, and the CPU can enter and exit low power states frequently.
And ETR uses a bounce buffer. If we disable the sink in the idle path, that not only disables the sink but also copies data from the bounce buffer to the perf AUX ring buffer, which can introduce significant latency. Given the latency is not constrained, this is why we don't disable sink for CPUidle.
To be clear, we will disable sink for CPU hotplug case, in this case, CPU hotplug itself usually has no high requirement for latency, and we will expect CPU hotplug does not happen frequently, thus it makes sense to disable sink (and copying trace data).
Thanks, Leo