On 03/03/2025 03:29, Jie Gan wrote:
The Coresight TMC Control Unit hosts miscellaneous configuration registers which control various features related to TMC ETR sink.
Based on the trace ID, which is programmed in the related CTCU ATID register of a specific ETR, trace data with that trace ID gets into the ETR buffer, while other trace data gets dropped.
Enabling source device sets one bit of the ATID register based on source device's trace ID. Disabling source device resets the bit according to the source device's trace ID.
Reviewed-by: James Clark james.clark@linaro.org Signed-off-by: Jie Gan quic_jiegan@quicinc.com
...
--- /dev/null +++ b/drivers/hwtracing/coresight/coresight-ctcu.h @@ -0,0 +1,39 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/*
- Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
- */
+#ifndef _CORESIGHT_CTCU_H +#define _CORESIGHT_CTCU_H +#include "coresight-trace-id.h"
+/* Maximum number of supported ETR devices for a single CTCU. */ +#define ETR_MAX_NUM 2
WARNING: please, no space before tabs #413: FILE: drivers/hwtracing/coresight/coresight-ctcu.h:11: +#define ETR_MAX_NUM ^I2$
total: 0 errors, 2 warnings, 397 lines checked
Another checkpatch warning. Please take care in the future.
Suzuki