Hi Yabin,
On Tue, 17 Sep 2019 at 15:53, Yabin Cui yabinc@google.com wrote:
Hi guys,
I am trying to reduce ETM data lose. There seems to have two types of data lose:
- caused by instruction trace buffer overflow, which generates an Overflow packet after recovering.
- caused by ETR buffer overflow, which generates an PERF_RECORD_AUX with PERF_AUX_FLAG_TRUNCATED.
In practice, the second one is unlikely to happen when I set ETR buffer size to 4M, and can be improved by setting higher buffer size. The first one happens much more frequently, can happen about 21K times when generating 5.3M etm data. So I want to know if there is any way to reduce that.
I found in the ETM arch manual that the overflow seems controlled by TRCSTALLCTLR, a stall control register. But TRCIDR3.NOOVERFLOW is not supported on my experiment device, which seems using qualcomm sdm845. TRCSTALLCTLR.ISTALL seems can be set by writing to mode file in /sys. But I didn't find any way to set TRCSTALLCTLR.LEVEL in linux kernel. So I wonder if it is ever used.
Do you guys have any suggestions?
In order to get a timely response to your questions I advise to CC the coresight mailing list (which I have included). There is a lot of knowledgeable people there that can also help, especially with architecture specific configuration.
TRCSTALLCTLR.LEVEL is currently not accessible to users because we simply never needed to use the feature. If using the ISTALL and LEVEL parameters help with your use case send a patch that exposes the entire TRCSTALLCTLR register (rather than just the LEVEL field) and I'll be happy to fold it in.
Thanks, Mathieu
Best, Yabin