Hi Suzuki,
Currently if the dsb_esize is not set to 32 or 64, we will not set the DSBSIZE bit of the register here.
This design is really not good enough.
I will change this in the next version of patch to issue a warning if an unexpected value is obtained.
在 2/22/2023 8:46 PM, Suzuki K Poulose 写道:
On 19/01/2023 07:41, Tao Zhang wrote:
Read the DSB element size from the device tree. Set the register bit that controls the DSB element size of the corresponding port.
Signed-off-by: Tao Zhang quic_taozha@quicinc.com Signed-off-by: Tao Zhang taozha@qti.qualcomm.com
drivers/hwtracing/coresight/coresight-tpda.c | 62 ++++++++++++++++++++++++++++ drivers/hwtracing/coresight/coresight-tpda.h | 4 ++ 2 files changed, 66 insertions(+)
diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/hwtracing/coresight/coresight-tpda.c index 5989798..be13e08 100644 --- a/drivers/hwtracing/coresight/coresight-tpda.c +++ b/drivers/hwtracing/coresight/coresight-tpda.c @@ -37,6 +37,15 @@ static void tpda_enable_port(struct tpda_drvdata *drvdata, int port) u32 val; val = readl_relaxed(drvdata->base + TPDA_Pn_CR(port)); + /* + * Configure aggregator port n DSB data set element size + * Set the bit to 0 if the size is 32 + * Set the bit to 1 if the size is 64 + */ + if (drvdata->dsb_esize[port] == 32) + val &= ~TPDA_Pn_CR_DSBSIZE; + else if (drvdata->dsb_esize[port] == 64) + val |= TPDA_Pn_CR_DSBSIZE;
What are the chances of having a value other than 32 or 64 ? What should we do in that case ? Should the driver at least give out a warning at least in the unhandled case rather than silently reusing the existing setting ?
Suzuki
Best,
Tao