Hi Mike,
Thanks for the hints. I combined the in- and out-ports into a single ports node, which made all errors except OF: amba_device_add() failed (-19) for /funnel_bccplex@73001000 disappear. However, with the modified .dtsi configuration I attached, only the replicator and the STM (again, at the 2nd try) get initialized. Do you have an idea how to also have the other CoreSight devices initialized?
Regarding the "coresight-default-sink" attribute: The Nvidia developers included it in a DT configuration for another Nvidia SoC (Orin / tegra234), so I copied it for mine. At first glance, it did not seem to be a problem. Would you recommend removing it?
Best regards, Vincent
________________________________ From: Mike Leach mike.leach@linaro.org Sent: Wednesday, January 8, 2025 16:48 To: vincent.ernst@web.de vincent.ernst@web.de Cc: coresight@lists.linaro.org coresight@lists.linaro.org Subject: Re: CoreSight on Nvidia Jetson
Hi Vincent
A couple of observations that might help...
On Fri, 3 Jan 2025 at 10:59, vincent.ernst@web.de vincent.ernst@web.de wrote:
Hi Suzuki,
thanks for the reply! The CPUs of the boards I am using are all based on Arm-v8(.2), but I found the components' addresses in the manuals of the SoCs.
I managed to modify the Devicetree by writing my own .dtsi file (see attachment) and finally got the CoreSight devices in /sys/devices/.
However, dmesg shows the following: [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Linux version 4.9.253-coresight (user@user-desktop) (gcc version 7.5.0 (Ubuntu/Linaro 7.5.0-3ubuntu1~18.04) ) #1 SMP PREEMPT Wed Jan 1 18:45:04 CET 2025 [ 0.000000] Boot CPU: AArch64 Processor [411fd071] (omitted 87 lines) [ 0.212039] DTS File Name: /home/user/Downloads/Linux_for_Tegra/source/public/kernel/kernel-4.9/arch/arm64/boot/dts/../../../../../../hardware/nvidia/platform/t210/porg/kernel-dts/tegra210-p3448-0000-p3449-0000-a02.dts [ 0.212045] DTB Build time: Jan 1 2025 16:04:45 (omitted 35 lines) [ 0.420616] DTS File Name: /home/user/Downloads/Linux_for_Tegra/source/public/kernel/kernel-4.9/arch/arm64/boot/dts/../../../../../../hardware/nvidia/platform/t210/porg/kernel-dts/tegra210-p3448-0000-p3449-0000-a02.dts [ 0.420622] DTB Build time: Jan 1 2025 16:04:45 (omitted 75 lines) [ 0.524166] OF: amba_device_add() failed (-19) for /funnel_bccplex@73001000 (omitted 367 lines) [ 1.330484] OF: graph: no port node found in /etf@72030000
the in-ports { port { } }
out-ports { port { } }
paradigm was not introduced till about kernel version 4.12 - you appear to be using kernel version 4.9. DTS and the drivers themselves were modified at this time.
I am wondering if that is causing some of your issues.
Additionally the attribute "coresight-default-sink" is not one that appears to be valid in the current drivers, or has ever been valid as far as I recall.
Regards
Mike
[ 1.330757] OF: graph: no port node found in /etr@72050000 [ 1.330987] OF: graph: no port node found in /funnel_major@72010000 [ 1.331238] OF: graph: no port node found in /ptm0@73440000 [ 1.331451] coresight-etm4x 73440000.ptm0: CPU0: Cortex-A57 ETM v4.0 initialized [ 1.331482] OF: graph: no port node found in /ptm1@73540000 [ 1.331689] coresight-etm4x 73540000.ptm1: CPU1: Cortex-A57 ETM v4.0 initialized [ 1.331719] OF: graph: no port node found in /ptm2@73640000 [ 1.331938] coresight-etm4x 73640000.ptm2: CPU2: Cortex-A57 ETM v4.0 initialized [ 1.331944] extcon-disp-state extcon:disp-state: cable 47 state 0 [ 1.331946] Extcon AUX1(HDMI) disable [ 1.331976] OF: graph: no port node found in /ptm3@73740000 [ 1.332192] coresight-etm4x 73740000.ptm3: CPU3: Cortex-A57 ETM v4.0 initialized [ 1.332250] OF: graph: no port node found in /replicator@72040000 [ 1.332305] coresight-replicator-qcom 72040000.replicator: REPLICATOR 1.0 initialized [ 1.332350] OF: graph: no port node found in /stm@72070000 [ 1.332386] coresight-stm 72070000.stm: stm_register_device failed, probing deffered (omitted 64 lines) [ 1.411751] OF: graph: no port node found in /stm@72070000 [ 1.412025] coresight-stm 72070000.stm: STM32 initialized (omitted 212 lines)
Do you have an idea what I did wrong? In the end, I want to be able to follow the steps described here: https://docs.nvidia.com/jetson/archives/l4t-archived/l4t-3275/index.html#pag...
Best regards, Vincent
(P.S. There was a problem sending this email a first time, but it should work now) _______________________________________________ CoreSight mailing list -- coresight@lists.linaro.org To unsubscribe send an email to coresight-leave@lists.linaro.org
-- Mike Leach Principal Engineer, ARM Ltd. Manchester Design Centre. UK