Hi
Looks good from a driver / hw perspective. As long as the device tree people are happy with the binding then this set seems OK to me.
Regards
Mike
On Wed, 1 Sept 2021 at 14:11, Tanmay Jagdale tanmay@marvell.com wrote:
Add a new device tree parameter, "arm,max-burst-size" to configure the max burst size that can be initiated by TMC-ETR on the AXI bus.
Also add description of this property in coresight documentation.
This patch series applies on top of the coresight next branch [1]. https://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git/log/?h=n...
Tanmay Jagdale (2): dt-bindings: coresight: Add burst size for TMC coresight: tmc: Configure AXI write burst size
.../devicetree/bindings/arm/coresight.txt | 5 +++++ .../hwtracing/coresight/coresight-tmc-core.c | 21 +++++++++++++++++-- .../hwtracing/coresight/coresight-tmc-etr.c | 3 ++- drivers/hwtracing/coresight/coresight-tmc.h | 6 +++++- 4 files changed, 31 insertions(+), 4 deletions(-)
-- 2.25.1