This patch series is to add support for a streaming interface for TMC ETR to allow for continuous log collection to secondary storage. An interrupt based mechanism is used to stream out the data from the device.
QDSS_CS_QDSSCSR_ETRIRQCTRL register is used to set the IRQ byte counter value. The value of this registers defines the number of bytes that when moved by the ETR AXI interface. It will casues an interrupt which can be used by an userspace program to know how much data is present in memory requiring copy to some other location. A zero setting disables the interrupt.A one setting means 8 bytes, two 16 bytes, etc. In other words, the value in this register is the interrupt threshold times 8 bytes. ETR must be enabled when use this interrupt function.
Sample: echo 4096 > /sys/bus/coresight/devices/csr0/etr_byte_cntr_val echo 1 > /sys/bus/coresight/devices/tmc_etr0/enable_sink echo 1 > /sys/bus/coresight/devices/stm0/enabl_source
cat /dev/byte-cntr > /data/qdss.bin &
The log collection will stop after disabling the ETR.
codelinaro link: https://git.codelinaro.org/clo/linux-kernel/coresight/-/commits/coresight-by...
Change in V2: Make CSR device as a helper device of ETR device. When enable ETR, it will enable CSR byte-cntr function.
Mao Jinlong (3): Coresight: Add driver to support for CSR dt-bindings: arm: Adds CoreSight CSR hardware definitions coresight-csr: Add support for streaming interface for ETR
.../testing/sysfs-bus-coresight-devices-csr | 6 + .../bindings/arm/qcom,coresight-csr.yaml | 130 ++++++ MAINTAINERS | 2 +- drivers/hwtracing/coresight/Kconfig | 12 + drivers/hwtracing/coresight/Makefile | 2 + drivers/hwtracing/coresight/coresight-core.c | 31 +- .../coresight/coresight-csr-bytecntr.c | 275 ++++++++++++ .../hwtracing/coresight/coresight-csr-core.c | 393 ++++++++++++++++++ drivers/hwtracing/coresight/coresight-csr.h | 112 +++++ drivers/hwtracing/coresight/coresight-priv.h | 8 + .../hwtracing/coresight/coresight-tmc-etr.c | 3 +- drivers/hwtracing/coresight/coresight-tmc.h | 2 + include/dt-bindings/arm/coresight-csr-dt.h | 12 + include/linux/coresight.h | 3 +- 14 files changed, 984 insertions(+), 7 deletions(-) create mode 100644 Documentation/ABI/testing/sysfs-bus-coresight-devices-csr create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-csr.yaml create mode 100644 drivers/hwtracing/coresight/coresight-csr-bytecntr.c create mode 100644 drivers/hwtracing/coresight/coresight-csr-core.c create mode 100644 drivers/hwtracing/coresight/coresight-csr.h create mode 100644 include/dt-bindings/arm/coresight-csr-dt.h