Based on the discussion [1], this patch series is to refine the memory barriers for AUX ring buffer.
Patches 01 ~ 04 to address the barriers usage in the kernel. The first patch is to make clear comment for how to use the barriers between the data store and aux_head store, this asks the driver to make sure the data is visible. Patches 02 ~ 04 is to refine the drivers for barriers after the data store.
Patches 05 ~ 07 is to fix and clean up the memory barries in perf tool for AUX ring buffer.
Since the 64-bit value's atomicity is not promised on 32-bit perf, the last patch is to report error and let perf to directly exit for this case.
Have testes the patches on Arm64 Juno platform.
[1] https://lore.kernel.org/patchwork/patch/1431867/
Leo Yan (8): perf/ring_buffer: Add comment for barriers on AUX ring buffer coresight: tmc-etr: Add barrier after updating AUX ring buffer coresight: tmc-etf: Add comment for store ordering perf/x86: Add barrier after updating bts perf auxtrace: Change to use SMP memory barriers perf auxtrace: Drop legacy __sync functions perf auxtrace: Use WRITE_ONCE() for updating aux_tail perf record: Directly bail out for compat case
arch/x86/events/intel/bts.c | 3 +++ .../hwtracing/coresight/coresight-tmc-etf.c | 6 +++++ .../hwtracing/coresight/coresight-tmc-etr.c | 8 ++++++ kernel/events/ring_buffer.c | 9 +++++++ tools/perf/builtin-record.c | 17 ++++++++++++ tools/perf/util/auxtrace.h | 27 +++---------------- 6 files changed, 47 insertions(+), 23 deletions(-)