[PATCH v5 4/9] perf/x86: Add compiler barrier after updating BTS

Since BTS is coherent, simply add a compiler barrier to separate the BTS update and aux_head store.

Signed-off-by: Leo Yan leo.yan@linaro.org --- arch/x86/events/intel/bts.c | 6 ++++++ 1 file changed, 6 insertions(+)

diff --git a/arch/x86/events/intel/bts.c b/arch/x86/events/intel/bts.c index 6320d2cfd9d3..974e917e65b2 100644 --- a/arch/x86/events/intel/bts.c +++ b/arch/x86/events/intel/bts.c @@ -209,6 +209,12 @@ static void bts_update(struct bts_ctx *bts) } else { local_set(&buf->data_size, head); } + + /* + * Since BTS is coherent, just add compiler barrier to ensure + * BTS updating is ordered against bts::handle::event. + */ + barrier(); }

static int