Hi Poonam,
Please CC the coresight mailing list (as I did) when asking questions - there is a lot of well informed people on there that can also help you.
On Thu, 23 Jan 2020 at 22:33, Poonam Aggrwal poonam.aggrwal@nxp.com wrote:
Hello Mathieu
Greetings!
I have started to take a look at the Linux coresight framework, and get this enabled on a NXP ARMv8 device.
Can you share some documentation on the configs required to be enabled and the device tree nodes?
For V8 we have to reference implementation - ARM Juno and the dragonboard 410c. I highly recommend purchasing the latter (because it is very cheap) in order to get an understanding of what a working coresight system look like. It is much easier to start from a working example than nothing at all. Other than that the coresight bindings [1] are full of good examples. I would also have a look at the DT for Juno [2] and the dragonboard[3]. The HOWTO.md [4] on github is a really good starting point when you'll get to test things out.
[1]. https://elixir.bootlin.com/linux/latest/source/Documentation/devicetree/bind... [2]. https://elixir.bootlin.com/linux/latest/source/arch/arm64/boot/dts/arm/juno-... [3]. https://elixir.bootlin.com/linux/latest/source/arch/arm64/boot/dts/qcom/msm8... [4]. https://github.com/Linaro/OpenCSD/blob/master/HOWTO.md
To start I am looking to enable the ARMv8 ETM tracing.
Before going further I advise you to look at the source and sink configuration on your platform. Up to now we've been working with configurations where sources share a single sink (N:1 topology). Newer SoC will have one source per sink (1:1 topology). At this time only the former is supported by the framework. Supporting 1:1 topologies would require a fair amount of refactoring, something we haven't had the opportunity to do for lack of HW platform to work with.
Regards, Mathieu
Is there a reference which I can check in Linux for device tree and config.
Many Thanks
Poonam