Hi Mathieu,
On Fri, 26 Mar 2021 16:55:50 +0000, Mathieu Poirier mathieu.poirier@linaro.org wrote:
On Tue, Mar 23, 2021 at 12:06:35PM +0000, Suzuki K Poulose wrote:
For a nvhe host, the EL2 must allow the EL1&0 translation regime for TraceBuffer (MDCR_EL2.E2TB == 0b11). This must be saved/restored over a trip to the guest. Also, before entering the guest, we must flush any trace data if the TRBE was enabled. And we must prohibit the generation of trace while we are in EL1 by clearing the TRFCR_EL1.
For vhe, the EL2 must prevent the EL1 access to the Trace Buffer.
Cc: Will Deacon will@kernel.org Cc: Catalin Marinas catalin.marinas@arm.com Cc: Marc Zyngier maz@kernel.org Cc: Mark Rutland mark.rutland@arm.com Cc: Anshuman Khandual anshuman.khandual@arm.com Acked-by: Mathieu Poirier mathieu.poirier@linaro.org Signed-off-by: Suzuki K Poulose suzuki.poulose@arm.com
arch/arm64/include/asm/el2_setup.h | 13 +++++++++ arch/arm64/include/asm/kvm_arm.h | 2 ++ arch/arm64/include/asm/kvm_host.h | 2 ++ arch/arm64/kernel/hyp-stub.S | 3 ++- arch/arm64/kvm/debug.c | 6 ++--- arch/arm64/kvm/hyp/nvhe/debug-sr.c | 42 ++++++++++++++++++++++++++++++ arch/arm64/kvm/hyp/nvhe/switch.c | 1 + 7 files changed, 65 insertions(+), 4 deletions(-)
Marc - do you want me to pick up this one?
I just went through the KVM patch, and I have a couple of question that Suzuki can hopefully address quickly enough. As for merging it via your tree, I'm worried that it will conflict with other patches that are in flight.
We can hopefully set up a stable branch between the two trees.
Thanks,
M.