-----Original Message----- From: James Clark james.clark@arm.com Sent: Wednesday, August 16, 2023 10:36 PM To: Linu Cherian lcherian@marvell.com; suzuki.poulose@arm.com; mike.leach@linaro.org; mathieu.poirier@linaro.org Cc: coresight@lists.linaro.org; Anil Kumar Reddy H areddy3@marvell.com; Tanmay Jagdale tanmay@marvell.com; George Cherian gcherian@marvell.com Subject: [EXT] Re: [RFC PATCH v2 1/7] dt-bindings: arm: coresight-tmc: Add "memory-region" property
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On 13/07/2023 14:47, Linu Cherian wrote:
memory-region 0: Reserved trace buffer memory
TMC ETR: When available, use this reserved memory region for trace data capture. Same region is used for trace data retention after a panic or watchdog reset.
TMC ETF: When available, use this reserved memory region for trace data retention synced from internal SRAM after a panic or watchdog reset.
memory-region 1: Reserved meta data memory
TMC ETR, ETF: When available, use this memory for register snapshot retention synced from hardware registers after a panic or watchdog reset.
Signed-off-by: Linu Cherian lcherian@marvell.com
.../devicetree/bindings/arm/arm,coresight-tmc.yaml | 9 +++++++++ 1 file changed, 9 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml index cb8dceaca70e..10da9331c165 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml @@ -101,6 +101,13 @@ properties: and ETF configurations. $ref: /schemas/graph.yaml#/properties/port
- memory-region:
- items:
- description: Reserved trace buffer memory. Used for ETR and ETFconfigurations.- description: Reserved meta data memory. Used for ETR and ETFconfigurations.I don't see why you couldn't take the more detailed explanation from the commit message and put it here, it would be more helpful.
Ack.
required:
- compatible
- reg
@@ -115,6 +122,8 @@ examples: etr@20070000 { compatible = "arm,coresight-tmc", "arm,primecell"; reg = <0x20070000 0x1000>;
memory-region = <&etr_trace_mem_reserved>,<&etr_mdata_mem_reserved>; clocks = <&oscclk6a>; clock-names = "apb_pclk";