On Fri, 12 Jul 2024 at 11:22, James Clark james.clark@linaro.org wrote:
From: James Clark james.clark@arm.com
This isn't a bug because Perf always masks with CORESIGHT_TRACE_ID_VAL_MASK before using these values, but to avoid it looking like it could be, make an effort to not save bad values.
Signed-off-by: James Clark james.clark@arm.com Signed-off-by: James Clark james.clark@linaro.org
tools/perf/arch/arm/util/cs-etm.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tools/perf/arch/arm/util/cs-etm.c b/tools/perf/arch/arm/util/cs-etm.c index b0118546cd4d..14b8afabce3a 100644 --- a/tools/perf/arch/arm/util/cs-etm.c +++ b/tools/perf/arch/arm/util/cs-etm.c @@ -643,7 +643,8 @@ static bool cs_etm_is_ete(struct perf_pmu *cs_etm_pmu, struct perf_cpu cpu)
static __u64 cs_etm_get_legacy_trace_id(struct perf_cpu cpu) {
return CORESIGHT_LEGACY_CPU_TRACE_ID(cpu.cpu);
/* Wrap at 48 so that invalid trace IDs aren't saved into files. */return CORESIGHT_LEGACY_CPU_TRACE_ID(cpu.cpu % 48);}
static void cs_etm_save_etmv4_header(__u64 data[], struct auxtrace_record *itr, struct perf_cpu cpu)
2.34.1
Reviewed-by: Mike Leach mike.leach@linaro.org
-- Mike Leach Principal Engineer, ARM Ltd. Manchester Design Centre. UK