On Thu, Jul 30, 2020 at 05:38:37PM +0100, Suzuki K Poulose wrote:
On 07/29/2020 06:20 PM, Mathieu Poirier wrote:
On Wed, Jul 22, 2020 at 06:20:40PM +0100, Suzuki K Poulose wrote:
Document the bindings for ETMv4.4 and later with only system register access.
Cc: Rob Herring robh+dt@kernel.org Cc: devicetree@vger.kernel.org Cc: Mathieu Poirier mathieu.poirier@linaro.org Cc: Mike Leach mike.leach@linaro.org Signed-off-by: Suzuki K Poulose suzuki.poulose@arm.com
Documentation/devicetree/bindings/arm/coresight.txt | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt index d711676b4a51..cfe47bdda728 100644 --- a/Documentation/devicetree/bindings/arm/coresight.txt +++ b/Documentation/devicetree/bindings/arm/coresight.txt @@ -34,9 +34,13 @@ its hardware characteristcs. Program Flow Trace Macrocell: "arm,coresight-etm3x", "arm,primecell";
- Embedded Trace Macrocell (version 4.x):
- Embedded Trace Macrocell (version 4.x), with memory mapped access. "arm,coresight-etm4x", "arm,primecell";
- Embedded Trace Macrocell (version 4.4 and later) with system
register access only.
"arm,coresight-etm-v4.4";
I would rather call this "arm,coresight-etm-v4.4+" so that the binding's semantic is still relevant when dealing with ETM v4.5 and onward.
AFAIUC, "compatible" stands for something that is compatible with v4.4. All v4.4+ versions that are compatible with v4.4 are covered here.
Your position is valid - let's to with what you had.
Having said that I am fine with "arm,coresight-etm-v4.4+" , if it is fine by the DT conventions.
Cheers Suzuki