Hi,
On Thu, 27 Feb 2025 at 09:27, songchai quic_songchai@quicinc.com wrote:
From: Songwei Chai quic_songchai@quicinc.com
Add reset node to initialize the value of priority/condition_decode/condition_select/timer/counter nodes
Signed-off-by: Songwei Chai quic_songchai@quicinc.com Signed-off-by: songchai quic_songchai@quicinc.com
.../testing/sysfs-bus-coresight-devices-tgu | 7 ++ drivers/hwtracing/coresight/coresight-tgu.c | 79 +++++++++++++++++++ 2 files changed, 86 insertions(+)
diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tgu b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tgu index d88d05fbff43..8fb5afd7c655 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tgu +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tgu @@ -42,3 +42,10 @@ KernelVersion 6.15 Contact: Jinlong Mao (QUIC) quic_jinlmao@quicinc.com, Sam Chai (QUIC) quic_songchai@quicinc.com Description: (RW) Set/Get the counter value with specific step for TGU.
+What: /sys/bus/coresight/devices/<tgu-name>/reset_tgu +Date: February 2025 +KernelVersion 6.15 +Contact: Jinlong Mao (QUIC) quic_jinlmao@quicinc.com, Sam Chai (QUIC) quic_songchai@quicinc.com +Description:
(Write) Reset the dataset for TGU.
Document the value needed to initiate the reset.
diff --git a/drivers/hwtracing/coresight/coresight-tgu.c b/drivers/hwtracing/coresight/coresight-tgu.c index 693d632fb079..b36ced761c0d 100644 --- a/drivers/hwtracing/coresight/coresight-tgu.c +++ b/drivers/hwtracing/coresight/coresight-tgu.c @@ -343,6 +343,84 @@ static ssize_t enable_tgu_store(struct device *dev, } static DEVICE_ATTR_RW(enable_tgu);
+/* reset_tgu_store - Reset Trace and Gating Unit (TGU) configuration. */ +static ssize_t reset_tgu_store(struct device *dev,
struct device_attribute *attr, const char *buf,size_t size)+{
unsigned long value;struct tgu_drvdata *drvdata = dev_get_drvdata(dev->parent);int i, j, ret;if (kstrtoul(buf, 0, &value))return -EINVAL;
Check "value" here and bail out with an error code if 0.
if (!drvdata->enable) {ret = pm_runtime_get_sync(drvdata->dev);if (ret < 0) {pm_runtime_put(drvdata->dev);return ret;}}spin_lock(&drvdata->spinlock);CS_UNLOCK(drvdata->base);if (value) {
drop this line
tgu_writel(drvdata, 0, TGU_CONTROL);if (drvdata->value_table->priority)memset(drvdata->value_table->priority, 0,MAX_PRIORITY * drvdata->max_step *drvdata->max_reg * sizeof(unsigned int));if (drvdata->value_table->condition_decode)memset(drvdata->value_table->condition_decode, 0,drvdata->max_condition_decode * drvdata->max_step *sizeof(unsigned int));/* Initialize all condition registers to NOT(value=0x1000000) */for (i = 0; i < drvdata->max_step; i++) {for (j = 0; j < drvdata->max_condition_decode; j++) {drvdata->value_table->condition_decode[calculate_array_location(drvdata, i, TGU_CONDITION_DECODE, j)] =0x1000000;}}if (drvdata->value_table->condition_select)memset(drvdata->value_table->condition_select, 0,drvdata->max_condition_select * drvdata->max_step *sizeof(unsigned int));if (drvdata->value_table->timer)memset(drvdata->value_table->timer, 0,(drvdata->max_step) *(drvdata->max_timer_counter) *sizeof(unsigned int));if (drvdata->value_table->counter)memset(drvdata->value_table->counter, 0,(drvdata->max_step) *(drvdata->max_timer_counter) *sizeof(unsigned int));dev_dbg(dev, "Coresight-TGU reset complete\n");} else {dev_dbg(dev, "Coresight-TGU invalid input\n");
not needed if early exit on input errror
}CS_LOCK(drvdata->base);drvdata->enable = false;spin_unlock(&drvdata->spinlock);pm_runtime_put(drvdata->dev);return size;+} +static DEVICE_ATTR_WO(reset_tgu);
static const struct coresight_ops_helper tgu_helper_ops = { .enable = tgu_enable, .disable = tgu_disable, @@ -354,6 +432,7 @@ static const struct coresight_ops tgu_ops = {
static struct attribute *tgu_common_attrs[] = { &dev_attr_enable_tgu.attr,
&dev_attr_reset_tgu.attr, NULL,};
Regards
Mike