On 25 July 2017 at 21:49, yoma sophian sophian.yoma@gmail.com wrote:
hi Mathieu:
Get (and recompile) the latest revision of the openCSD library - that should do the trick.
after using the latest revision of the opcdCSD library, compile is pass. But I have some question about trace collection and decode flow
- for trace collection, shall we ask perf to save some other places? such as USB or somewhere alse
We welcome patches.
- from HOWTO document, is perf.data the trace data from ETM?
The perf.data file contains the trace data from the ETM devices, the metadata associated with the ETM configuration and miscellaneous perf events recorded during the session.
- Why we need .debug directory?
That is where all the binaries that were involved in the trace session are collected. Those are needed by the decoding library for proper handling of the trace data.
thanks ur help in advance.
hi Mathieu:
But I have some question about trace collection and decode flow
- for trace collection, shall we ask perf to save some other places? such as USB or somewhere alse
We welcome patches.
got it and try to debug where to add.
- from HOWTO document, is perf.data the trace data from ETM?
The perf.data file contains the trace data from the ETM devices, the metadata associated with the ETM configuration and miscellaneous perf events recorded during the session.
Does that mean off-target-perf cannot decode pure trace data from ETM?
thanks for your help in advance,
On 30 July 2017 at 10:05, yoma sophian sophian.yoma@gmail.com wrote:
hi Mathieu:
But I have some question about trace collection and decode flow
- for trace collection, shall we ask perf to save some other places? such as USB or somewhere alse
We welcome patches.
got it and try to debug where to add.
- from HOWTO document, is perf.data the trace data from ETM?
The perf.data file contains the trace data from the ETM devices, the metadata associated with the ETM configuration and miscellaneous perf events recorded during the session.
Does that mean off-target-perf cannot decode pure trace data from ETM?
Not at this time. Perf expect information about a trace session to be part of the perf.data file but it wouldn't be hard to provide the same information from an input file or a script, it's just a matter of doing it.
thanks for your help in advance,
hi mathieu:
2017-07-31 22:31 GMT+08:00 Mathieu Poirier mathieu.poirier@linaro.org:
On 30 July 2017 at 10:05, yoma sophian sophian.yoma@gmail.com wrote:
hi Mathieu:
But I have some question about trace collection and decode flow
- for trace collection, shall we ask perf to save some other places? such as USB or somewhere alse
We welcome patches.
We cross-compile perf of below branch git clone -b perf-opencsd-master https://github.com/Linaro/OpenCSD.git perf-opencsd-master and try run it on our embedded system. But we get below error message while executing, ======================================================= # ./perf record -e cs_etm/@f0106000.etf/ --per-thread uname invalid or unsupported event: 'cs_etm/@f0106000.etf/' Run 'perf list' for a list of valid events
Usage: perf record [<options>] [<command>] or: perf record [<options>] -- <command> [<options>]
-e, --event <event> event selector. use 'perf list' to list available events # =========================================================
And CoreSight blocks identified by the framework on our platform are like below: ========================================================= # ls /sys/bus/coresight/devices/ f0101000.etr f0106000.etf f013d000.etm f0104000.funnel f013c000.etm # ==========================================================
Did we check out wrong version of perf-opencsd-master for recording?
thanks for your kind help in advance,
On 2 August 2017 at 07:12, yoma sophian sophian.yoma@gmail.com wrote:
hi mathieu:
2017-07-31 22:31 GMT+08:00 Mathieu Poirier mathieu.poirier@linaro.org:
On 30 July 2017 at 10:05, yoma sophian sophian.yoma@gmail.com wrote:
hi Mathieu:
But I have some question about trace collection and decode flow
- for trace collection, shall we ask perf to save some other places? such as USB or somewhere alse
We welcome patches.
We cross-compile perf of below branch git clone -b perf-opencsd-master https://github.com/Linaro/OpenCSD.git perf-opencsd-master and try run it on our embedded system. But we get below error message while executing, ======================================================= # ./perf record -e cs_etm/@f0106000.etf/ --per-thread uname invalid or unsupported event: 'cs_etm/@f0106000.etf/' Run 'perf list' for a list of valid events
Usage: perf record [<options>] [<command>] or: perf record [<options>] -- <command> [<options>]
-e, --event <event> event selector. use 'perf list' to listavailable events #
My first guess would be that variable CSTRACE_PATH wasn't defined when compiling the perf tools, and as such the functionality is not enabled. The HOWTO.md on gitHub explains how to do all that.
=========================================================
And CoreSight blocks identified by the framework on our platform are like below:
# ls /sys/bus/coresight/devices/ f0101000.etr f0106000.etf f013d000.etm f0104000.funnel f013c000.etm
#
Did we check out wrong version of perf-opencsd-master for recording?
thanks for your kind help in advance,
hi Mathieu:
My first guess would be that variable CSTRACE_PATH wasn't defined when compiling the perf tools, and as such the functionality is not enabled. The HOWTO.md on gitHub explains how to do all that.
I did export CSTRACE_PATH while cross-compiling perf. But still get unsupported event message: "# ./perf record -e cs_etm/@f0106000.etf/ --per-thread uname invalid or unsupported event: 'cs_etm/@f0106000.etf/"
When finish cross-compiling perf, I purposely use arm-linux-gnueabihf-readelf and get dynamic section information as below: (Could we conclude that below "***" shows "CSTRACE_PATH" is set properly?)
====================================================== Dynamic section at offset 0x16c4c8 contains 33 entries: Tag Type Name/Value 0x00000001 (NEEDED) Shared library: [libpthread.so.0] 0x00000001 (NEEDED) Shared library: [librt.so.1] 0x00000001 (NEEDED) Shared library: [libm.so.6] 0x00000001 (NEEDED) Shared library: [libdl.so.2] 0x00000001 (NEEDED) Shared library: [libcstraced_c_api.so] --> *** 0x00000001 (NEEDED) Shared library: [libcstraced.so] --> *** 0x00000001 (NEEDED) Shared library: [libstdc++.so.6] 0x00000001 (NEEDED) Shared library: [libgcc_s.so.1] 0x00000001 (NEEDED) Shared library: [libc.so.6] 0x00000001 (NEEDED) Shared library: [ld-linux-armhf.so.3] 0x0000000c (INIT) 0x138e0 0x0000000d (FINI) 0x12d5ec 0x00000019 (INIT_ARRAY) 0x18c348 0x0000001b (INIT_ARRAYSZ) 8 (bytes) 0x0000001a (FINI_ARRAY) 0x18c350 =========================================================
I use below git commit version of perf and opencsd: a. perf-master: commit 27ecd6f2b547 ("coresight: etr: Add barrier packet for synchronisation") b. opencsd : commit 4f068b1c94db ("opencsd: Trace return stack debug messages off by default.")
And cross-compile command like below: =========================================================== cd /media/sdb1/software/opencsd/my-opencsd/decoder/build/linux; make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- clean; make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- DEBUG=1 -j4; make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- -j4; cd ../../../; cd /media/sdb1/software/opencsd/perf-opencsd-master; export CSTRACE_PATH=/media/sdb1/software/opencsd/my-opencsd/decoder make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- -C tools/perf/ clean -j4; make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- -C tools/perf/ DEBUG=1 V=1 -j4; =============================================================
Appreciate your kind help,
Hi,
Can you confirm that the event is listed if you run 'perf list' e.g. on my Juno board running the perf list command results as follows:-
mleach@linaro-developer:~/perf-tools$ ./perf list
List of pre-defined events (to be used in -e):
branch-instructions OR branches [Hardware event] branch-misses [Hardware event]
----- snip -----
armv8_cortex_a57/sw_incr/ [Kernel PMU event] armv8_cortex_a57/ttbr_write_retired/ [Kernel PMU event] cs_etm// [Kernel PMU event]
rNNN [Raw hardware event descriptor] cpu/t1=v1[,t2=v2,t3 ...]/modifier [Raw hardware event descriptor] (see 'man perf-list' on how to encode it)
mem:<addr>[/len][:access] [Hardware breakpoint]
As you can see, running a x-compiled aarch64 perf on an aarch64 target results in the cs_etm// event being listed as available.
Similarly on my aarch64 target I can run ldd perf and see the libraries required include libcstrace:-
mleach@linaro-developer:~/perf-tools$ ldd ./perf linux-vdso.so.1 (0x0000ffff88974000) libpthread.so.0 => /lib/aarch64-linux-gnu/libpthread.so.0 (0x0000ffff8893a000) librt.so.1 => /lib/aarch64-linux-gnu/librt.so.1 (0x0000ffff88923000) libm.so.6 => /lib/aarch64-linux-gnu/libm.so.6 (0x0000ffff88882000) libdl.so.2 => /lib/aarch64-linux-gnu/libdl.so.2 (0x0000ffff8886f000) libcstraced_c_api.so => ./libs-rel/libcstraced_c_api.so (0x0000ffff8884e000) libcstraced.so => ./libs-rel/libcstraced.so (0x0000ffff887bc000) libstdc++.so.6 => ./libs-rel/libstdc++.so.6 (0x0000ffff88633000) libc.so.6 => /lib/aarch64-linux-gnu/libc.so.6 (0x0000ffff884e6000) /lib/ld-linux-aarch64.so.1 (0x0000aaaaca60d000) libgcc_s.so.1 => /lib/aarch64-linux-gnu/libgcc_s.so.1 (0x0000ffff884c3000)
I would also advise double checking the command path to ensure that you are running the version of perf that you think you are.
Regards
Mike
On 4 August 2017 at 14:38, yoma sophian sophian.yoma@gmail.com wrote:
hi Mathieu:
My first guess would be that variable CSTRACE_PATH wasn't defined when compiling the perf tools, and as such the functionality is not enabled. The HOWTO.md on gitHub explains how to do all that.
I did export CSTRACE_PATH while cross-compiling perf. But still get unsupported event message: "# ./perf record -e cs_etm/@f0106000.etf/ --per-thread uname invalid or unsupported event: 'cs_etm/@f0106000.etf/"
When finish cross-compiling perf, I purposely use arm-linux-gnueabihf-readelf and get dynamic section information as below: (Could we conclude that below "***" shows "CSTRACE_PATH" is set properly?)
====================================================== Dynamic section at offset 0x16c4c8 contains 33 entries: Tag Type Name/Value 0x00000001 (NEEDED) Shared library: [libpthread.so.0] 0x00000001 (NEEDED) Shared library: [librt.so.1] 0x00000001 (NEEDED) Shared library: [libm.so.6] 0x00000001 (NEEDED) Shared library: [libdl.so.2] 0x00000001 (NEEDED) Shared library: [libcstraced_c_api.so] --> *** 0x00000001 (NEEDED) Shared library: [libcstraced.so] --> *** 0x00000001 (NEEDED) Shared library: [libstdc++.so.6] 0x00000001 (NEEDED) Shared library: [libgcc_s.so.1] 0x00000001 (NEEDED) Shared library: [libc.so.6] 0x00000001 (NEEDED) Shared library: [ld-linux-armhf.so.3] 0x0000000c (INIT) 0x138e0 0x0000000d (FINI) 0x12d5ec 0x00000019 (INIT_ARRAY) 0x18c348 0x0000001b (INIT_ARRAYSZ) 8 (bytes) 0x0000001a (FINI_ARRAY) 0x18c350 =========================================================
I use below git commit version of perf and opencsd: a. perf-master: commit 27ecd6f2b547 ("coresight: etr: Add barrier packet for synchronisation") b. opencsd : commit 4f068b1c94db ("opencsd: Trace return stack debug messages off by default.")
And cross-compile command like below:
cd /media/sdb1/software/opencsd/my-opencsd/decoder/build/linux; make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- clean; make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- DEBUG=1 -j4; make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- -j4; cd ../../../; cd /media/sdb1/software/opencsd/perf-opencsd-master; export CSTRACE_PATH=/media/sdb1/software/opencsd/my-opencsd/decoder make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- -C tools/perf/ clean -j4; make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- -C tools/perf/ DEBUG=1 V=1 -j4; =============================================================
Appreciate your kind help, _______________________________________________ CoreSight mailing list CoreSight@lists.linaro.org https://lists.linaro.org/mailman/listinfo/coresight
hi MIke:
2017-08-07 18:25 GMT+08:00 Mike Leach mike.leach@linaro.org:
Hi,
Can you confirm that the event is listed if you run 'perf list' e.g. on my Juno board running the perf list command results as follows:-
sure and below is the output of perf list on my platform: ============================================= #perf list List of pre-defined events (to be used in -e):
branch-instructions OR branches [Hardware event] branch-misses [Hardware event] bus-cycles [Hardware event] cache-misses [Hardware event] cache-references [Hardware event] cpu-cycles OR cycles [Hardware event] instructions [Hardware event]
alignment-faults [Software event] context-switches OR cs [Software event] cpu-clock [Software event] cpu-migrations OR migrations [Software event] dummy [Software event] emulation-faults [Software event] major-faults [Software event] minor-faults [Software event] page-faults OR faults [Software event] task-clock [Software event]
L1-dcache-load-misses [Hardware cache event] L1-dcache-loads [Hardware cache event] L1-dcache-store-misses [Hardware cache event] L1-dcache-stores [Hardware cache event] L1-icache-load-misses [Hardware cache event] L1-icache-loads [Hardware cache event] LLC-load-misses [Hardware cache event] LLC-loads [Hardware cache event] LLC-store-misses [Hardware cache event] LLC-stores [Hardware cache event] branch-load-misses [Hardware cache event] branch-loads [Hardware cache event] dTLB-load-misses [Hardware cache event] dTLB-store-misses [Hardware cache event] iTLB-load-misses [Hardware cache event]
rNNN [Raw hardware event descriptor] cpu/t1=v1[,t2=v2,t3 ...]/modifier [Raw hardware event descriptor] (see 'man perf-list' on how to encode it)
mem:<addr>[/len][:access] [Hardware breakpoint] ============================================================
We use linux4.2 and add related coresight dts based on our SOC's setting. And we can indeed see related coresight device as below. Did that mean we still miss something to enable perf record while porting related component? =========================================================== # ls /sys/bus/coresight/devices/ f0101000.etr f0106000.etf f013d000.etm f0104000.funnel f013c000.etm # ===========================================================
Appreciate your friendly reminders,
Hi,
You do not have the cs_etm// event listed in your version of perf - which indicates that you have not built a version that has the correct updates to work with OpenCSD. You say you are building a 4.2 kernel - this does not have the additional patches required.
You really need to build both the kernel and perf based on the kernel trees provided in the OpenCSD project.
I recommend using latest stable one based on the 4.12 kernel - this is the perf-opencsd-4.12 branch in the OpenCSD github project, which will work correctly with the latest OpenCSD libary. These branches contain additional patches not yet upstreamed that build perf versions that work with the OpenCSD library.
As perf and the kernel often change in sync, then it is not likely that a perf based on a later kernel will work correctly on an earlier kernel.
Regards
Mike
On 9 August 2017 at 14:54, yoma sophian sophian.yoma@gmail.com wrote:
hi MIke:
2017-08-07 18:25 GMT+08:00 Mike Leach mike.leach@linaro.org:
Hi,
Can you confirm that the event is listed if you run 'perf list' e.g. on my Juno board running the perf list command results as follows:-
sure and below is the output of perf list on my platform:
#perf list List of pre-defined events (to be used in -e):
branch-instructions OR branches [Hardware event] branch-misses [Hardware event] bus-cycles [Hardware event] cache-misses [Hardware event] cache-references [Hardware event] cpu-cycles OR cycles [Hardware event] instructions [Hardware event]
alignment-faults [Software event] context-switches OR cs [Software event] cpu-clock [Software event] cpu-migrations OR migrations [Software event] dummy [Software event] emulation-faults [Software event] major-faults [Software event] minor-faults [Software event] page-faults OR faults [Software event] task-clock [Software event]
L1-dcache-load-misses [Hardware cache event] L1-dcache-loads [Hardware cache event] L1-dcache-store-misses [Hardware cache event] L1-dcache-stores [Hardware cache event] L1-icache-load-misses [Hardware cache event] L1-icache-loads [Hardware cache event] LLC-load-misses [Hardware cache event] LLC-loads [Hardware cache event] LLC-store-misses [Hardware cache event] LLC-stores [Hardware cache event] branch-load-misses [Hardware cache event] branch-loads [Hardware cache event] dTLB-load-misses [Hardware cache event] dTLB-store-misses [Hardware cache event] iTLB-load-misses [Hardware cache event]
rNNN [Raw hardware event descriptor] cpu/t1=v1[,t2=v2,t3 ...]/modifier [Raw hardware event descriptor] (see 'man perf-list' on how to encode it)
mem:<addr>[/len][:access] [Hardware breakpoint]
We use linux4.2 and add related coresight dts based on our SOC's setting. And we can indeed see related coresight device as below. Did that mean we still miss something to enable perf record while porting related component? =========================================================== # ls /sys/bus/coresight/devices/ f0101000.etr f0106000.etf f013d000.etm f0104000.funnel f013c000.etm
#
Appreciate your friendly reminders,
hi Mike
You do not have the cs_etm// event listed in your version of perf - which indicates that you have not built a version that has the correct updates to work with OpenCSD. You say you are building a 4.2 kernel - this does not have the additional patches required.
since we just determine 4.2 as our long term developing code base. It will be a quite difficult to just to 4.12 in this time. is there kernel version that is down closest to 4.2 and with cs_etm// event support?
BTW, is there any debug message or define in perfl can tell us whether a. cs_etm// lost b. wrong CSTRACE_PATH to cause perf record error? Since only from "nvalid or unsupported event: 'cs_etm/@f0106000.etf/'", we may hard to tell which one above is the key.
appreciate your kind suggestion
hi Mike:
You do not have the cs_etm// event listed in your version of perf - which indicates that you have not built a version that has the correct updates to work with OpenCSD. You say you are building a 4.2 kernel - this does not have the additional patches required. I recommend using latest stable one based on the 4.12 kernel - this is the perf-opencsd-4.12 branch in the OpenCSD github project, which will work correctly with the latest OpenCSD libary. These branches contain additional patches not yet upstreamed that build perf versions that work with the OpenCSD library.
Sorry for not describing my environment more clearer. I use below kenel git tree with tag 4.2 instead of OpenCSD git tree. https://github.com/torvalds/linux
if so, from the below branch names, it seems the oldest kernel version in OpenCSD-git-hub is 4.5. Why you mentioned, this does not have the additional patches required for 4.2? Please correct me, if I am wrong. Appreciate your kind help,
======================================== remotes/origin/perf-opencsd-4.10 remotes/origin/perf-opencsd-4.11 remotes/origin/perf-opencsd-4.12 remotes/origin/perf-opencsd-4.5 remotes/origin/perf-opencsd-4.5-rc6-bkk16 remotes/origin/perf-opencsd-4.6 remotes/origin/perf-opencsd-4.7 remotes/origin/perf-opencsd-4.8 remotes/origin/perf-opencsd-4.9 =========================================
Hi Yoma,
On 10 August 2017 at 07:50, yoma sophian sophian.yoma@gmail.com wrote:
hi Mike:
You do not have the cs_etm// event listed in your version of perf - which indicates that you have not built a version that has the correct updates to work with OpenCSD. You say you are building a 4.2 kernel - this does not have the additional patches required. I recommend using latest stable one based on the 4.12 kernel - this is the perf-opencsd-4.12 branch in the OpenCSD github project, which will work correctly with the latest OpenCSD libary. These branches contain additional patches not yet upstreamed that build perf versions that work with the OpenCSD library.
Sorry for not describing my environment more clearer. I use below kenel git tree with tag 4.2 instead of OpenCSD git tree. https://github.com/torvalds/linux
if so, from the below branch names, it seems the oldest kernel version in OpenCSD-git-hub is 4.5.
The OpenCSD patches here @4.5 are not the same set of patches applied to perf-opencsd-4.12 or perf-opencsd-master. Each of the perf-opencsd-4.xx branches is a snapshot of the development as it was at that time. The patches currently applied to perf-opencsd-master include many buxfixes, enhancements and changes that have occurred since the 4.5 branch was developed, and my omit some enhancements and bugfixes that have subsequently been upstreamed.
We do not backport the latest changes to earlier kernel versions.
Regards
Mike
Why you mentioned, this does not have the additional patches required for 4.2? Please correct me, if I am wrong. Appreciate your kind help,
======================================== remotes/origin/perf-opencsd-4.10 remotes/origin/perf-opencsd-4.11 remotes/origin/perf-opencsd-4.12 remotes/origin/perf-opencsd-4.5 remotes/origin/perf-opencsd-4.5-rc6-bkk16 remotes/origin/perf-opencsd-4.6 remotes/origin/perf-opencsd-4.7 remotes/origin/perf-opencsd-4.8 remotes/origin/perf-opencsd-4.9 =========================================
Good morning,
I am currently travelling and as such won't be able to get back to you before next week.
Regards, Mathieu
On 4 August 2017 at 07:38, yoma sophian sophian.yoma@gmail.com wrote:
hi Mathieu:
My first guess would be that variable CSTRACE_PATH wasn't defined when compiling the perf tools, and as such the functionality is not enabled. The HOWTO.md on gitHub explains how to do all that.
I did export CSTRACE_PATH while cross-compiling perf. But still get unsupported event message: "# ./perf record -e cs_etm/@f0106000.etf/ --per-thread uname invalid or unsupported event: 'cs_etm/@f0106000.etf/"
When finish cross-compiling perf, I purposely use arm-linux-gnueabihf-readelf and get dynamic section information as below: (Could we conclude that below "***" shows "CSTRACE_PATH" is set properly?)
====================================================== Dynamic section at offset 0x16c4c8 contains 33 entries: Tag Type Name/Value 0x00000001 (NEEDED) Shared library: [libpthread.so.0] 0x00000001 (NEEDED) Shared library: [librt.so.1] 0x00000001 (NEEDED) Shared library: [libm.so.6] 0x00000001 (NEEDED) Shared library: [libdl.so.2] 0x00000001 (NEEDED) Shared library: [libcstraced_c_api.so] --> *** 0x00000001 (NEEDED) Shared library: [libcstraced.so] --> *** 0x00000001 (NEEDED) Shared library: [libstdc++.so.6] 0x00000001 (NEEDED) Shared library: [libgcc_s.so.1] 0x00000001 (NEEDED) Shared library: [libc.so.6] 0x00000001 (NEEDED) Shared library: [ld-linux-armhf.so.3] 0x0000000c (INIT) 0x138e0 0x0000000d (FINI) 0x12d5ec 0x00000019 (INIT_ARRAY) 0x18c348 0x0000001b (INIT_ARRAYSZ) 8 (bytes) 0x0000001a (FINI_ARRAY) 0x18c350 =========================================================
I use below git commit version of perf and opencsd: a. perf-master: commit 27ecd6f2b547 ("coresight: etr: Add barrier packet for synchronisation") b. opencsd : commit 4f068b1c94db ("opencsd: Trace return stack debug messages off by default.")
And cross-compile command like below:
cd /media/sdb1/software/opencsd/my-opencsd/decoder/build/linux; make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- clean; make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- DEBUG=1 -j4; make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- -j4; cd ../../../; cd /media/sdb1/software/opencsd/perf-opencsd-master; export CSTRACE_PATH=/media/sdb1/software/opencsd/my-opencsd/decoder make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- -C tools/perf/ clean -j4; make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- -C tools/perf/ DEBUG=1 V=1 -j4; =============================================================
Appreciate your kind help,
-
Mathieu Poirier -
Mike Leach -
yoma sophian