Good localtime,
I am the project manager assigned to CS/TSDL Project by Linaro. I hope this journey will be something pleasant and fruitful for all the participants of this project as well as for the community around ARM technologies and Linux.
So, let's start with an answer to "what?" question.
In order to be able to properly plan the scope of the project we need to define the first approximation of the project work item structure. Quite many of the people subscribed to this mailing list have practical experience implementing trace stream decoders for CoreSight. That increases our chances of defining a decent approximation of the project scope, which then will be refined gradually as project continues.
I need your help brainstorming this topic. So, please, throw your ideas about the potential work items into this thread and I'll be summarizing your ideas and putting them into a single "backlog", which will get prioritized according to needs and dependencies afterwards.
Usage of a hierarchical representation of the work items might be a good idea as it allows seeing the dependencies from the very beginning. So, something along the lines of the example below is proposed to be used (the structure below is just an example - I don't have enough technical knowledge for the area to propose a good initial structure):
1. Frontend 1.1. ... 2. Core 2.1. ... 2. Backends 2.1. ETMv3 2.1.1. ... 2.2. ETMv4 2.2.1. ... 2.3. STM 2.3.1. ... 3. ...
Also, please share your relevant DOs and DONTs from your past experience. This undertaking needs all your skills and knowledge to create a fast, reliable and easy to use decoding library.
PS. "CS/TSDL" in the subject stands for "CoreSight/Trace Stream Decoding Library". Proposals for a better name are welcome. :)
Hi CS/TSDL-ers,
Brainstorming the work items in order to populate Serge's project structure can also be the main topic for tomorrow's Trace Decoders call @1600 UK time(*). We're particularly interested to get inputs on work items from TI and ARM for the call.
Regards
Bill
* dial in details https://www.uberconference.com/bfletcher (browser access) Phone access: US Dial in number: 855-233-8355 US Alternate number: 920-393-7703 [United Kingdom 020 3514 1993 and enter 855-233-8355#]
On 8 June 2015 at 13:02, Serge Broslavsky serge.broslavsky@linaro.org wrote:
Good localtime,
I am the project manager assigned to CS/TSDL Project by Linaro. I hope this journey will be something pleasant and fruitful for all the participants of this project as well as for the community around ARM technologies and Linux.
So, let's start with an answer to "what?" question.
In order to be able to properly plan the scope of the project we need to define the first approximation of the project work item structure. Quite many of the people subscribed to this mailing list have practical experience implementing trace stream decoders for CoreSight. That increases our chances of defining a decent approximation of the project scope, which then will be refined gradually as project continues.
I need your help brainstorming this topic. So, please, throw your ideas about the potential work items into this thread and I'll be summarizing your ideas and putting them into a single "backlog", which will get prioritized according to needs and dependencies afterwards.
Usage of a hierarchical representation of the work items might be a good idea as it allows seeing the dependencies from the very beginning. So, something along the lines of the example below is proposed to be used (the structure below is just an example - I don't have enough technical knowledge for the area to propose a good initial structure):
1. Frontend 1.1. ... 2. Core 2.1. ... 2. Backends 2.1. ETMv3 2.1.1. ... 2.2. ETMv4 2.2.1. ... 2.3. STM 2.3.1. ... 3. ...Also, please share your relevant DOs and DONTs from your past experience. This undertaking needs all your skills and knowledge to create a fast, reliable and easy to use decoding library.
PS. "CS/TSDL" in the subject stands for "CoreSight/Trace Stream Decoding Library". Proposals for a better name are welcome. :)
-- Best Regards, Serge Broslavsky serge.broslavsky@linaro.org
Core Development Project Manager, Linaro M: +37129426328 IRC: ototo Skype: serge.broslavsky http://linaro.org | Open source software for ARM SoCs _______________________________________________ CoreSight mailing list CoreSight@lists.linaro.org https://lists.linaro.org/mailman/listinfo/coresight
Hi All,
Mike L put together the attached list of work items based on the design document we shared with you last time.
If we aim for a 1st slice that gives us the following use-case, "Basic instruction trace of a snapshot of a V8 system with ETMv4” then we identify that the following work packages are needed.
TFDFMT - Trace frame deformatter TPKTPROC03 - ETMv4 Instruction packet processor TPKTPROC03a - ETMv4 configuration input TPKTPROC03b - ETMv4 Instruction output pack structure TPKPTDEC03 - ETMv4 Instruction decode MEMACC01 - Memory access interface MEMACC02 - Memory access - binary file reader INSTRDCD01 - Instruction decode interface and structure TESTPRG01 - Basic test program. Single ID pkt/trc decode from files
Plus 1 of the following implementations of the instruction decode interface INSTRDCD02 - Decode implementation created for library INSTRDCD03 - Adaptor implementation for ARM icodec library INSTRDCD04 - Adaptor implementation for GNU binutils library
NOTE: we are undecided on the best choice for the initial decode implementation at this point.
I hope this helps and forms a basis for discussion.
Regards, Mike.
From: Bill Fletcher <bill.fletcher@linaro.orgmailto:bill.fletcher@linaro.org> Date: Tuesday, 9 June 2015 10:09 To: CoreSight ML <coresight@lists.linaro.orgmailto:coresight@lists.linaro.org> Subject: Re: CS/TSDL Project Scope Brainstorming
Hi CS/TSDL-ers,
Brainstorming the work items in order to populate Serge's project structure can also be the main topic for tomorrow's Trace Decoders call @1600 UK time(*). We're particularly interested to get inputs on work items from TI and ARM for the call.
Regards
Bill
* dial in details https://www.uberconference.com/bfletcher (browser access) Phone access: US Dial in number: 855-233-8355 US Alternate number: 920-393-7703 [United Kingdom 020 3514 1993 and enter 855-233-8355#]
On 8 June 2015 at 13:02, Serge Broslavsky <serge.broslavsky@linaro.orgmailto:serge.broslavsky@linaro.org> wrote: Good localtime,
I am the project manager assigned to CS/TSDL Project by Linaro. I hope this journey will be something pleasant and fruitful for all the participants of this project as well as for the community around ARM technologies and Linux.
So, let's start with an answer to "what?" question.
In order to be able to properly plan the scope of the project we need to define the first approximation of the project work item structure. Quite many of the people subscribed to this mailing list have practical experience implementing trace stream decoders for CoreSight. That increases our chances of defining a decent approximation of the project scope, which then will be refined gradually as project continues.
I need your help brainstorming this topic. So, please, throw your ideas about the potential work items into this thread and I'll be summarizing your ideas and putting them into a single "backlog", which will get prioritized according to needs and dependencies afterwards.
Usage of a hierarchical representation of the work items might be a good idea as it allows seeing the dependencies from the very beginning. So, something along the lines of the example below is proposed to be used (the structure below is just an example - I don't have enough technical knowledge for the area to propose a good initial structure):
1. Frontend 1.1. ... 2. Core 2.1. ... 2. Backends 2.1. ETMv3 2.1.1. ... 2.2. ETMv4 2.2.1. ... 2.3. STM 2.3.1. ... 3. ...
Also, please share your relevant DOs and DONTs from your past experience. This undertaking needs all your skills and knowledge to create a fast, reliable and easy to use decoding library.
PS. "CS/TSDL" in the subject stands for "CoreSight/Trace Stream Decoding Library". Proposals for a better name are welcome. :)
-- Best Regards, Serge Broslavsky <serge.broslavsky@linaro.orgmailto:serge.broslavsky@linaro.org>
Core Development Project Manager, Linaro M: +37129426328tel:%2B37129426328 IRC: ototo Skype: serge.broslavsky http://linaro.org | Open source software for ARM SoCs _______________________________________________ CoreSight mailing list CoreSight@lists.linaro.orgmailto:CoreSight@lists.linaro.org https://lists.linaro.org/mailman/listinfo/coresight
-- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2557590 ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2548782
Resend of document/email as per action from meeting on 9-Jun-2015.
Regards, Mike.
From: Michael Darling <michael.darling@arm.commailto:michael.darling@arm.com> Date: Wednesday, 10 June 2015 15:25 To: Bill Fletcher <bill.fletcher@linaro.orgmailto:bill.fletcher@linaro.org>, CoreSight ML <coresight@lists.linaro.orgmailto:coresight@lists.linaro.org> Subject: Re: CS/TSDL Project Scope Brainstorming
Hi All,
Mike L put together the attached list of work items based on the design document we shared with you last time.
If we aim for a 1st slice that gives us the following use-case, "Basic instruction trace of a snapshot of a V8 system with ETMv4” then we identify that the following work packages are needed.
TFDFMT - Trace frame deformatter TPKTPROC03 - ETMv4 Instruction packet processor TPKTPROC03a - ETMv4 configuration input TPKTPROC03b - ETMv4 Instruction output pack structure TPKPTDEC03 - ETMv4 Instruction decode MEMACC01 - Memory access interface MEMACC02 - Memory access - binary file reader INSTRDCD01 - Instruction decode interface and structure TESTPRG01 - Basic test program. Single ID pkt/trc decode from files
Plus 1 of the following implementations of the instruction decode interface INSTRDCD02 - Decode implementation created for library INSTRDCD03 - Adaptor implementation for ARM icodec library INSTRDCD04 - Adaptor implementation for GNU binutils library
NOTE: we are undecided on the best choice for the initial decode implementation at this point.
I hope this helps and forms a basis for discussion.
Regards, Mike.
From: Bill Fletcher <bill.fletcher@linaro.orgmailto:bill.fletcher@linaro.org> Date: Tuesday, 9 June 2015 10:09 To: CoreSight ML <coresight@lists.linaro.orgmailto:coresight@lists.linaro.org> Subject: Re: CS/TSDL Project Scope Brainstorming
Hi CS/TSDL-ers,
Brainstorming the work items in order to populate Serge's project structure can also be the main topic for tomorrow's Trace Decoders call @1600 UK time(*). We're particularly interested to get inputs on work items from TI and ARM for the call.
Regards
Bill
* dial in details https://www.uberconference.com/bfletcher (browser access) Phone access: US Dial in number: 855-233-8355 US Alternate number: 920-393-7703 [United Kingdom 020 3514 1993 and enter 855-233-8355#]
On 8 June 2015 at 13:02, Serge Broslavsky <serge.broslavsky@linaro.orgmailto:serge.broslavsky@linaro.org> wrote: Good localtime,
I am the project manager assigned to CS/TSDL Project by Linaro. I hope this journey will be something pleasant and fruitful for all the participants of this project as well as for the community around ARM technologies and Linux.
So, let's start with an answer to "what?" question.
In order to be able to properly plan the scope of the project we need to define the first approximation of the project work item structure. Quite many of the people subscribed to this mailing list have practical experience implementing trace stream decoders for CoreSight. That increases our chances of defining a decent approximation of the project scope, which then will be refined gradually as project continues.
I need your help brainstorming this topic. So, please, throw your ideas about the potential work items into this thread and I'll be summarizing your ideas and putting them into a single "backlog", which will get prioritized according to needs and dependencies afterwards.
Usage of a hierarchical representation of the work items might be a good idea as it allows seeing the dependencies from the very beginning. So, something along the lines of the example below is proposed to be used (the structure below is just an example - I don't have enough technical knowledge for the area to propose a good initial structure):
1. Frontend 1.1. ... 2. Core 2.1. ... 2. Backends 2.1. ETMv3 2.1.1. ... 2.2. ETMv4 2.2.1. ... 2.3. STM 2.3.1. ... 3. ...
Also, please share your relevant DOs and DONTs from your past experience. This undertaking needs all your skills and knowledge to create a fast, reliable and easy to use decoding library.
PS. "CS/TSDL" in the subject stands for "CoreSight/Trace Stream Decoding Library". Proposals for a better name are welcome. :)
-- Best Regards, Serge Broslavsky <serge.broslavsky@linaro.orgmailto:serge.broslavsky@linaro.org>
Core Development Project Manager, Linaro M: +37129426328tel:%2B37129426328 IRC: ototo Skype: serge.broslavsky http://linaro.org | Open source software for ARM SoCs _______________________________________________ CoreSight mailing list CoreSight@lists.linaro.orgmailto:CoreSight@lists.linaro.org https://lists.linaro.org/mailman/listinfo/coresight
-- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2557590 ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2548782
-
Bill Fletcher -
Michael Darling -
Serge Broslavsky