On Fri, Jul 13, 2012 at 12:35 PM, Tom Cooksey tom.cooksey@arm.com wrote:
My other thought is around atomicity. Could this be extended to (safely) allow for hardware devices which might want to access multiple buffers simultaneously? I think it probably can with some tweaks to the interface? An atomic function which does something like "give me all the fences for all these buffers and add this fence to each instead/as-well-as"?
fwiw, what I'm leaning towards right now is combining dma-fence w/ Maarten's idea of dma-buf-mgr (not sure if you saw his patches?). And let dmabufmgr handle the multi-buffer reservation stuff. And possibly the read vs write access, although this I'm not 100% sure on... the other option being the concept of read vs write (or exclusive/non-exclusive) fences.
In the current state, the fence is quite simple, and doesn't care *what* it is fencing, which seems advantageous when you get into trying to deal with combinations of devices sharing buffers, some of whom can do hw sync, and some who can't. So having a bit of partitioning from the code dealing w/ sequencing who can access the buffers when and for what purpose seems like it might not be a bad idea. Although I'm still working through the different alternatives.
BR, -R