Linaro-mm-sig April 2021

linaro-mm-sig@lists.linaro.org

13 participants
42 discussions

by Christian König

Hi guys, we are currently working an Freesync and direct scan out from system memory on AMD APUs in A+A laptops. On problem we stumbled over is that our display hardware needs to scan out from uncached system memory and we currently don't have a way to communicate that through DMA-buf. For our specific use case at hand we are going to implement something driver specific, but the question is should we have something more generic for this? After all the system memory access pattern is a PCIe extension and as such something generic. Regards, Christian.

1 year, 8 months

Re: [Linaro-mm-sig] [PATCH v2] drm/amd/amdgpu: Fix errors in documentation of function parameters

by Felix Kuehling

On 2021-04-27 7:27, Fabio M. De Francesco wrote: > In the documentation of functions, removed excess parameters, described > undocumented ones, and fixed syntax errors. > > Signed-off-by: Fabio M. De Francesco <fmdefrancesco(a)gmail.com> > --- > > Changes from v1: Cc'ed all the maintainers. Looks like Alex already applied V1. So this one doesn't apply. "git am -3" tells me: Applying: drm/amd/amdgpu: Fix errors in documentation of function parameters Using index info to reconstruct a base tree... M drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c M drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c M drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c Falling back to patching base and 3-way merge... No changes -- Patch already applied. Regards, Felix > > drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 12 ++++++------ > drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c | 4 +++- > drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c | 8 ++++---- > 3 files changed, 13 insertions(+), 11 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c > index 2e9b16fb3fcd..bf2939b6eb43 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c > @@ -76,7 +76,7 @@ struct amdgpu_atif { > /** > * amdgpu_atif_call - call an ATIF method > * > - * @handle: acpi handle > + * @atif: acpi handle > * @function: the ATIF function to execute > * @params: ATIF function params > * > @@ -166,7 +166,6 @@ static void amdgpu_atif_parse_functions(struct amdgpu_atif_functions *f, u32 mas > /** > * amdgpu_atif_verify_interface - verify ATIF > * > - * @handle: acpi handle > * @atif: amdgpu atif struct > * > * Execute the ATIF_FUNCTION_VERIFY_INTERFACE ATIF function > @@ -240,8 +239,7 @@ static acpi_handle amdgpu_atif_probe_handle(acpi_handle dhandle) > /** > * amdgpu_atif_get_notification_params - determine notify configuration > * > - * @handle: acpi handle > - * @n: atif notification configuration struct > + * @atif: acpi handle > * > * Execute the ATIF_FUNCTION_GET_SYSTEM_PARAMETERS ATIF function > * to determine if a notifier is used and if so which one > @@ -304,7 +302,7 @@ static int amdgpu_atif_get_notification_params(struct amdgpu_atif *atif) > /** > * amdgpu_atif_query_backlight_caps - get min and max backlight input signal > * > - * @handle: acpi handle > + * @atif: acpi handle > * > * Execute the QUERY_BRIGHTNESS_TRANSFER_CHARACTERISTICS ATIF function > * to determine the acceptable range of backlight values > @@ -363,7 +361,7 @@ static int amdgpu_atif_query_backlight_caps(struct amdgpu_atif *atif) > /** > * amdgpu_atif_get_sbios_requests - get requested sbios event > * > - * @handle: acpi handle > + * @atif: acpi handle > * @req: atif sbios request struct > * > * Execute the ATIF_FUNCTION_GET_SYSTEM_BIOS_REQUESTS ATIF function > @@ -899,6 +897,8 @@ void amdgpu_acpi_fini(struct amdgpu_device *adev) > /** > * amdgpu_acpi_is_s0ix_supported > * > + * @adev: amdgpu_device_pointer > + * > * returns true if supported, false if not. > */ > bool amdgpu_acpi_is_s0ix_supported(struct amdgpu_device *adev) > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c > index 5af464933976..98d31ebad9ce 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.c > @@ -111,6 +111,8 @@ static const char *amdkfd_fence_get_timeline_name(struct dma_fence *f) > * a KFD BO and schedules a job to move the BO. > * If fence is already signaled return true. > * If fence is not signaled schedule a evict KFD process work item. > + * > + * @f: dma_fence > */ > static bool amdkfd_fence_enable_signaling(struct dma_fence *f) > { > @@ -131,7 +133,7 @@ static bool amdkfd_fence_enable_signaling(struct dma_fence *f) > /** > * amdkfd_fence_release - callback that fence can be freed > * > - * @fence: fence > + * @f: dma_fence > * > * This function is called when the reference count becomes zero. > * Drops the mm_struct reference and RCU schedules freeing up the fence. > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c > index b43e68fc1378..ed3014fbb563 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c > @@ -719,7 +719,7 @@ static void unlock_spi_csq_mutexes(struct amdgpu_device *adev) > } > > /** > - * @get_wave_count: Read device registers to get number of waves in flight for > + * get_wave_count: Read device registers to get number of waves in flight for > * a particular queue. The method also returns the VMID associated with the > * queue. > * > @@ -755,19 +755,19 @@ static void get_wave_count(struct amdgpu_device *adev, int queue_idx, > } > > /** > - * @kgd_gfx_v9_get_cu_occupancy: Reads relevant registers associated with each > + * kgd_gfx_v9_get_cu_occupancy: Reads relevant registers associated with each > * shader engine and aggregates the number of waves that are in flight for the > * process whose pasid is provided as a parameter. The process could have ZERO > * or more queues running and submitting waves to compute units. > * > * @kgd: Handle of device from which to get number of waves in flight > * @pasid: Identifies the process for which this query call is invoked > - * @wave_cnt: Output parameter updated with number of waves in flight that > + * @pasid_wave_cnt: Output parameter updated with number of waves in flight that > * belong to process with given pasid > * @max_waves_per_cu: Output parameter updated with maximum number of waves > * possible per Compute Unit > * > - * @note: It's possible that the device has too many queues (oversubscription) > + * Note: It's possible that the device has too many queues (oversubscription) > * in which case a VMID could be remapped to a different PASID. This could lead > * to an iaccurate wave count. Following is a high-level sequence: > * Time T1: vmid = getVmid(); vmid is associated with Pasid P1

2 years, 11 months

[PATCH] drivers: i2c: i2c-core-smbus.c: Fix alignment of comment

by Shubhankar Kuranagatti

Multi line comment have been aligned starting with a * The closing */ has been shifted to a new line. Single space replaced with tab space This is done to maintain code uniformity. Signed-off-by: Shubhankar Kuranagatti <shubhankarvk(a)gmail.com> --- drivers/i2c/i2c-core-smbus.c | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/drivers/i2c/i2c-core-smbus.c b/drivers/i2c/i2c-core-smbus.c index d2d32c0fd8c3..205750518c21 100644 --- a/drivers/i2c/i2c-core-smbus.c +++ b/drivers/i2c/i2c-core-smbus.c @@ -66,10 +66,11 @@ static inline void i2c_smbus_add_pec(struct i2c_msg *msg) } /* Return <0 on CRC error - If there was a write before this read (most cases) we need to take the - partial CRC from the write part into account. - Note that this function does modify the message (we need to decrease the - message length to hide the CRC byte from the caller). */ + * If there was a write before this read (most cases) we need to take the + * partial CRC from the write part into account. + * Note that this function does modify the message (we need to decrease the + * message length to hide the CRC byte from the caller). + */ static int i2c_smbus_check_pec(u8 cpec, struct i2c_msg *msg) { u8 rpec = msg->buf[--msg->len]; @@ -113,7 +114,7 @@ EXPORT_SYMBOL(i2c_smbus_read_byte); s32 i2c_smbus_write_byte(const struct i2c_client *client, u8 value) { return i2c_smbus_xfer(client->adapter, client->addr, client->flags, - I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL); + I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL); } EXPORT_SYMBOL(i2c_smbus_write_byte); @@ -387,7 +388,8 @@ static s32 i2c_smbus_xfer_emulated(struct i2c_adapter *adapter, u16 addr, if (read_write == I2C_SMBUS_READ) { msg[1].flags |= I2C_M_RECV_LEN; msg[1].len = 1; /* block length will be added by - the underlying bus driver */ + * the underlying bus driver + */ i2c_smbus_try_get_dmabuf(&msg[1], 0); } else { msg[0].len = data->block[0] + 2; @@ -418,7 +420,8 @@ static s32 i2c_smbus_xfer_emulated(struct i2c_adapter *adapter, u16 addr, msg[1].flags |= I2C_M_RECV_LEN; msg[1].len = 1; /* block length will be added by - the underlying bus driver */ + * the underlying bus driver + */ i2c_smbus_try_get_dmabuf(&msg[1], 0); break; case I2C_SMBUS_I2C_BLOCK_DATA: -- 2.17.1

2 years, 11 months

[PATCH] drm/msm: Do not unpin/evict exported dma-buf's

by Rob Clark

From: Rob Clark <robdclark(a)chromium.org> Our initial logic for excluding dma-bufs was not quite right. In particular we want msm_gem_get/put_pages() path used for exported dma-bufs to increment/decrement the pin-count. Also, in case the importer is vmap'ing the dma-buf, we need to be sure to update the object's status, because it is now no longer potentially evictable. Fixes: 63f17ef83428 drm/msm: Support evicting GEM objects to swap Signed-off-by: Rob Clark <robdclark(a)chromium.org> --- drivers/gpu/drm/msm/msm_gem.c | 16 +++++++++++++++- drivers/gpu/drm/msm/msm_gem.h | 4 ++-- 2 files changed, 17 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c index 09ef4ec6eb34..17f85d2f23ab 100644 --- a/drivers/gpu/drm/msm/msm_gem.c +++ b/drivers/gpu/drm/msm/msm_gem.c @@ -190,13 +190,25 @@ struct page **msm_gem_get_pages(struct drm_gem_object *obj) } p = get_pages(obj); + + if (!IS_ERR(p)) { + msm_obj->pin_count++; + update_inactive(msm_obj); + } + msm_gem_unlock(obj); return p; } void msm_gem_put_pages(struct drm_gem_object *obj) { - /* when we start tracking the pin count, then do something here */ + struct msm_gem_object *msm_obj = to_msm_bo(obj); + + msm_gem_lock(obj); + msm_obj->pin_count--; + GEM_WARN_ON(msm_obj->pin_count < 0); + update_inactive(msm_obj); + msm_gem_unlock(obj); } int msm_gem_mmap_obj(struct drm_gem_object *obj, @@ -646,6 +658,8 @@ static void *get_vaddr(struct drm_gem_object *obj, unsigned madv) ret = -ENOMEM; goto fail; } + + update_inactive(msm_obj); } return msm_obj->vaddr; diff --git a/drivers/gpu/drm/msm/msm_gem.h b/drivers/gpu/drm/msm/msm_gem.h index 1b519fcd8418..66fb40b87122 100644 --- a/drivers/gpu/drm/msm/msm_gem.h +++ b/drivers/gpu/drm/msm/msm_gem.h @@ -228,7 +228,7 @@ static inline bool is_active(struct msm_gem_object *msm_obj) /* imported/exported objects are not purgeable: */ static inline bool is_unpurgeable(struct msm_gem_object *msm_obj) { - return msm_obj->base.dma_buf && msm_obj->base.import_attach; + return msm_obj->base.import_attach || msm_obj->pin_count; } static inline bool is_purgeable(struct msm_gem_object *msm_obj) @@ -278,7 +278,7 @@ static inline void mark_unpurgeable(struct msm_gem_object *msm_obj) static inline bool is_unevictable(struct msm_gem_object *msm_obj) { - return is_unpurgeable(msm_obj) || msm_obj->pin_count || msm_obj->vaddr; + return is_unpurgeable(msm_obj) || msm_obj->vaddr; } static inline void mark_evictable(struct msm_gem_object *msm_obj) -- 2.30.2

2 years, 11 months

Re: [Linaro-mm-sig] [PATCH] ASoC: fsl: imx-pcm-dma: Don't request dma channel in probe

by Lucas Stach

Am Mittwoch, dem 21.04.2021 um 14:54 +0000 schrieb Robin Gong: > On 20201/04/20 22:01 Lucas Stach <l.stach(a)pengutronix.de> wrote: > > Am Dienstag, dem 20.04.2021 um 13:47 +0000 schrieb Robin Gong: > > > On 2021/04/19 17:46 Lucas Stach <l.stach(a)pengutronix.de> wrote: > > > > Am Montag, dem 19.04.2021 um 07:17 +0000 schrieb Robin Gong: > > > > > Hi Lucas, > > > > > > > > > > On 2021/04/14 Lucas Stach <l.stach(a)pengutronix.de> wrote: > > > > > > Hi Robin, > > > > > > > > > > > > Am Mittwoch, dem 14.04.2021 um 14:33 +0000 schrieb Robin Gong: > > > > > > > On 2020/05/20 17:43 Lucas Stach <l.stach(a)pengutronix.de> wrote: > > > > > > > > Am Mittwoch, den 20.05.2020, 16:20 +0800 schrieb Shengjiu > > Wang: > > > > > > > > > Hi > > > > > > > > > > > > > > > > > > On Tue, May 19, 2020 at 6:04 PM Lucas Stach > > > > > > > > > <l.stach(a)pengutronix.de> > > > > > > > > wrote: > > > > > > > > > > Am Dienstag, den 19.05.2020, 17:41 +0800 schrieb Shengjiu > > Wang: > > > > > > > > > > > There are two requirements that we need to move the > > > > > > > > > > > request of dma channel from probe to open. > > > > > > > > > > > > > > > > > > > > How do you handle -EPROBE_DEFER return code from the > > > > > > > > > > channel request if you don't do it in probe? > > > > > > > > > > > > > > > > > > I use the dma_request_slave_channel or dma_request_channel > > > > > > > > > instead of dmaengine_pcm_request_chan_of. so there should > > > > > > > > > be not -EPROBE_DEFER return code. > > > > > > > > > > > > > > > > This is a pretty weak argument. The dmaengine device might > > > > > > > > probe after you try to get the channel. Using a function to > > > > > > > > request the channel that doesn't allow you to handle probe > > > > > > > > deferral is IMHO a bug and should be fixed, instead of > > > > > > > > building even more assumptions on top > > > > > > of it. > > > > > > > > > > > > > > > > > > > - When dma device binds with power-domains, the power > > > > > > > > > > > will be enabled when we request dma channel. If the > > > > > > > > > > > request of dma channel happen on probe, then the > > > > > > > > > > > power-domains will be always enabled after kernel boot > > > > > > > > > > > up, which is not good for power saving, so we need > > > > > > > > > > > to move the request of dma channel to .open(); > > > > > > > > > > > > > > > > > > > > This is certainly something which could be fixed in the > > > > > > > > > > dmaengine driver. > > > > > > > > > > > > > > > > > > Dma driver always call the pm_runtime_get_sync in > > > > > > > > > device_alloc_chan_resources, the > > > > > > > > > device_alloc_chan_resources is called when channel is > > > > > > > > > requested. so power is enabled on channel > > > > > > request. > > > > > > > > > > > > > > > > So why can't you fix the dmaengine driver to do that RPM > > > > > > > > call at a later time when the channel is actually going to > > > > > > > > be used? This will allow further power savings with other > > > > > > > > slave devices than the audio > > > > PCM. > > > > > > > Hi Lucas, > > > > > > > Thanks for your suggestion. I have tried to implement > > > > > > > runtime autosuspend in fsl-edma driver on i.mx8qm/qxp with > > > > > > > delay time (2 > > > > > > > sec) for this feature as below (or you can refer to > > > > > > > drivers/dma/qcom/hidma.c), and pm_runtime_get_sync/ > > > > > > > pm_runtime_put_autosuspend in all dmaengine driver interface > > > > > > > like > > > > > > > device_alloc_chan_resources/device_prep_slave_sg/device_prep_d > > > > > > > ma_c > > > > > > > ycli > > > > > > > c/ > > > > > > > device_tx_status... > > > > > > > > > > > > > > > > > > > > > pm_runtime_use_autosuspend(fsl_chan->de > > v); > > > > > > > pm_runtime_set_autosuspend_delay(fsl_cha > > n-> > > > > dev, > > > > > > 2000); > > > > > > > > > > > > > > That could resolve this audio case since the autosuspend could > > > > > > > suspend runtime after > > > > > > > 2 seconds if there is no further dma transfer but only channel > > > > > > request(device_alloc_chan_resources). > > > > > > > But unfortunately, it cause another issue. As you know, on our > > > > > > > i.mx8qm/qxp, power domain done by scfw > > > > > > > (drivers/firmware/imx/scu-pd.c) > > > > > > over mailbox: > > > > > > > imx_sc_pd_power()->imx_scu_call_rpc()-> > > > > > > > imx_scu_ipc_write()->mbox_send_message() > > > > > > > which means have to 'waits for completion', meanwhile, some > > > > > > > driver like tty will call dmaengine interfaces in non-atomic > > > > > > > case as below, > > > > > > > > > > > > > > static int uart_write(struct tty_struct *tty, const unsigned > > > > > > > char *buf, int count) { > > > > > > > ....... > > > > > > > port = uart_port_lock(state, flags); > > > > > > > ...... > > > > > > > __uart_start(tty); //call > > > > start_tx()->dmaengine_prep_slave_sg... > > > > > > > uart_port_unlock(port, flags); > > > > > > > return ret; > > > > > > > } > > > > > > > > > > > > > > Thus dma runtime resume may happen in that timing window and > > > > > > > cause > > > > > > kernel alarm. > > > > > > > I'm not sure whether there are similar limitations on other > > > > > > > driver subsystem. But for me, It looks like the only way to > > > > > > > resolve the contradiction between tty and scu-pd (hardware > > > > > > > limitation on > > > > > > > i.mx8qm/qxp) is to give up autosuspend and keep > > > > > > > pm_runtime_get_sync > > > > > > only in device_alloc_chan_resources because request channel is a > > > > > > safe non-atomic phase. > > > > > > > Do you have any idea? Thanks in advance. > > > > > > > > > > > > If you look closely at the driver you used as an example > > > > > > (hidma.c) it looks like there is already something in there, > > > > > > which looks very much like what you need > > > > > > here: > > > > > > > > > > > > In hidma_issue_pending() the driver tries to get the device to > > > > > > runtime > > > > resume. > > > > > > If this doesn't work, maybe due to the power domain code not > > > > > > being able to be called in atomic context, the actual work of > > > > > > waking up the dma hardware and issuing the descriptor is shunted to a > > tasklet. > > > > > > > > > > > > If I'm reading this right, this is exactly what you need here to > > > > > > be able to call the dmaengine code from atomic context: try the > > > > > > rpm get and issue immediately when possible, otherwise shunt the > > > > > > work to a > > > > > > non- atomic context where you can deal with the requirements of > > scu-pd. > > > > > Yes, I can schedule_work to worker to runtime resume edma channel > > > > > by > > > > calling scu-pd. > > > > > But that means all dmaengine interfaces should be taken care, not > > > > > only > > > > > issue_pending() but also > > > > > dmaengine_terminate_all()/dmaengine_pause()/dmaengine_resume()/ > > > > > dmaengine_tx_status(). Not sure why hidma only take care > > > > > issue_pending. Maybe their user case is just for memcpy/memset so > > > > > that no further complicate case as ALSA or TTY. > > > > > Besides, for autosuspend in cyclic, we have to add > > > > > pm_runtime_get_sync into interrupt handler as qcom/bam_dma.c. but > > > > > how could resolve the scu-pd's non-atmoic limitation in interrupt > > handler? > > > > > > > > Sure, this all needs some careful analysis on how those functions > > > > are called and what to do about atomic callers, but it should be > > > > doable. I don't see any fundamental issues here. > > > > > > > > I don't see why you would ever need to wake the hardware in an > > > > interrupt handler. Surely the hardware is already awake, as it > > > > wouldn't signal an interrupt otherwise. And for the issue with > > > > scu-pd you only care about the state transition of > > > > suspended->running. If the hardware is already running/awake, the > > > > runtime pm state handling is nothing more than bumping a refcount, > > > > which is atomic safe. Putting the HW in suspend is already handled > > asynchronously in a worker, so this is also atomic safe. > > > But with autosuspend used, in corner case, may runtime suspended > > > before falling Into edma interrupt handler if timeout happen with the > > > delay value of pm_runtime_set_autosuspend_delay(). Thus, can't touch > > > any edma interrupt status register unless runtime resume edma in > > > interrupt handler while runtime resume function based on scu-pd's power > > domain may block or sleep. > > > I have a simple workaround that disable runtime suspend in > > > issue_pending worker by calling pm_runtime_forbid() and then enable > > > runtime auto suspend in dmaengine_terminate_all so that we could > > > easily regard that edma channel is always in runtime resume between > > > issue_pending and channel terminated and ignore the above interrupt > > handler/scu-pd limitation. > > > > The IRQ handler is the point where you are informed by the hardware that a > > specific operation is complete. I don't see any use-case where it would be valid > > to drop the rpm refcount to 0 before the IRQ is handled. Surely the hardware > > needs to stay awake until the currently queued operations are complete and if > > the IRQ handler is the completion point the IRQ handler is the first point in > > time where your autosuspend timer should start to run. There should never be > > a situation where the timer expiry can get between IRQ signaling and the > > handler code running. > But the timer of runtime_auto_suspend decide when enter runtime suspend rather > than hardware, while transfer data size and transfer rate on IP bus decide when the > dma interrupt happen. > But it isn't the hardware that decides to drop the rpm refcount to 0 and starting the autosuspend timer, it's the driver. > Generally, we can call pm_runtime_get_sync(fsl_chan->dev)/ > pm_runtime_mark_last_busy in interrupt handler to hope the runtime_auto_suspend > timer expiry later than interrupt coming, but if the transfer data size is larger in cyclic > and transfer rate is very slow like 115200 or lower on uart, the fix autosuspend timer > 100ms/200ms maybe not enough, hence, runtime suspend may execute meanwhile > the dma interrupt maybe triggered and caught by GIC(but interrupt handler prevent > by spin_lock_irqsave in pm_suspend_timer_fn() ), and then interrupt handler start > to run after runtime suspend. If your driver code drops the rpm refcount to 0 and starts the autosuspend timer while a cyclic transfer is still in flight this is clearly a bug. Autosuspend is not there to paper over driver bugs, but to amortize cost of actually suspending and resuming the hardware. Your driver code must still work even if the timeout is 0, i.e. the hardware is immediately suspended after you drop the rpm refcount to 0. If you still have transfers queued/in-flight the driver code must keep a rpm reference. Regards, Lucas

2 years, 12 months

Re: [Linaro-mm-sig] [PATCH v5] dma-buf: Add DmaBufTotal counter in meminfo

by Pekka Paalanen

On Wed, 21 Apr 2021 10:37:11 +0000 <Peter.Enderborg(a)sony.com> wrote: > On 4/21/21 11:15 AM, Daniel Vetter wrote: > > On Tue, Apr 20, 2021 at 11:37:41AM +0000, Peter.Enderborg(a)sony.com wrote: > >> But I dont think they will. dma-buf does not have to be mapped to a process, > >> and the case of vram, it is not covered in current global_zone. All of them > >> would be very nice to have in some form. But it wont change what the > >> correct value of what "Total" is. > > We need to understand what the "correct" value is. Not in terms of kernel > > code, but in terms of semantics. Like if userspace allocates a GL texture, > > is this supposed to show up in your metric or not. Stuff like that. > That it like that would like to only one pointer type. You need to know what > you pointing at to know what it is. it might be a hardware or a other pointer. To clarify the GL texture example: a GL texture consumes "graphics memory", whatever that is, but they are not allocated as dmabufs. So they count for resource consumption, but they do not show up in your counter, until they become exported. Most GL textures are never exported at all. In fact, exporting GL textures is a path strongly recommended against due to unsuitable EGL/GL API. As far as I understand, dmabufs are never allocated as is. Dmabufs always just wrap an existing memory allocation. So creating (exporting) a dmabuf does not increase resource usage. Allocation increases resource usage, and most allocations are never exported. > If there is a limitation on your pointers it is a good metric to count them > even if you don't know what they are. Same goes for dma-buf, they > are generic, but they consume some resources that are counted in pages. Given above, I could even argue that *dmabufs* do not consume resources. They only reference resources that were already allocated by some specific means (not generic). They might keep the resource allocated, preventing it from being freed if leaked. As you might know, there is no really generic "dmabuf allocator", not as a kernel UAPI nor as a userspace library (the hypothetical Unix Device Memory Allocator library notwithstanding). So this kind of leaves the question, what is DmaBufTotal good for? Is it the same kind of counter as VIRT in 'top'? If you know your particular programs, you can maybe infer if VIRT is too much or not, but for e.g. WebKitWebProcess it is normal to have 85 GB in VIRT and it's not a problem (like I have, on this 8 GB RAM machine). Thanks, pq

2 years, 12 months

Re: [Linaro-mm-sig] [PATCH v5] dma-buf: Add DmaBufTotal counter in meminfo

by Daniel Vetter

On Tue, Apr 20, 2021 at 11:37:41AM +0000, Peter.Enderborg(a)sony.com wrote: > On 4/20/21 1:14 PM, Daniel Vetter wrote: > > On Tue, Apr 20, 2021 at 09:26:00AM +0000, Peter.Enderborg(a)sony.com wrote: > >> On 4/20/21 10:58 AM, Daniel Vetter wrote: > >>> On Sat, Apr 17, 2021 at 06:38:35PM +0200, Peter Enderborg wrote: > >>>> This adds a total used dma-buf memory. Details > >>>> can be found in debugfs, however it is not for everyone > >>>> and not always available. dma-buf are indirect allocated by > >>>> userspace. So with this value we can monitor and detect > >>>> userspace applications that have problems. > >>>> > >>>> Signed-off-by: Peter Enderborg <peter.enderborg(a)sony.com> > >>> So there have been tons of discussions around how to track dma-buf and > >>> why, and I really need to understand the use-cass here first I think. proc > >>> uapi is as much forever as anything else, and depending what you're doing > >>> this doesn't make any sense at all: > >>> > >>> - on most linux systems dma-buf are only instantiated for shared buffer. > >>> So there this gives you a fairly meaningless number and not anything > >>> reflecting gpu memory usage at all. > >>> > >>> - on Android all buffers are allocated through dma-buf afaik. But there > >>> we've recently had some discussions about how exactly we should track > >>> all this, and the conclusion was that most of this should be solved by > >>> cgroups long term. So if this is for Android, then I don't think adding > >>> random quick stop-gaps to upstream is a good idea (because it's a pretty > >>> long list of patches that have come up on this). > >>> > >>> So what is this for? > >> For the overview. dma-buf today only have debugfs for info. Debugfs > >> is not allowed by google to use in andoid. So this aggregate the information > >> so we can get information on what going on on the system. > >> > >> And the LKML standard respond to that is "SHOW ME THE CODE". > > Yes. Except this extends to how exactly this is supposed to be used in > > userspace and acted upon. > > > >> When the top memgc has a aggregated information on dma-buf it is maybe > >> a better source to meminfo. But then it also imply that dma-buf requires memcg. > >> > >> And I dont see any problem to replace this with something better with it is ready. > > The thing is, this is uapi. Once it's merged we cannot, ever, replace it. > > It must be kept around forever, or a very close approximation thereof. So > > merging this with the justification that we can fix it later on or replace > > isn't going to happen. > > It is intended to be relevant as long there is a dma-buf. This is a proper > metric. If the newer implementations is not get the same result it is > not doing it right and is not better. If a memcg counter or a global_zone > counter do the same thing they it can replace the suggested method. We're not talking about a memcg controller, but about a dma-buf tracker. Also my point was that you might not have a dma-buf on most linux systems (outside of android really) for most gpu allocations. So we kinda need to understand what you actually want to measure, not "I want to count all the dma-buf in the system". Because that's a known-problematic metric in general. > But I dont think they will. dma-buf does not have to be mapped to a process, > and the case of vram, it is not covered in current global_zone. All of them > would be very nice to have in some form. But it wont change what the > correct value of what "Total" is. We need to understand what the "correct" value is. Not in terms of kernel code, but in terms of semantics. Like if userspace allocates a GL texture, is this supposed to show up in your metric or not. Stuff like that. -Daniel > > > > -Daniel > > > >>> -Daniel > >>> > >>>> --- > >>>> drivers/dma-buf/dma-buf.c | 12 ++++++++++++ > >>>> fs/proc/meminfo.c | 5 ++++- > >>>> include/linux/dma-buf.h | 1 + > >>>> 3 files changed, 17 insertions(+), 1 deletion(-) > >>>> > >>>> diff --git a/drivers/dma-buf/dma-buf.c b/drivers/dma-buf/dma-buf.c > >>>> index f264b70c383e..4dc37cd4293b 100644 > >>>> --- a/drivers/dma-buf/dma-buf.c > >>>> +++ b/drivers/dma-buf/dma-buf.c > >>>> @@ -37,6 +37,7 @@ struct dma_buf_list { > >>>> }; > >>>> > >>>> static struct dma_buf_list db_list; > >>>> +static atomic_long_t dma_buf_global_allocated; > >>>> > >>>> static char *dmabuffs_dname(struct dentry *dentry, char *buffer, int buflen) > >>>> { > >>>> @@ -79,6 +80,7 @@ static void dma_buf_release(struct dentry *dentry) > >>>> if (dmabuf->resv == (struct dma_resv *)&dmabuf[1]) > >>>> dma_resv_fini(dmabuf->resv); > >>>> > >>>> + atomic_long_sub(dmabuf->size, &dma_buf_global_allocated); > >>>> module_put(dmabuf->owner); > >>>> kfree(dmabuf->name); > >>>> kfree(dmabuf); > >>>> @@ -586,6 +588,7 @@ struct dma_buf *dma_buf_export(const struct dma_buf_export_info *exp_info) > >>>> mutex_lock(&db_list.lock); > >>>> list_add(&dmabuf->list_node, &db_list.head); > >>>> mutex_unlock(&db_list.lock); > >>>> + atomic_long_add(dmabuf->size, &dma_buf_global_allocated); > >>>> > >>>> return dmabuf; > >>>> > >>>> @@ -1346,6 +1349,15 @@ void dma_buf_vunmap(struct dma_buf *dmabuf, struct dma_buf_map *map) > >>>> } > >>>> EXPORT_SYMBOL_GPL(dma_buf_vunmap); > >>>> > >>>> +/** > >>>> + * dma_buf_allocated_pages - Return the used nr of pages > >>>> + * allocated for dma-buf > >>>> + */ > >>>> +long dma_buf_allocated_pages(void) > >>>> +{ > >>>> + return atomic_long_read(&dma_buf_global_allocated) >> PAGE_SHIFT; > >>>> +} > >>>> + > >>>> #ifdef CONFIG_DEBUG_FS > >>>> static int dma_buf_debug_show(struct seq_file *s, void *unused) > >>>> { > >>>> diff --git a/fs/proc/meminfo.c b/fs/proc/meminfo.c > >>>> index 6fa761c9cc78..ccc7c40c8db7 100644 > >>>> --- a/fs/proc/meminfo.c > >>>> +++ b/fs/proc/meminfo.c > >>>> @@ -16,6 +16,7 @@ > >>>> #ifdef CONFIG_CMA > >>>> #include <linux/cma.h> > >>>> #endif > >>>> +#include <linux/dma-buf.h> > >>>> #include <asm/page.h> > >>>> #include "internal.h" > >>>> > >>>> @@ -145,7 +146,9 @@ static int meminfo_proc_show(struct seq_file *m, void *v) > >>>> show_val_kb(m, "CmaFree: ", > >>>> global_zone_page_state(NR_FREE_CMA_PAGES)); > >>>> #endif > >>>> - > >>>> +#ifdef CONFIG_DMA_SHARED_BUFFER > >>>> + show_val_kb(m, "DmaBufTotal: ", dma_buf_allocated_pages()); > >>>> +#endif > >>>> hugetlb_report_meminfo(m); > >>>> > >>>> arch_report_meminfo(m); > >>>> diff --git a/include/linux/dma-buf.h b/include/linux/dma-buf.h > >>>> index efdc56b9d95f..5b05816bd2cd 100644 > >>>> --- a/include/linux/dma-buf.h > >>>> +++ b/include/linux/dma-buf.h > >>>> @@ -507,4 +507,5 @@ int dma_buf_mmap(struct dma_buf *, struct vm_area_struct *, > >>>> unsigned long); > >>>> int dma_buf_vmap(struct dma_buf *dmabuf, struct dma_buf_map *map); > >>>> void dma_buf_vunmap(struct dma_buf *dmabuf, struct dma_buf_map *map); > >>>> +long dma_buf_allocated_pages(void); > >>>> #endif /* __DMA_BUF_H__ */ > >>>> -- > >>>> 2.17.1 > >>>> > >>>> _______________________________________________ > >>>> dri-devel mailing list > >>>> dri-devel(a)lists.freedesktop.org > >>>> https://urldefense.com/v3/__https://lists.freedesktop.org/mailman/listinfo/… > >> _______________________________________________ > >> dri-devel mailing list > >> dri-devel(a)lists.freedesktop.org > >> https://urldefense.com/v3/__https://lists.freedesktop.org/mailman/listinfo/… > > _______________________________________________ > dri-devel mailing list > dri-devel(a)lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch

2 years, 12 months

Re: [Linaro-mm-sig] [PATCH 23/40] drm/ttm/ttm_bo: Fix incorrectly documented function 'ttm_bo_cleanup_refs'

by Christian König

Am 16.04.21 um 16:37 schrieb Lee Jones: > Fixes the following W=1 kernel build warning(s): > > drivers/gpu/drm/ttm/ttm_bo.c:293: warning: expecting prototype for function ttm_bo_cleanup_refs(). Prototype was for ttm_bo_cleanup_refs() instead > > Cc: Christian Koenig <christian.koenig(a)amd.com> > Cc: Huang Rui <ray.huang(a)amd.com> > Cc: David Airlie <airlied(a)linux.ie> > Cc: Daniel Vetter <daniel(a)ffwll.ch> > Cc: Sumit Semwal <sumit.semwal(a)linaro.org> > Cc: dri-devel(a)lists.freedesktop.org > Cc: linux-media(a)vger.kernel.org > Cc: linaro-mm-sig(a)lists.linaro.org > Signed-off-by: Lee Jones <lee.jones(a)linaro.org> Reviewed-by: Christian König <christian.koenig(a)amd.com> > --- > drivers/gpu/drm/ttm/ttm_bo.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c > index cfd0b92923973..defec9487e1de 100644 > --- a/drivers/gpu/drm/ttm/ttm_bo.c > +++ b/drivers/gpu/drm/ttm/ttm_bo.c > @@ -274,7 +274,7 @@ static void ttm_bo_flush_all_fences(struct ttm_buffer_object *bo) > } > > /** > - * function ttm_bo_cleanup_refs > + * ttm_bo_cleanup_refs > * If bo idle, remove from lru lists, and unref. > * If not idle, block if possible. > *

2 years, 12 months

Re: [Linaro-mm-sig] [PATCH 35/40] drm/amd/amdgpu/amdgpu_cs: Repair some function naming disparity

by Christian König

Am 16.04.21 um 16:37 schrieb Lee Jones: > Fixes the following W=1 kernel build warning(s): > > drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c:685: warning: expecting prototype for cs_parser_fini(). Prototype was for amdgpu_cs_parser_fini() instead > drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c:1502: warning: expecting prototype for amdgpu_cs_wait_all_fence(). Prototype was for amdgpu_cs_wait_all_fences() instead > drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c:1656: warning: expecting prototype for amdgpu_cs_find_bo_va(). Prototype was for amdgpu_cs_find_mapping() instead > > Cc: Alex Deucher <alexander.deucher(a)amd.com> > Cc: "Christian König" <christian.koenig(a)amd.com> > Cc: David Airlie <airlied(a)linux.ie> > Cc: Daniel Vetter <daniel(a)ffwll.ch> > Cc: Sumit Semwal <sumit.semwal(a)linaro.org> > Cc: Jerome Glisse <glisse(a)freedesktop.org> > Cc: amd-gfx(a)lists.freedesktop.org > Cc: dri-devel(a)lists.freedesktop.org > Cc: linux-media(a)vger.kernel.org > Cc: linaro-mm-sig(a)lists.linaro.org > Signed-off-by: Lee Jones <lee.jones(a)linaro.org> Reviewed-by: Christian König <christian.koenig(a)amd.com> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c > index b5c7669980458..90136f9dedd65 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c > @@ -672,7 +672,7 @@ static int amdgpu_cs_sync_rings(struct amdgpu_cs_parser *p) > } > > /** > - * cs_parser_fini() - clean parser states > + * amdgpu_cs_parser_fini() - clean parser states > * @parser: parser structure holding parsing context. > * @error: error number > * @backoff: indicator to backoff the reservation > @@ -1488,7 +1488,7 @@ int amdgpu_cs_fence_to_handle_ioctl(struct drm_device *dev, void *data, > } > > /** > - * amdgpu_cs_wait_all_fence - wait on all fences to signal > + * amdgpu_cs_wait_all_fences - wait on all fences to signal > * > * @adev: amdgpu device > * @filp: file private > @@ -1639,7 +1639,7 @@ int amdgpu_cs_wait_fences_ioctl(struct drm_device *dev, void *data, > } > > /** > - * amdgpu_cs_find_bo_va - find bo_va for VM address > + * amdgpu_cs_find_mapping - find bo_va for VM address > * > * @parser: command submission parser context > * @addr: VM address

2 years, 12 months

Re: [Linaro-mm-sig] [PATCH 33/40] drm/amd/amdgpu/amdgpu_ring: Provide description for 'sched_score'

by Christian König

Am 16.04.21 um 16:37 schrieb Lee Jones: > Fixes the following W=1 kernel build warning(s): > > drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c:169: warning: Function parameter or member 'sched_score' not described in 'amdgpu_ring_init' > > Cc: Alex Deucher <alexander.deucher(a)amd.com> > Cc: "Christian König" <christian.koenig(a)amd.com> > Cc: David Airlie <airlied(a)linux.ie> > Cc: Daniel Vetter <daniel(a)ffwll.ch> > Cc: Sumit Semwal <sumit.semwal(a)linaro.org> > Cc: amd-gfx(a)lists.freedesktop.org > Cc: dri-devel(a)lists.freedesktop.org > Cc: linux-media(a)vger.kernel.org > Cc: linaro-mm-sig(a)lists.linaro.org > Signed-off-by: Lee Jones <lee.jones(a)linaro.org> Reviewed-by: Christian König <christian.koenig(a)amd.com> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c > index 688624ebe4211..7b634a1517f9c 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c > @@ -158,6 +158,7 @@ void amdgpu_ring_undo(struct amdgpu_ring *ring) > * @irq_src: interrupt source to use for this ring > * @irq_type: interrupt type to use for this ring > * @hw_prio: ring priority (NORMAL/HIGH) > + * @sched_score: optional score atomic shared with other schedulers > * > * Initialize the driver information for the selected ring (all asics). > * Returns 0 on success, error on failure.

2 years, 12 months

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Linaro-mm-sig April 2021