On Tue, May 10, 2011 at 9:35 PM, rmorell@nvidia.com wrote:
One other important note: buffer format properties may be necessary to set up mappings (both CPU and iommu mappings). For example, both types of mappings may need to know tiling properties of the buffer. This may be a property of the mapping itself (consider it baked into the page table entries), not necessarily something a different driver or userspace can program later independently.
I've been thinking a bit about this.. we have something similar with TILER on OMAP4 (which is sort of a system-wide IOMMU that can also do tiling), where you wouldn't see the same data if you just remapped the same physical pages elsewhere. (I think GART's can in some cases untile to provide the CPU with a sensible view of tiled surfaces, which would somehow be similar... but disclaimer: I'm not coming from a desktop graphics background so please correct me as needed ;-)). At least in the OMAP4 case, any other hw block in the system can all read thru the remapped TILER address and continue to see a untiled layout of the pixel data.
But you could still take the hit of copy'ing the buffer contents to a tiled format the first time it was used somewhere where it needed to be tiled, and as long as everyone else is accessing via the TILER address (so they see the untiled view). As long as you are not doing it every time you use the buffer, but only the first time you pass it around. It does get complicated if some hw bits are already using the buffer. Maybe having a sync-object associated with the buffer so you have some way to wait until others are not using the buffer would help. And I think you need similar infrastructure if you wanted to be able to lazily unmap buffers only when you start running out of mapping space.. ie. if your IOMMU has a limited amount of memory that could be mapped at a time.
On the other hand, maybe it is easier just to rev DRI2 protocol to pass more information to xorg driver so it could make a better decision about how to allocate the buffer in the first place.
BR, -R