[Linaro-mm-sig] Re: [PATCH v10 00/15] dma-fence: Deadline awareness

On Wed, Mar 8, 2023 at 10:53 AM Rob Clark robdclark@gmail.com wrote:

From: Rob Clark robdclark@chromium.org

This series adds a deadline hint to fences, so realtime deadlines such as vblank can be communicated to the fence signaller for power/ frequency management decisions.

This is partially inspired by a trick i915 does, but implemented via dma-fence for a couple of reasons:

1. To continue to be able to use the atomic helpers
2. To support cases where display and gpu are different drivers

This iteration adds a dma-fence ioctl to set a deadline (both to support igt-tests, and compositors which delay decisions about which client buffer to display), and a sw_sync ioctl to read back the deadline. IGT tests utilizing these can be found at:

I read through the series and didn't spot anything. Have a rather weak

Reviewed-by: Matt Turner mattst88@gmail.com

Thanks!