== Progress==
lowlevellock performance bugs - TCWG-435 [5/10]
* Tried various methods to build/test glibc for aarch64
* Eventually succeeded (tests passed)
cbuild benchmarking - TCWG-360 [3/10]
* cbuildized spec2xxx scripts working as far as 'run'
Meetings/mail/etc [2/10]
== Plan ==
Holiday for one week
After that:
* Clean up cbuildized spec2xxx scripts, cbuildize them some more &
discuss with Rob
* Send lowlevellock patch upstream
* If time, put together some more experimental memset implementations
I have been thinking how to simplify cross-testing our toolchain for both automated and development/debugging builds, and among various options the most universal I came up with is ARM hardware + ssh + binfmt_misc + sshfs. I wonder if anyone has already tried this or can suggest alternatives which are as universal.
Given:
- host x86_64 development machine
- cross-compiler
- target hardware with fast network to the host
- host and target have ssh
- testsuite (gcc/glibc/gdb/etc)
Here is how it is going to work
1. On host we create a simple wrapper script that will pass through its arguments as command to execute on target via ssh:
===
#!/bin/sh
ssh -p 22NN $TARGET_BOARD "$@"
===
2. We register this script in binfmt_misc to be used as interpreter for target binaries. Value of $TARGET_BOARD will be picked up from the environment and can be set to different boards for different testsuite runs.
3. The target board needs to be prepared for a particular testsuite run:
-- Runtime libraries need to be either copied or mounted via sshfs from the host. It is an open question how best to install several sets of libraries (for parallel runs) so that each set appears to be main system libraries. My current thinking is a separate ssh server inside chroot per each test run.
-- Test directory needs to be sshfs mounted on target from host so that the target could see test executables.
-- Preparation/finalization of the board can either be done explicitly before/after testing. Or it can be done on demand by the aforementioned script: the script checks whether a multiplexed ssh socket exists, and, if not, it prepares the board and starts a multiplexed ssh connection.
4. Testing is fired up as if it is normal "native" testing. Whenever kernel is given an ARM binary to execute -- it passes it off to wrapper, which passes it off to the target board via ssh. The board sees same filesystem as host and happily executes binaries against toolchain runtime libraries.
Comments or rotten tomatoes?
Thank you,
--
Maxim Kuvyrkov
www.linaro.org
= Progress ==
* Worked on the LLVM branch of Cbuildv2 (TCWG - 1/10).
* More work on regression test analysis and reporting. (TCWG 448 - 5/10)
* Meetings and Misc (4/10)
- Produced lots of test results via Jenkins, need to verify
they're not having remote target problems.
== Plan ==
* Verify test runs aren't having problems with remote targets.
* Start training the Jenkins Failure Analysis plugin.
* Install lava-tool and get it working on all the tcwgbuild* machines.
* Continuing work on regression test analysis and reporting. (TCWG
448 - 5/10)
== Progress: ==
Holiday [2/10]
Rewrite of division optimisation changes following review - TCWG293 [8/10]
== Plan ==
Mostly on holiday this week. I may be working sporadically
Back full time
== Progress ==
* resumed 1:1 calls with Zhenqiang, Venkat, Charles.
* GCC trunk cross-validation (2/10):
- monitored results
- a few improvements/cleanups
* Neon-intrinsics tests (5/10)
- continuing conversion
- needs to add support AArch64 Neon overflow flag
* Misc (meetings, conf-call, ..) (3/10)
* Successfully tried OpenNX setup put in place by Maxim
(on office computer, despite firewall and no root access)
== Next ==
* GCC trunk cross-validation:
- monitor and report results
- use this system to pre-validate a patch from Kugan
- share scripts with Kugan
* Neon intrinsics tests:
- continue conversion
- hopefully push a preliminary version upstream
== Progress==
lowlevellock performance bugs - TCWG-435 [3/10]
* Trying to build/test aarch64 on a foundation model
cbuild benchmarking - TCWG-360 [4/10]
* Integrating Maxim's spec scripts into Kugan's benchmarking branch
* Began modifying the branch to use existing cbuild functions where possible
Meetings/mail/etc [3/10]
== Plan ==
Holiday next week (w/c 26th May)
This week:
* Try testing glibc on system qemu rather than foundation model
* Carry on with cbuild benchmarking
* If time, put together some more experimental memset implementations
== Progress ==
* GDB arm v8 record/replay
-- Bug fixing: Improve gdb.reverse testsuite results on armv8
[TCWG-451] [2/10]
-- core files issue submitted bfd patch upstream [TCWG-451]
-- Support for recording Data processing - Advanced SIMD and
Cryptographic [TCWG-405] [TCWG-407] [3/10]
-- Support for recording A64 Data processing - Floating point
instructions [TCWG-404] [TCWG-406] [2/10]
* Miscellaneous
-- UK visa application submission [3/10]
== Plan ==
* Continue work on issues related to GDB arm v8 record/replay
The Linaro Toolchain Working Group (TCWG) is pleased to announce the 2014.05
stable release of the Linaro GCC 4.9 source package.
Linaro GCC 4.9 2014.05 is the second Linaro GCC source package release in the
4.9 series. It is based on FSF GCC 4.9.1+svn210052 and includes performance
improvements and bug fixes.
With the imminent release of ARMv8 hardware and the recent release of the
GCC 4.9 compiler the Linaro TCWG will be focusing on stabilization and
performance of the compiler as the FSF GCC compiler approaches version 4.9.1.
The Linaro TCWG will provide monthly stable[1] source package releases until
FSF GCC 4.9.1 is released. At that point Linaro GCC 4.9 will merge in
FSF GCC 4.9.1 and, release Linaro GCC 4.9.1, and then return to a schedule of
stable quarterly releases and monthly engineering[2] releases.
Interesting changes in this GCC source package release include:
* Updates to GCC 4.9.1+svn210052
* Backport of the Ada AArch64 support
Feedback and Support
Subscribe to the important Linaro mailing lists and join our IRC channels to
stay on top of Linaro development.
** Linaro Toolchain Development "mailing list":
http://lists.linaro.org/mailman/listinfo/linaro-toolchain
** Linaro Toolchain IRC channel on irc.freenode.net at @#linaro-tcwg@
* Bug reports should be filed in Launchpad against "Linaro GCC project":
http://bugs.launchpad.net/gcc-linaro/+filebug.
* Questions? "ask Linaro":
http://ask.linaro.org/.
* Interested in commercial support? inquire at "Linaro support":mailto:
support(a)linaro.org
[1] Stable source package releases are defined as releases where the full Linaro
Toolchain validation plan is executed.
[2] Engineering source package releases are defined as releases where the
compiler is only put through unit-testing and full validation is not
performed.
== Progress ==
* Reload - IRA bug fix (5/10)
- In thumb2 mode, we get a pattern "*ior_scc_scc" for the third
argument expression by the combiner pass.
- Expression Class:foo(x,0,((y==x)||(z==x))) x gets register r1 and second r2 .
- The class object this pointer is passed in r0. r7 is used for stack pointer.
- The pattern "*ior_scc_scc" demands more LO_REGISTERS. It needs 5
LO_registers for destination and 4 source operands. But we are left
with r3,r4,r5,r6 only.
- Such situation is handled for Thumb1 only using
TARGET_CLASS_LIKELY_SPILLED_P. Thumb2 should accept HI registers also.
- Changing the pattern to accept general registers for destination
operation is also not helping.
- Need to explore secondary reload macros.
* Misc
- AMD meetings and internal tasks (2/10)
- 1-1 meetings (Ryan, Christophe and Maxim) (1/10)
* Testing: Installed packages and ran GCC Linaro compiler 4.8
correctness tests on hardware. Completed running SPEC 2006 for -O3
-mcpu=cortex-a57 flag (2/10).
== Plan ==
* Continue bug fixing.
* LTO bootstrap failure
* Testing GCC Linaro compiler on hardware.
* New laptop install ubuntu, set up chroot and migrate to toolchain
64 environment.
* UK VISA processing.
== Progress ==
* TCWG-413 (8/10) sha1 performance
- Looked at IRA dumps and aarch64 target hooks.
- GCC now uses FP registers as register class and this results in lots
of fmovs for the test-case.
- Discussed in list and tried spill_class hook for aarch64. This helps
sha1.
- Regression tested the change.
- Ran Spec2000 with the changes and 168.wupwise, 187.facerec are failing.
- Investigation continues.
* TCWG-468 (1/10)
- Continuing with benchmarking.
* Set-up NX and started using it (1/10)
== Plan ==
* Benchmarking.
* Upstream zero/sign extension elimination activities.
* sha1 performance.
== Issue ==
* None.
== Progress ==
* Commit three patches to enhance shrink-wrap for loop. But community
reports an ICE in dwarf info with the patches. (TCWG-133, 5/10)
* Update/test shrink-wrap for apcs patch according to comments (TCWG-482, 2/10)
* Loop-invariant heuristic tuning (TCWG-763, 2/10).
* Investigate Linaro crosstool-ng gdb build fail for 2014.05 config.
But have not find an easy way to fix lsbcc build fail. (1/10).
== Plans ==
* Fix the ICE triggered by shrink-wrap changes.
* gdb build fail issue if Linaro still use crosstool-ng for release
* Continue loop-invariant heuristic tuning
== Planned leaves ==
* June 2.
== Week of May 12th ==
- Rolled out TCWG development environment. (TCWG-483, 4/10)
-- https://collaborate.linaro.org/display/TCWG/TCWG+Development+Environment
-- Demo'ed it both inside and outside TCWG.
-- Finished up configuration of environment and setup backups.
- STREAM performance regression (TCWG-388, 2/10)
-- Prepared first batch of patches for upstream submission
- Various discussions, including ... (4/10)
-- register allocation and reload with Venkat
-- register allocation with Kugan
-- benchmarking with Kugan
--
Maxim Kuvyrkov
www.linaro.org
== Week of May 5th ==
- Worked on standardized development environment (TCWG-483, 8/10)
-- Deployed it on toolchain64.lava and maximk.linaro.org.
-- Demoed and got early feedback from several people.
- Various discussions, including ... (2/10)
-- GCC debugging and var-tracking pass with Michael.
--
Maxim Kuvyrkov
www.linaro.org
== Progress ==
* Kernel (CARD-1246 5/10)
- Named register support in Clang
* http://reviews.llvm.org/D3797
* Toolchain (CARD-862 3/10)
- Testing libc++abi on ARM, now that it has EHABI
- Setting up Chromebook library buildbot (FAILED)
- One of the bots had a battery failure, needs to be replaced
- Which means we won't have the lib bot soon :(
* Background (2/10)
- Code review, meetings, discussions, etc.
== Plan ==
* Follow up named register patch upstream
* Help LLVMLinux with moving current code to conform to global named regs
* Help LLVMLinux with LAVA bots
* Replace the failing buildbot
* Set up a temporary (local) library buildbot on the spare Chromebook
* Try other hardware to replace all Chromebooks
== Progress ==
* Various patch review and followup (2/10)
* Helping diagnose an aarch64 linker crash in buildroot (1/10)
* Failed attempt to update kernel on Chromebook (1/10)
* Analyze and benchmark cortex-strings to find the oustanding work (1/10)
* Get docker setup with cgroups to measure memory usage (4/10, TCWG-441)
* Trying to get NX working on Fedora 20 (1/10)
== Issues ==
* None
== Plan ==
* Get postgresql and hopefully others working with new benchmark setup
* Figure out how to make NX work
--
Will Newton
Toolchain Working Group, Linaro
Hi All,
AAarch64 back-end defines GENERAL_REGS and CORE_REGS with the same set
of register. Is there any reason why we need this?
target hooks like aarch64_register_move_cost doesn’t handle CORE_REGS.
In addition, IRA cost calculation also has logics like make common class
biggest of best and alternate; this might get confused with this.
Attached RFC patch removes it. regression tested for
aarch64-none-linux-gnu on qemu-aarch64 with now new regression. Is this OK ?
Thanks,
Kugan
gcc/
2014-05-14 Kugan Vivekanandarajah <kuganv(a)linaro.org>
* config/aarch64/aarch64.c (aarch64_regno_regclass) : Change CORE_REGS
to GENERAL_REGS.
(aarch64_secondary_reload) : LikeWise.
(aarch64_class_max_nregs) : Remove CORE_REGS.
* config/aarch64/aarch64.h (enum reg_class) : Remove CORE_REGS.
(REG_CLASS_NAMES) : Likewise.
(REG_CLASS_CONTENTS) : LikeWise.
(INDEX_REG_CLASS) : Change CORE_REGS to GENERAL_REGS.
== Progress ==
* Reload - IRA bug fix (5/10)
- Expression foo(a,0,((b==a)||(c==a))) a gets register r1 and second
a gets register r6, but third a not able to reuse r6 or r1 and spill
failure.
- Debugging the IRA dumps and reload dumps
- Getting Maxim help
* TCWG-180 (3/10)
- GCC bootstrap fails with compare errors.
- comparing the dis assembly.
* Misc (2/10)
- AMD meetings
- 1-1 meetings
- looked at 1 x86 related bug
== Plan ==
* Continue bug fixing.
* LTO bootstrap failure
Short week, 2 days off (4/10)
== Issues ==
* None
== Progress ==
* CARD-1162 : Linaro GCC 4.9 (6/10)
- Prepared FSF 4.9 branch merge in Linaro one.
- Backported Zhenqiang upstream patches.
- Iterate with rob on various jenkins issues
- Looked at gerrit for the backport reviews
* Misc:
o Cbuildv1 baby-sitting
== Next ==
* Continue on Linaro GCC 4.9 release.
== Progress ==
* TCWG-413 (5/10)
- Rebuild FSF 4.8, Linaro 4.8 and Linaro 4.9 releases for aarch64 with
crosstool-ng (Kept all the dependencies same and used different gcc).
- Lost all the config for running benchmark on the test-machine and set
it up again.
- Re-ran spec2k benchmarking and results.
* TCWG-468 (5/10)
- Looked in detail IRA dumps and cost models.
- Also looked at IRA and LRA code to get better understanding of the
algorithms.
- Costs dumped seems odd and looking further.
== Plan ==
* Benchmarking.
* Upstream zero/sign extension elimination activities.
* sha1 performance.
== Progress ==
* GDB arm v8 record/replay: core files issue [TCWG-451] [6/10]
-- Add bfd support for missing aarch64 core file handlers.
-- Added regset caching functions for aarch64 linux gdb.
* GDB arm v8 record/replay: Support for recording A64 Data processing
- Floating point instructions [TCWG-404] [3/10]
* Miscellaneous [1/10]
-- Meetings
-- Browse through Linaro training resources.
-- UK visa documents preparation.
== Plan ==
* Continue work to support GDB arm v8 record/replay
-- Support for recording A64 Data processing - Floating point
instructions [TCWG-404]
-- Support for recording syscalls, signals etc [TCWG-409]
* UK visa application submission.
= Progress ==
* Continue improving LAVA support in DejaGnu. (TCWG 455 - 1/10)
* More work on regression test analysis and reporting. (TCWG 448 - 4/10)
- Did builds of 4.8, 4.9, and master to establish baseline test
results.
- Worked on test analysis script.
- Jenkins matrix builds & test runs are working, and copying results to
toolchain64.
* Meetings and Misc (5/10)
- Fixing various Cbuildv2 bugs found by yroux dealing with git.
- Fixed bug where the GDB build was polluting the destdir with
binutils.
- Installed OpenNX chroot on toolchain64 with maxim.
- Fixed disk on toolchain64 with maxim to access all 4TB. Use GPT...
- Added more config triplets to Jenkins, so now it builds everything
we support.
== Plan ==
* Install lava-tool and get it working on all the tcwgbuild* machines.
* Continue improving LAVA support in DejaGnu. (TCWG 455)
* More work on regression test analysis and reporting. (TCWG 448)
- Do diffs of new builds test runs from the baseline, not the previous
build.
* Try to look at the LLVM branch of Cbuildv2, do some testing of it.
== Issues ==
* Jenkins needs to be able to see LAVA slaves as online, but not
booted..
* The skiing is good, but the avalanche danger is high, so limits
accessibility.
* We need a backup plan for toolchain64.
* Google groups have problems, so had to setup test results list on
one of my servers instead. (ask me if you want to be on the list) The
new beta release of GNU Mailman looks very nice.
* The chromebooks in our build farm can't build GCC native.
- rob -
== Issue ==
* None.
== Progress ==
* Identify a build environment issue for linux64 gdb binaries "Symbol
format `elf32-littlearm' unknown".
* Send out shrink-wrap related patches from community review (TCWG-133, 2/10)
* Move-loop-invariant heuristic tuning (TCWG-469, 8/10).
- Update heuristic according to benchmark testing.
== Plan ==
* Update shrink-wrap patches according to comments.
* Continue on move-loop-invariants heuristic tune.
== Planned leaves ==
* June 2.
== Progress==
Holiday [2/10]
Fixing performance bugs in lowlevellock - TCWG-435 [4/10]
* Initial patch for lowlevellock.h largely done, awaiting an aarch64 test run
* About 1/2 of the lowlevellock.h's remain post-patch, need to ask
some questions about them
cortex-strings memset - TCWG-156 [1/10]
* Fixed an alternative implementation, a little more benchmarking investigation
cbuild benchmarking branch [1/10]
* Hunting for correct benchmark source, added a little more error checking
Meetings/mail/etc [2/10]
== Plan ==
More of the same -
* Post lowlevellock.h patch and ask some questions
* Finish exploring memset alternatives and work out how to benchmark them
* Carry on with cbuild benchmarking branch
Holiday 26th - 30th May
== Progress ==
* Kernel (CARD-1246 3/10)
- Committed Named Register LLVM change
- Working on the Clang part
- Helping LLVMLinux to set up bots/LAVA tests
* Tests/CBuild2 (CARD-716 2/10)
- Submitted CBuild2 LLVM patch, waiting for review
- Implemented sqrt to pacify GCC on sphereflake
* Background (3/10)
- Code review, meetings, discussions, etc.
* Bank Holiday Monday (2/10)
== Plan ==
* Continue named registers on Clang
* Continue LLVMLinux hardware test bot
* Run some benchmarks on AArch64
* Check CBuild2 progress, try builds live
== Progress ==
* Bank Holiday Monday (2/10)
* glibc patch review and followup (1/10)
* Started investigating malloc intensive applications (3/10, TCWG-440)
* Investigate a couple of linker issues (1/10)
* Figure out how to benchmark postgresql (3/10, TCWG-441)
== Issues ==
* None
== Plan ==
* Develop a good general way to measure memory usage of complex applications
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
Bank holiday [2/10]
Investigated using D01 board [1/10]
Retested and pinged division patch - TCWG-293 [2/10]
Added post-index addressing to NEON memory access for ARM -TCWG-430 [5/10]
* wrote patch
* makes useful improvement to libvpx performance
== Progress ==
Holiday [3/10]
Post-indexed addressing for NEON on Aarch64 - TCWG-430 [3/10]
* needs much more work than for ARM
Revisited apparent NEON scheduling problem in libvpx - TCWG-429 [2/10]
* it transpires that this was an incorrect analysis
* the assembler code didn't conform to the ABI
* upstream has now fixed this
Received review for division patch - TCWG-293 [2/10]
* needs a rewrite
(Resending to correct address)
== Progress==
TCWG-435 needless busy-wait in lowlevellock.c (0/10)
* Patches for lowlevellock.c sent to list
* Patch for lowlevellock.h still to do
TCWG-156 cortex-strings memset (5/10)
* Dug through a bunch of docs and fiddled with the source
Looking at the cbuild benchmarking branch (2/10)
* Some back and forth around getting access to lava lab
* Poked around the code, made some small improvements
== Misc ==
Meetings/mail/etc 3/10
== Plan ==
(Public) holiday on Monday
Put together lowlevellock.h patch
Do something more substantial with cbuild
Finish fiddling with the memset source
== Week of April 28th ==
- Made a prototype rootfs for benchmarking (CARD-1413, 2/10)
-- Got a tutorial from Fathi on how to build openembedded rootfs.
-- Wrote up notes at https://collaborate.linaro.org/display/TCWG/How+to+build+openembedded+rootf…
- More benchmarking setup (TCWG-413, 2/10)
- Various discussions (3/10)
-- 1-on-1 with Venkat (NX setup and GCC reload problem)
-- 1-on-1 with Kugan (benchmarking handover)
-- 1-on-1 with Michael (var-tracking investigation)
-- 1-on-1 with Rob (command-line access to LAVA and job submission)
- Made NX/schroot rootfs (3/10)
-- This can be deployed on Linaro [build] servers and provide standardized development environment for toolchain work.
-- More details to follow.
- Misc
-- Reported a kernel oops related to networking on vexpress64.
- Tyler Baker of the LAVA team deserve a special mention for answering all the questions about LAVA from the toolchain group!
--
Maxim Kuvyrkov
www.linaro.org
== Week of April 21st ==
- Setup SPEC benchmarking runs in LAVA environment (TCWG-413, 5/10).
-- Built SPEC cpu2000/cpu2006 tools for armv7a/armv8
-- Added SPEC CPU2006 support to spec2xxx-utils.
- Various discussions (1/10)
- Short week due to public holidays (4/10)
--
Maxim Kuvyrkov
www.linaro.org
== This week ==
- Investigated infinite loop bug [TCWG-290][6/10]
- Narrowed bug down to data flow analysis of micro operation in
variable tacking pass
- Created bugzilla report
- Still debugging to determine cause of infinite loop
== Next week ==
- Attend ARM Big Picture conference, May 5th-7th
- Resolve infinite loop bug
== Future ==
== Progress ==
* More work on regression test analysis and reporting. (TCWG 448 - 2/10)
* Started adding LAVA support to DejaGnu. (TCWG 455 - 4/10)
* Meetings and Misc (4/10)
- Fixed various bit-rot bugs in the cbuildv2 testsuite.
- Figured out how to add SSH keys to our launchpad account.
== Plan ==
* Continue improving LAVA support in DejaGnu. (TCWG 455)
* More work on regression test analysis and reporting. (TCWG 448)
== Progress ==
* GDB reverse debugging on aarch64
-- Further progress on decoding of aarch64 load store instructions.
[TCWG-401] [1/10]
* Investigated and progressed towards fix for GDB unable to read core files
[TCWG-451] [6/10]
* Public Holiday on 1st May [2/10]
* Miscellaneous [1/10]
-- Meetings
-- UK visa documents attestation
-- LCU14 registration and travel booking
== Plan ==
* GDB unable to read core files [TCWG-451]
-- Fix aarch64 linux regset functions
-- Add support for writing aarch64 regset in aarch64 core file.
* Miscellaneous
-- UK visa application
-- LCU14 finalize bookings.
== Progress ==
* TCWG-447 (5/10)
* Re-spin few versions of the patches and posted after testing based
on reviews.
* http://gcc.gnu.org/ml/gcc-patches/2014-04/msg01743.html
* http://gcc.gnu.org/ml/gcc-patches/2014-04/msg01744.html
* TCWG-413 Spec2006 (5/10)
* Updated the scripts to deploy libraries and to run cross spec
benchmarking with them.
* Experimented with open embedded image generation for benchmarking-
still finding some issues even with a trusty chroot.
* Started benchmarking and variance analysis.
== Plan ==
* Benchmarking.
* Upstream zero/sign extension elimination activities.
* Start with literal pool merging.
Very short week (3 half days)
== Progress ==
* GCC trunk cross-validation (2/10):
- monitored results, and reported some regressions/new fails
- moved away from Jenkins
- as commit rate has decreased, there is no backlog in validations
* Neon-intrinsics test (1/10):
- Continuing conversion for inclusion in the GCC testsuite.
- Preparing an additional Makefile, simpler than the current one,
to help using the testsuite for various GCC variants until
conversion is complete.
== Next ==
* Continue to closely monitor GCC trunk validations
* Neon intrinsics tests
* Off Thursday/Friday
Short week, Labor day (2/10)
== Issues ==
* None
== Progress ==
* Launchpad bugs: (4/10)
o LP #1307197 : gcc-4.9 miscompiles linux kernel zlib for armv3
- This an LRA issue for architectures < armv4 withi movhi
- Investigation ongoing
o LP #1169164 : including signal.h exposes various PSR_MODE #defines
- The proposed patch fix the issue
- Still need some validation before upstream submission
* Test new backport workflow and Cbuild2 (2/10)
- Some troubles to access the build farm.
* Misc:
o Cbuildv1 baby-sitting (1/10)
o Various meetings (1/10).
== Next ==
- Two days off
- FSF branch merge + backports
== Issues ==
* None
== Progress ==
* May 1-2: Laybor day holiday
* Commit fcsel support patch for aarch64 @r209889.
* Tuning move-loop-invariants heuristics for -fira-loop-pressure:
- Record register pressure for each invariant other than a max for all.
- Take register pressure into account when selecting the best candidate.
== Plan ==
* Tuning move-loop-invariants heuristics
* Ping pending patches.
== Planned leaves ==
* June 2.
* -fno-sched-interblock
* loop-inv
> Hello,
> I have a problem building gcc-linaro-arm-linux-gnueabihf
> toolchain for my x86_64 system. I download crosstool-ng (v1.13) and
> toolchain source code (4.8-2014.03) from
> http://releases.linaro.org/14.03/components/toolchain/binaries. I use
> the example configuration linaro-arm-linux-gnueabihf (obtained from
> ct-ng list-samples) and modify some entries using menuconfig option,
> like the local tarballs directory (pointing to downloaded toolchains
> source code directory) and the prefix directory (custom directory output).
>
> This is the problem during the execution of "ct-ng build" command:
>
> =================================================================
>
> [INFO ] Installing final compiler
>
> [EXTRA] Configuring final compiler
>
> [EXTRA] Building final compiler
>
> [EXTRA] AFMOYA: EMPIEZA A EJECUTARSE make jobsflags all
>
> [EXTRA] -j5
>
> [EXTRA] /home/afmoya/Descargas/build/.build/arm-linux-gnueabihf/build/build-cc
>
> [ERROR] configure: error: Link tests are not allowed after GCC_NO_EXECUTABLES.
>
> [ERROR] make[2]: *** [configure-zlib] Error 1
>
> [ERROR] make[1]: *** [all] Error 2
>
> [ERROR]
>
> [ERROR] >>
>
> [ERROR] >> Error happened in: main[scripts/crosstool-NG.sh]
>
> [ERROR] >>
>
> [ERROR] >> For more info on this error, look at the file: 'build.log'
>
> [ERROR] >> There is a list of known issues, some with workarounds, in:
>
> [ERROR] >> '/opt/cross-linaro/share/doc/ct-ng-linaro-1.13.1-4.8-2014.03/B - Known issues.txt'
>
> [ERROR]
>
> [ERROR] Build failed in step 'Extracting and patching toolchain components'
>
> [ERROR]
>
> [ERROR] (elapsed: 11:18.57)
>
> make: *** [build] Error 2
>
>
> Highlighted in green some entries added for me in attemp to understand
> the execution secuence.
>
> The error is triggered in the "configure-zlib" target of
> "${CT_TOP_DIR}/.build/arm-linux-gnueabihf/build/build-cc/Makefile". The
> "configure.log" of the
> "${CT_TOP_DIR}/.build/arm-linux-gnueabihf/build/build-cc/zlib/"
> directory shows some errors (I don't know if the are significants):
>
> LINE 83: Thread model: posix
>
> LINE 84: gcc version 4.7.2 (Debian 4.7.2-5)
>
> LINE 85: configure:3234: $? = 0
>
> LINE 86: configure:3223: x86_64-build_unknown-linux-gnu-gcc -V >&5
>
> LINE 87: gcc: error: unrecognized command line option '-V'
>
> LINE 88: gcc: fatal error: no input files
>
> LINE 89: compilation terminated.
>
> LINE 90: configure:3234: $? = 4
>
> LINE 91: configure:3223: x86_64-build_unknown-linux-gnu-gcc -qversion >&5
>
> LINE 92: gcc: error: unrecognized command line option '-qversion'
>
> LINE 93: gcc: fatal error: no input files
>
> LINE 94: compilation terminated.
>
> ...
>
> LINE 188: configure:6661: x86_64-build_unknown-linux-gnu-gcc -E conftest.c
>
> LINE 189: conftest.c:11:28: fatal error: ac_nonexistent.h: No such file or directory
>
> LINE 190: compilation terminated.
>
> ...
>
> LINE 207: configure:6720: x86_64-build_unknown-linux-gnu-gcc -E conftest.c
>
> LINE 208: conftest.c:11:28: fatal error: ac_nonexistent.h: No such file or directory
>
> LINE 209: compilation terminated.
>
> ...
>
> LINE 318: configure:10852: x86_64-build_unknown-linux-gnu-gcc -E conftest.c
>
> LINE 319: conftest.c:23:28: fatal error: ac_nonexistent.h: No such file or directory
>
> LINE 320: compilation terminated.
>
> Some idea of what's the problem?
>
> This is my system info:
> Linux afmoya-pc 3.2.0-4-amd64 #1 SMP Debian 3.2.57-3 x86_64 GNU/Linux
>
> and some tools version installed in my system:
> gcc (Debian 4.7.2-5) 4.7.2
> GNU Make 3.81
> GNU Awk 4.0.1
> ...
>
> Best regards:
> Alexis Fajardo Moya.
I have removed the "zlib" folder from "gcc-linaro-4.8-2014.03.tar.xz" tarball, the compiler is also using zlib-1.2.5 statically linked, and thats permit compile the Linaro toolchain.
Best regards
Lic. Reinier Millo Sánchez
Centro de Estudios de Informática
Universidad Central "Marta Abreu" de Las Villas
-----
"...hay locuras que son la locura
personales locuras de dos...
hay locuras sin nombre
sin fecha sin cura
que no vale la pena curar...
que una de ellas será mi morir."
Lic. Reinier Millo Sánchez
Centro de Estudios de Informática
Universidad Central "Marta Abreu" de Las Villas
Hello,
I have a problem building gcc-linaro-arm-linux-gnueabihf
toolchain for my x86_64 system. I download crosstool-ng (v1.13) and
toolchain source code (4.8-2014.03) from
http://releases.linaro.org/14.03/components/toolchain/binaries. I use
the example configuration linaro-arm-linux-gnueabihf (obtained from
ct-ng list-samples) and modify some entries using menuconfig option,
like the local tarballs directory (pointing to downloaded toolchains
source code directory) and the prefix directory (custom directory output).
This is the problem during the execution of "ct-ng build" command:
=================================================================
[INFO ] Installing final compiler
[EXTRA] Configuring final compiler
[EXTRA] Building final compiler
[EXTRA] AFMOYA: EMPIEZA A EJECUTARSE make jobsflags all
[EXTRA] -j5
[EXTRA] /home/afmoya/Descargas/build/.build/arm-linux-gnueabihf/build/build-cc
[ERROR] configure: error: Link tests are not allowed after GCC_NO_EXECUTABLES.
[ERROR] make[2]: *** [configure-zlib] Error 1
[ERROR] make[1]: *** [all] Error 2
[ERROR]
[ERROR] >>
[ERROR] >> Error happened in: main[scripts/crosstool-NG.sh]
[ERROR] >>
[ERROR] >> For more info on this error, look at the file: 'build.log'
[ERROR] >> There is a list of known issues, some with workarounds, in:
[ERROR] >> '/opt/cross-linaro/share/doc/ct-ng-linaro-1.13.1-4.8-2014.03/B - Known issues.txt'
[ERROR]
[ERROR] Build failed in step 'Extracting and patching toolchain components'
[ERROR]
[ERROR] (elapsed: 11:18.57)
make: *** [build] Error 2
Highlighted in green some entries added for me in attemp to understand
the execution secuence.
The error is triggered in the "configure-zlib" target of
"${CT_TOP_DIR}/.build/arm-linux-gnueabihf/build/build-cc/Makefile". The
"configure.log" of the
"${CT_TOP_DIR}/.build/arm-linux-gnueabihf/build/build-cc/zlib/"
directory shows some errors (I don't know if the are significants):
LINE 83: Thread model: posix
LINE 84: gcc version 4.7.2 (Debian 4.7.2-5)
LINE 85: configure:3234: $? = 0
LINE 86: configure:3223: x86_64-build_unknown-linux-gnu-gcc -V >&5
LINE 87: gcc: error: unrecognized command line option '-V'
LINE 88: gcc: fatal error: no input files
LINE 89: compilation terminated.
LINE 90: configure:3234: $? = 4
LINE 91: configure:3223: x86_64-build_unknown-linux-gnu-gcc -qversion >&5
LINE 92: gcc: error: unrecognized command line option '-qversion'
LINE 93: gcc: fatal error: no input files
LINE 94: compilation terminated.
...
LINE 188: configure:6661: x86_64-build_unknown-linux-gnu-gcc -E conftest.c
LINE 189: conftest.c:11:28: fatal error: ac_nonexistent.h: No such file or directory
LINE 190: compilation terminated.
...
LINE 207: configure:6720: x86_64-build_unknown-linux-gnu-gcc -E conftest.c
LINE 208: conftest.c:11:28: fatal error: ac_nonexistent.h: No such file or directory
LINE 209: compilation terminated.
...
LINE 318: configure:10852: x86_64-build_unknown-linux-gnu-gcc -E conftest.c
LINE 319: conftest.c:23:28: fatal error: ac_nonexistent.h: No such file or directory
LINE 320: compilation terminated.
Some idea of what's the problem?
This is my system info:
Linux afmoya-pc 3.2.0-4-amd64 #1 SMP Debian 3.2.57-3 x86_64 GNU/Linux
and some tools version installed in my system:
gcc (Debian 4.7.2-5) 4.7.2
GNU Make 3.81
GNU Awk 4.0.1
...
Best regards:
Alexis Fajardo Moya.
== Progress ==
* Prototype scripting for macro-benchmarks for malloc (4/10, TCWG-441)
* glibc single thread optimization work (3/10, TCWG-436)
* Built releases of eglibc, gdb and binutils (2/10)
* glibc patch review and followup (1/10)
* Misc admin (expenses, LCU travel)
== Issues ==
* None
== Plan ==
* Various bits of patch followup
* More malloc macro-benchmark work
* See how single thread optimization discussion goes
* glibc benchmark graphing?
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
* Named Register (CARD-1246 2/10)
- Changing type of intrinsics, rebasing patch
* Build & Benchmark (CARD-716 6/10)
- Adding Clang+LLVM builds to CBuild2
- Re-setting APM's testing environment after replacement
* Background (2/10)
- Code review, etc.
- EuroLLVM 2014 outcome analysis, plans for 2015
== Plan ==
* Get Clang+LLVM in CBuild2
* Get Named registers in, then try Clang's parser
* Try SPEC on APM
hi,
For building arm64 kernel, I tried all toolchain released from
http://releases.linaro.org/latest/components/toolchain/binaries/
But it complained about some instructions bad:
/home/work/linux/arch/arm64/include/asm/irqflags.h: Assembler
messages:
/home/work/linux/arch/arm64/include/asm/irqflags.h:49: Error: no
such instruction: `msr daifset,'
/home/work/linux/arch/arm64/include/asm/irqflags.h:68: Error: no
such instruction: `mrs %rax,daif//arch_local_save_flags'
/home/work/linux/arch/arm64/include/asm/irqflags.h:49: Error: no
such instruction: `msr daifset,'
/home/work/linux/arch/arm64/include/asm/irqflags.h:68: Error: no
such instruction: `mrs %rax,daif//arch_local_save_flags'
/home/work/linux/arch/arm64/include/asm/irqflags.h:40: Error: no
such instruction: `msr daifclr,'
/home/work/linux/arch/arm64/include/asm/irqflags.h:68: Error: no
such instruction: `mrs %rax,daif//arch_local_save_flags'
/home/work/linux/arch/arm64/include/asm/irqflags.h:40: Error: no
such instruction: `msr daifclr,'
Could anyone tell how to solve it? thanks!
== Progress==
TCWG-435 needless busy-wait in lowlevellock.c (3/10)
* Patches ready, testing a bit slow & fiddly
TCWG-156 cortex-strings memset (3/10)
* Worried about noisy benchmarks
* Learned to use Lava
* Found some helpful internal docs
* Managed to tweak the code slightly
== Misc ==
Meetings/mail/etc 2/10
(Public) holiday 2/10
== Plan ==
Stop worrying and follow the general curve of the noisy benchmarks
(But also try to convince Maxim's spec scripts + lava to generate some
less noisy results)
Another public holiday next Monday
== Progress ==
* GDB reverse debugging on aarch64
-- Complete decoding of aarch64 data processing immediate instructions.
[TCWG-399] [1/10]
-- Complete decoding of aarch64 data processing register instructions.
[TCWG-402] [1/10]
-- Completed decoding of aarch64 exception and system instructions.
[TCWG-400] [2/10]
-- Further progress on decoding of aarch64 load store instructions.
[TCWG-401] [2/10]
-- Started implementation of aarch64 syscall record/replay. [TCWG-409]
[2/10]
* Sick Day Off on Monday [2/10]
== Plan ==
* GDB reverse debugging on aarch64
-- Further progress on decoding of aarch64 load store instructions.
[TCWG-401]
-- Further progress on aarch64 syscall record/replay. [TCWG-409]
* Public Holiday on 1st May.
Short week, Easter Monday + child care (3/10)
== Issues ==
* Toolchain64 disk still full every 2 days
== Progress ==
* Linaro GCC 4.9 2014.04 release (3/10)
- Branch merge with FSF 4.9.1
- Release tarball available on releases.linaro.org
- Announcement will follow
* Launchpad bugs: (2/10)
o LP #1169164 : including signal.h exposes various PSR_MODE #defines
- Discussed and implemented a fix
- Validation on-going
* Misc:
o Cbuildv1 baby-sitting (1/10)
o Various meetings (1/10).
o Resolved cards :
- TCWG-343. Make LRA the default for the ARM backend
- TCWG-422. LP-bug 1296676 : ICE in assign_by_spills building linux
btrfs module
== Next ==
- One day off (Labor day)
- Submit patch for LP #1169164
- TCWG-345. Analyse performance of LRA for ARM
== Progress ==
PGO - AArch64 (TCWG-179) (4/10)
* Completed SPEC2006 runs ( -O3 + PGO) in chroot + qemu-arm64-saucy
with Linaro branch(4.9).
* Perlbench train run failed, issue with qemu.
* DealII train runs failed due to system libstdc++.so.6 not compatible
with GCC 4.9.
Changing the LD_LIBRARY_PATH to point to the libstdc++.so.6 that
gets built along with GCC 4.9 solves the problem.
* CPU2000 runs are completed my maxim so functional testing of PGO for
spec benchmarks completed.
* Wating on Arm64 hardware to benchmark SPEC2000 and SPEC2006 and
compare against the PGO runs for x86.
Misc (2/10)
* Setup arm64-trusty chroot and built GCC 4.9 compiler
* Maxim 1-1 discussions and set up opennx client
* Checked libssp patch upstream status
* Read about gcc debug counters.
* Upgrade laptop to Ubuntu 14.04 LTS
Short week (22nd and 23rd leave (4/10))
== Plan ==
* Bug fixing.
== Issues==
* Waiting on hardware to Benchmark SPEC2006 PGO runs in hardware.
== Issue ==
* None
== Progress ==
* More tests on shrink-wrap changes (TCWG-133, 6/10).
- Cortex-m3 tests exposes a data flow issue: New BB created after
dfinit does not have correct df_lr info.
- Collect Spec2k benchmarks on X86-64 and ARM.
* Linaro 4.9 binaries release (2/10).
- Update Linaro crosstool-ng config and samples to support 4.9.
- Disable parallel build for gcc manual (pdf & html).
- Prebuild binaries for aarch64:
http://cbuild.validation.linaro.org/binaries/4.9-prerelease-2014.04
* Ping aarch64 fcel patch. But still no comments.
* Fix a trunk build fail issue @r209556.
* One day off (2/10).
== Plans ==
* Send the shrink-wrap related patches for review.
* PING the pending patches.
* Investigate move-loop-invariants heuristics.
== Planed leaves ==
* May 1-3: Labour day holiday.
== Progress ==
* Got Jenkins working with matrix builds so we can utilize all LAVA
slaves. (TCWG 1387 - 3/10)
* Write script to take a list of revisions and then build and test
them all and diff the results. (TCWG 448 - 4/10)
* More experimenting with Kugan's benchmarking branch. (1/10)
* Meetings and Misc (2/10)
== Plan ==
* More work on matrix builds. (TCWG 1387)
* More work on regression test analysis and reporting. (TCWG 448)
== Progress ==
* Short week (21st and 25th are public holidays) (4/10)
* TCWG-447 (5/10)
* Implemented and tested fenv target hooks, necessary built-ins and md
patterns
* Posted RFC patches for review for both arm and aarch64
* http://gcc.gnu.org/ml/gcc-patches/2014-04/msg01743.html
* http://gcc.gnu.org/ml/gcc-patches/2014-04/msg01744.html
* TCWG-413 Spec2006 (1/10)
* Finished the set-up
* On hold for now
== Plan ==
* upstream zero/sign extension elimination activities
* start with literal pool merging
== Progress ==
* Holidays (3 days)
- Clearing emails/tasks backlog
- Some post-trip illness
* AArch64 vs. ARM64
- Comparing performance of both back-ends
* Named Register
- Re-implementing after code review
- http://reviews.llvm.org/D3261
* Time
- CARD-1246 4/10
- Others 6/10
== Plan ==
* Finish named register in LLVM, check Clang
* Continue testing and benchmarking ARM64 back-end
* Have a try at CBuildv2
== Progress ==
* Back to work part-time (50%) for the next 3 weeks
* Easter Monday (1/5)
* (No Jira card - 2/5)
Analyzed at GCC trunk validations and reported some regressions.
The current commit rate is very high since stage1, and our compute
farm isn't fast enough. Should be OK after the week-end.
Modified my scripts so that I move these validations out of Jenkins.
* (No Jira card - 2/5)
Continued converting Neon intrinsics tests for inclusion in GCC testsuite.
To make the review easier, I now believe that it would be better that
I convert most of the testsuite first, and rework the patches order.
* Meetings and conf calls(1/5)
== Next ==
* Continue to closely monitor GCC trunk validations
* Neon intrinsics tests
* Off Thursday/Friday next week
=== Previous ===
libvpx NEON intrinsics investigation [TCWG-429 14/10]
. if interested, you can read the report in card 429:
https://cards.linaro.org/browse/TCWG-429?focusedCommentId=22247
tested division optimisation patches against current trunk and pinged
on list [2/10]
good friday bank holiday [2/10]
=== Next ===
Resume looking at NEON scheduling TCWG-135, which ties into libvpx
Upgrade laptop to Ubuntu 14.04 LTS
== Progress ==
* GDB reverse debugging on aarch64
-- Scored through a64 instruction set details. [1/10]
-- Completed testing and implementation of all basic structures.
[TCWG-398] [1/10]
-- Started decoding aarch64 load store instructions for recording.
[TCWG-401] [2/10]
-- Completed decoding of aarch64 branch instructions. [TCWG-400] [2/10]
-- Scored through a32 instruction set and researched on a32 recording.
[2/10]
* Miscellaneous [2/10]
-- UK visa application process
-- Tools cauldron and TCWG sprint bookings etc.
-- Meetings
== Plan ==
* GDB reverse debugging on aarch64
-- Complete decoding of aarch64 load store instructions. [TCWG-401]
-- Completed decoding of aarch64 exception and system instructions.
[TCWG-400]
== Progress ==
PGO - AArch64 (TCWG-179) (4/10)
* Completed SPEC runs -O3 -mcpu=cortex-a57 in chroot + qemu
arm64-saucy with Linaro release source (4.8) march 2014.
* Built Linaro 4.9 GCC branch based tool chain under chroot + qemu arm64-saucy
* Created a PGO config file for aarch64 as a peak configure and use --tune=peak
SPEC gave warning that FDO cannot be used as base flags and will
ignore the flags.
Also setting basepeak = yes gave issues and ran base runs and
setting it to no does both base and peak runs
* Started SPEC2006 runs for PGO under chroot + qemu arm64-saucy
* Perlbench train run failed in qemu.
* Other benchmarks are progressing.
GLIBC Systemtap (2/10)
* Ran glibc make check under qemu. Seen some illegal instructions and
ntpl tests hung in qemu aarch64. Will has completed these tests in
hardware.
Misc (2/10)
* Tested cbuildv2 to build gcc natively under qemu-arm64-chroot-ubuntu-saucy.
git gave issues not able to clone and hangs when downloading
binutils and gdb repos.
* 17th was Public Holiday (2/10)
== Plan ==
* Go through the results for SPEC2006 PGO runs.
* Start functional PGO runs for SPEC2000
* Bug fixing.
== Issues ==
* Toolchain64 disk full
== Progress ==
* Linaro GCC 4.9 2014.04 (3/10)
- Created FSF Linaro 4.9 branch
- Testing FSF 4.9.0 RC
* Launchpad bugs: (3/10)
o LP #1169164 : including signal.h exposes various PSR_MODE #defines
- Two possible ways to fix the issue (to be discussed with maintainers)
* Misc:
o Cbuildv1 baby-sitting (1/10)
o Various meetings (1/10).
== Next ==
- Easter Monday off
- Continue on LP #1169164
- Linaro GCC 4.9 release (when FSF release will be made)
== Week of April 14th ==
- Benchmarked autoprefetcher patches. (TCWG-388, 2/10)
- Continued working on spec2xxx-utils scripts. These are now gaining support for AArch64 and SPEC2006. (TCWG-238, 4/10)
- Various discussions. (2/10)
- Short week due to Good Friday / Easter. (2/10)
== Week of April 21st ==
- Take Tyler B.'s LAVA test definition for SPEC benchmarking and adjust spec2xxx-utils scripts to match LAVA environment.
- Investigate regressions on gap, eon and wupwise from autoprefetcher patches.
-- SPEC2000's gap in particular is sensitive to 1st scheduling pass with register pressure, and, apparently has a 5% performance improvement potential (at -O2 Cortex-A15).
- Various discussions.
- Even shorter week due to Easter Monday and ANZAC Day on Friday. (4/10)
--
Maxim Kuvyrkov
www.linaro.org
== Progress ==
* TCWG-238 (4/10)
- Created scripts and spectools for spec2006 to work with cbuild2
* TCWG-413 Spec2006 (4/10)
- Worked out Spec2006 config and src.alt for v1.1 src we have to work
correctly
- Got it to work natively with Maxim's scripts
- Did a trail run in apm openembedded; Needs ccrypt, tar with xz
compression support and system binutils with -mabi=ilp64 support
* 18th is Public Holiday (2/10)
== Plan ==
Benchmarking and FENV support
== Progress ==
* Attempted to get qemu-aarch64 working, fails on saucy, works on
precise. Did native build, hung during 'make check'. Setup
qemu-aarch64 chroot on all TCWG x86_64 build farm
machines. (4/10)
* Tracked down problem that's kept TCWG Jenkins from
working. (1/10)
* Tried Kugan's benchmarking branch of cbuildv2. (1/10)
* More work on Neon intrinsics tests. (TCWG-322 - 1/10)
* Meetings and Misc (3/10)
- Worked on benchmarking doc with Ryan.
== Plan ==
* Get Jenkins working with matrix builds so we can utilize all LAVA
slaves.
* More experimenting with Kugan's benchmarking branch.
== Issue ==
* None.
== Progress ==
* multilib can not work with multiarch anymore, so change Linaro
crosstool-ng to make 2014.04 release (2/10).
- For 4.8 release, we will revert the change and keep it align with
previous releases.
* Linaro 4.9 toolchain binaries pre-releases (Cross & native) for
aarch64 (2/10):
http://cbuild.validation.linaro.org/binaries/4.9-prerelease-2014.04.
* Try to set up native spec2006 tests on Chromebook. But got "out of
memory" when building the tools (1/10).
* Clean up and test for shrink-wrap enhancement (TCWG-133: 2/10)
* Rebase the aarch64 fcsel patch and testing. (1/10)
* ARM internal work (2/10)
== Plans ==
* Send the shrink-wrap related patches for review.
* PING the pending patches.
== Planed leaves ==
* April 21: Team event.
* May 1-3: Labour day holiday.
== This week ==
- Resolved Launchpad bug 1305042 as user error and provided proper asm
coding [TCWG-290] [2/10]
- Investigated infinite loop bug [TCWG-290][6/10]
- Determined the infinite loop is occurring in function
vt_find_locations in the variable tracking pass
- Still debugging to determine cause of infinite loop
- Absent due to illness on April 14th
== Next week ==
Vacation
== Future ==
Getting the following cross compiling for RPi on Debian Wheezy x64 using
the gcc-linaro-arm-linux-gnueabihf-raspbian toolchain within Eclipse
Kepler. Compilation works fine using native Debian x64 GCC and native
GCC compiler on the RPi.
out of dynamic memory in yy_create_buffer()
collect2: error: ld returned 2 exit status
make: * [cwebsocket] Error 1
I'm stumped. Can't find much info on the issue. Any ideas?
== Progress ==
* One bank holiday, half day childcare (3/10)
* Submit two iterations of malloc microbenchmark for glibc (4/10, TCWG-160)
* Submitted a patch for aarch64 ld bug with SystemTap notes (1/10)
* Investigated strcmp implementations for ARM (1/10, TCWG-153)
* Patch review, bugs, support, etc. (1/10)
== Issues ==
* None
== Plan ==
* malloc benchmarking/implementation work
--
Will Newton
Toolchain Working Group, Linaro
== Progress ==
TCWG-156 cortex-strings memset (3/10)
* Got a full set of benchmarks (for my 2 targets)
* Cleaned up code
* Sped up small memsets (for A9, A15 results pending)
glibc performance bug in lowlevellock.c (1/10 - I'll make a card next week)
* Learned to build and test glibc
* Understood the bug and worked out how to fix
Misc
* Meetings/mail (1/10)
* Infrastructure/workflow fiddling (1/10)
* 2 days holiday
== Plan ==
More TCWG-156
Finish off glibc performance bug
Public holidays Friday & Monday
== Week of April 7th ==
- Made a how-to wiki page/script on how to use QEMU and schroot for system emulation (TCWG-179, 2/10).
-- This allows you to get armhf or armel or aarch64 Ubuntu or Debian system within minutes, e.g., for PGO or LTO bootstraps of GCC.
-- https://collaborate.linaro.org/display/TCWG/ARM+ubuntu+chroot+with+QEMU+use…
-- I can move this page into public wiki if get enough interest from non-Linaro people.
- Fixed various bugs in instruction scheduling patch set (TCWG-388, 5/10).
- Scripted running SPEC2000 for reproducible benchmarking (TCWG-238, 3/10).
-- The scripts are now at http://git.linaro.org/toolchain/spec2xxx-utils.git
-- Scripts support both local (native) and remote (cross) benchmarking.
== Week of April 14th ==
- Document spec2xxx-utils scripts and see how they fare in LAVA environment. Add support for SPEC2006. (TCWG-238)
- Post autoprefetcher patch set upstream (TCWG-388)
--
Maxim Kuvyrkov
www.linaro.org
== Week of March 31st ==
- Investigated and scripted how to reproducibly run benchmarks (TCWG-238, 7/10)
-- Stop all services on target board
-- Use local disk
-- Stop networking
-- Bind benchmark to a specific CPU. Bind all other processes to a different CPU.
-- Disable frequency scaling.
- Various discussions (3/10)
--
Maxim Kuvyrkov
www.linaro.org
PGO - AArch64 (TCWG-179) (4/10)
* Installed QEMU user static for aarch64 and use them from
chroot environment in ubuntiu 13.10
* Tried installing chroot + qemu arm64-saucy in another ubuntu 12.04
machine. Issue with binfmts. looks to be corrupted.
* Bootstrap GCC with PGO with --enable-languages=c,c++,fortran
completed under arm64-chroot.
* Built GCC and binutils in native mode under chroot + qemu arm64-saucy .
* SPEC runs -O3 -mcpu=cortex-a57 in chroot + qemu arm64-saucy with
linaro release source (4.8).
Calculix did not finish under chroot + qemu arm64-saucy
GLIBC Systemtap (4/10)
* Built systemtap under chroot + qemu arm64-saucy. Built glibc with
the patch and used --enable-systemtap.
* Able to see setjmp probe in gdb, but longjmp probes not loading.
Tried debugging in gdb. gdb debugging support not available yet under
qemu.
* Discussed with Will newton on my observation.
Bug fix (1/10)
* Not much progress continued looking at reload dumps.
Misc (1/10)
* Tested cbuildv2 to build gcc natively under qemu-arm64-chroot-ubuntu-saucy.
cbuildv2 reports configure error for gcc and g++multilibs. But they
are not needed for native builds. Sent note to Rob for fixing it.
* Attend 1-1 with Ryan
* Attend 1-1 with Maxim discuss PGO work.
== Plan ==
PGO runs for SPEC2006 on chroot + qemu arm64-saucy
Upstream /testing for systemtap probes in glibc
Reload bug fix.
Leave: 17-Apr local state election.
== Progress ==
* GDB reverse debugging on aarch64 [6/10] [TCWG-398]
-- Setup development tree and debug environment.
-- Verified generic reverse debugging implementation aarch64.
-- Implemented main function stubs to catch instruction for decoding
and recording.
* Work on gdb testing utility [TCWG-96] [1/10]
-- Some tweaks to scripts and wiki updates.
* Experimented gdb testing/debugging with Aarch64 QEMU + Chroot [3/10]
== Plan ==
* GDB reverse debugging on aarch64 [TCWG-398]
-- Implement main instruction decoding handler and write function
stubs for different types of instructions.
-- Dig deeper into aarch32 for handling it through armv7
implementation if possible.
== Progress ==
TCWG-156 cortex-strings memset (5/10)
* Fixed a couple of bugs in the no-VFP case
* Ran benchmarks, discarded broken benchmarks, ran more benchmarks
* Explored benchmarking scripts
* Took a hard look at the memset tests
* Experimented with ARM-internal cortex-strings benchmark (not useful right now)
Misc
* Meetings (1/10)
* Kicked an A15 target until it worked (1/10)
* 1/2 day holiday
== Plan ==
More TCWG-156
Maxim's glibc starter issue
Holiday Tuesday
Public Holidays Friday & next Monday
1 day off (Child care)
== Issues ==
* Toolchain64 disk full
== Progress ==
* Released Linaro GCC 4.7 and 4.8 2014.04 (5/10)
* Launchpad bugs: (1/10)
o LP #1169164 : including signal.h exposes various PSR_MODE #defines
- rebased and rework patch
* Misc:
o Cbuildv1 baby-sitting (1/10)
o Various meetings (1/10).
== Next ==
- Continue on LP #1169164
- Linaro GCC 4.9 release
== Issue ==
* None
== Progress ==
* 2 day off.
* Investigate lp:1304267 and close it as invalid.
* Investigate shrink-wrap bootstrap issues [4/10, TCWG-133]
- Re-implement the copy propagate part by referring cprop_hardreg pass.
- Other tests are ongoing.
* Document cross-native build on wiki:
https://wiki.linaro.org/WorkingGroups/ToolChain/cross-native
== Plans ==
* Send the shrink-wrap related patches for review.
* PING the pending patches.
== Planed leaves ==
* April 21: Team event.
* May 1-3: Labour day holiday.
== Progress ==
* TCWG-413 Spec2006 (6/10)
- Setup chroot for aarch64
- Created rootfs with 4.8/trunk and spec2006
- booted created rootfs on foundation model with ubuntu kernel
* TCWG-291 CRC (3/10)
- posted vrp patch upstream
- with that seeing expected performance improvement
- analysing crc complete and up-streaming activities pending
* LP1301335 and PR59695 back-porting (1/10)
== Plan ==
Benchmarking and FENV support
Dear Sir,
Thanks for you page. it is really very helpful to us.
We are facing a problem during compiling GCC for our ARMv7-a Cortex-a9.
We are using following option:
1.
../gcc-linaro*/configure --disable-bootstrap --enable-languages=c,c++
--with-mode=thumb --with-arch=armv7-a --with-tune=cortex-a9
--with-float=hard --with-fpu=vpfv3-d16 --prefix=$home/gcc/gcc-linaro
2.
make -j`getconf _NPROCESSORS_ONLN`
after 2 step we are getting following error:
checking whether putc_unlocked is declared... yes
checking whether getrlimit is declared... yes
checking whether setrlimit is declared... yes
checking whether getrusage is declared... yes
checking whether ldgetname is declared... no
checking whether times is declared... yes
checking whether sigaltstack is declared... yes
checking whether madvise is declared... yes
checking for struct tms... yes
checking for clock_t... yes
checking for F_SETLKW... yes
checking if mkdir takes one argument... no
Unknown CPU given in --with-arch=armv7-a.
make[1]: *** [configure-gcc] Error 1
make[1]: Leaving directory `/home/anwej/src/build'
make: *** [all] Error 2
Please suggest the solution. where is the problem and what will be our next
steps.
Thanks in advance.
-best regards
Anwej Alam
Ph: +91.995.833.3456
Hi,
The preprocessed file:
http://people.linaro.org/~rikuvoipio/qmltextgenerator.ii.gz
With compile command line:
g++ -save-temps -c -g -O2 -fstack-protector --param=ssp-buffer-size=4
-Wformat -Werror=format-security -D_FORTIFY_SOURCE=2 -fvisibility=hidden
-fvisibility-inlines-hidden -Wall -W -D_REENTRANT -fPIC -o x.o
qmltextgenerator.ii
Will take apparently forever (north of 1600min) on a debian native gcc. -O
compiles instantly. Some bisecting for gcc optimization flags later,
disabling strict aliasing allows instant build as well:
g++ -save-temps -c -g -O2 -fno-strict-aliasing -fstack-protector
--param=ssp-buffer-size=4 -Wformat -Werror=format-security
-D_FORTIFY_SOURCE=2 -fvisibility=hidden -fvisibility-inlines-hidden -Wall
-W -D_REENTRANT -fPIC -o x.o qmltextgenerator.ii
Happens with:
gcc version 4.8.2 (Debian 4.8.2-19)
and
gcc version 4.9.0 20140405 (experimental) [trunk revision 209146] (Debian
20140405-1)
Linaro binary cross-compilers are compile the file fine with -O2.
do we do native gcc testing, or should it be just submitted upstream
bugzilla?
Riku
The Linaro Toolchain Working Group is pleased to announce the 2014.04
release of both Linaro GCC 4.8 and Linaro GCC 4.7.
As announced at Linaro Connect USA 2013 Linaro GCC moved to a pattern of
quarterly stable releases, with engineering releases in the intervening
months. This is the second stable release, and contains no known regressions
compared to the 2014.01 release.
The next stable release of GCC 4.8 will be the 2014.08 release. There will be
no engineering releases of GCC 4.8 until this release, as it enters in
maintenance.
No more releases of GCC 4.7 are planned.
Next month's release - 2014.05 - will be based off GCC 4.9 and be an
engineering build.
Linaro GCC 4.8 2014.04 is the thirteenth and last development release in the
4.8 series before entering maintenance. Based off the latest GCC 4.8.3+svn208968
release, it includes performance improvements and bug fixes.
Interesting changes include:
* Updates to GCC 4.8.3+svn208968
* Cortex-a53 support
* A fix for LP #1292489: Buggy vectorization of dot products
* A fix for LP #1268893: ICE when building kernel raid6 neon code
* A fix for LP #1273511: ICE APCS Frame & optimize-sibling-calls
Linaro GCC 4.7 2014.04 is the twenty third release in the 4.7 series. Based
off the latest GCC 4.7.4+svn209005 release, this is the tenth release after
entering maintenance and the final one.
Interesting changes include:
* Updates to GCC 4.7.4+svn209005
* A fix for LP #1129013: Internal compiler error in push_reload during
bootstrap stage 2
* A fix for LP #1292489: Buggy vectorization of dot products
* A fix for LP #1301335: Compiler segmentation fault while cross-compiling QT5
Webkit
The source tarball is available from:
http://releases.linaro.org/14.04/components/toolchain/gcc-linaro/4.8http://releases.linaro.org/14.04/components/toolchain/gcc-linaro/4.7
Downloads are available from the Linaro Releases website:
http://www.linaro.org/downloads/
More information on the features and issues are available from the
release page:
https://launchpad.net/gcc-linaro/4.8/4.8-2014.04https://launchpad.net/gcc-linaro/4.7/4.7-2014.04
Mailing list: http://lists.linaro.org/mailman/listinfo/linaro-toolchain
Bugs: https://bugs.launchpad.net/gcc-linaro/
Questions? https://ask.linaro.org/
Interested in commercial support? Inquire at support(a)linaro.org
I compiled my code with debug symbols on an BeagleBoneBlack using Debian
gcc-4.7. If I use objdump -S on my object file, I see both source lines
and disassembly. On my Ubuntu 13.10 host, using
gcc-linaro-arm-linux-gnueabihf-4.7-2013.04-20130415_linux, I do
arm-linux-gnueabihf-objdump -S on the same object file, I see disassembly
lines, but the source lines are not displayed. I¹m attempting to debug my
code with a Lauterbach JTAG debugger, but no source code is available
which makes debugging very difficult.
Is there some compatibility issue here or am I doing something wrong?
Regards,
John
== Progress ==
* Work on gdb testing utility [TCWG-96] [8/10]
-- Support to run native and native-gdbserver test via ssh on remote
machines like arm-linux.
-- Bug fix and test gdb testing utility by running it various configurations.
-- Update wiki page with testing utility and how to use it.
* Chromebook ubuntu re-install and fix network lag issue [2/10]
== Plan ==
* GDB reverse debugging on aarch64
-- Start implementation of reverse debugging infrastructure [TCWG-398]
-- Add support for running aarch64 gdb test suite in gdb testing utility.
== This week ==
a53 support [CARD-300][3/10]
- aarch64-none-elf target using cpu=cortex-a53 passed validation on
foundation model
- Resolved code review issues (formatting and unnecessary patches)
Backport 202663 - vectorizer bug passed validation and merge review for
4.7 and 4.8 [CARD-300][3/10]
GCC Bugzilla bug 60657 [TCWG-290][2/10]
- began fix by adding new conditions to pattern causing crash
- bug was fixed upstream by Jeffrey Law on April 4th
== Next week ==
- Transition from backports to bug fixing
- Create Wiki page for Aarch64 bug contingency bug fixes, feature and
performance improvements for partners
== Future ==
One week of vacation either the third or fourth week of April.
=== Progress ===
LP1296601 (ICE in push_minipool_fix) [5/10]
* completed a prototype fix
* submitted RFC patch to gcc-patches
* still awaiting review
PR60609 (Error: value of 256 too large for field of 1 bytes) [3/10]
* implemented fix and posted to gcc-patches
* approved, subject to further testing on Thumb-1
libvpx NEON assembler vs instrinsics performance investigation [2/10]
* looking at disassembly, code is not terribly aesthetically pleasing
* in some cases clang looks better
=== Plan ===
write up libvpx investigation
follow up/ping LP1296601
NEON scheduling TCWG-135
TCWG-156 (5/10)
* Hacked v7 memcpy into a memset
* Much fiddling with builds, targets
* Kicked off a benchmark run
Misc
* Meetings (1/10)
* Finding hardware/setting up working environments/figuring out workflows
(4/10)
== Issues ==
* none
== Progress ==
* Launchpad bugs:
o TCWG-422 : ICE in assign_by_spills building linux btrfs module (1/10)
- New failure after first fix reported.
- reduced new testcase.
- Fix committed by Vladimir as rev209038
o Backported "Internal compiler error in push_reload during
bootstrap stage 2" to GCC 4.7 (1/10)
- analysed validation results.
- re-spawned some jobs.
* Backports review: (5/10)
o cortex-a53 support backport:
- We are still not able to validate it on aarch64-linux-gnu target
with a compiler configured to default to cortex-a53, but no regressions
observed in the generic case and on bare_metal (with cortex-a53).
* Misc:
o Cbuildv1 baby-sitting (2/10)
- Toolchain64 disk was full.
o Various meetings (1/10).
== Next ==
- Mainly 4.7 and 4.8 April releases
- TCWG-413 Spec2006 (5/10)
- Analysed 456.hmmer
- In the process of opening performance bug reports
- Started looking at 453.povray
- TCWG-291 CRC (2/10)
- Not seeing performance improvement with redundant "and" instruction gone
- Analysing with perf to see the reason
- LP1301335 (3/10)
- SLP vectorizer ICEs for QT5 Webkit for Linaro 4.7
- Doesn’t occur in trunk/4.8/4.7 FSF
- Patch proposed for merge request which fixes
- I also see some FAIL -> PASS in the regression with this patch
- This patch is only relevant for Linaro 4.7 so we cant/don’t need to
upstream it (?)
== Plan ==
Continue with Spec2006 and crc
4 day week 31-Oct local holiday
Bug fix (2/10)
* Looking at a register allocation issue with ARMv7 hard float issue. (3/10)
Tried changing machine description pattern same as trunk in gcc 4.8 branch.
Issue does not occur with trunk and reason is arm64 moved to lra.
turning off lra bug occurs.
Trying to find out if it is easy to fix in reload or wait for LRA backport.
PGO - AArch64 (TCWG-179) (3/10)
* Native CPU2006 runs on V8 foundation model.
SPEC runs -O3 -mcpu=cortex-a57. INT benchmark failures seen with mcf
and h264ref.
rest benchmarks running.
* Tried to use ubuntu saucy core image on V8 foundation model and
mount NFS is failing.
* Trying to install QEMU user static for aarch64 and use them from
chroot environment
GLIBC Systemtap (2/10)
* Re spined libc systemtap probe patch to glibc. Will newton is
testing it in hardware.
Meetings (2/10)
* Attend 1-1 with Ryan discuss 2014 goal planning.
* Attend 1-1 with Maxim discuss PGO work.
== Progress ==
* Kernel (TCWG-417)
- Implementing named register global variables (D3261)
- Helping Milosz and Vinicius (LLVMLinux) to get a kernel ready
- First LLVM-compiled kernel booted on Versatile Express hardware
* Background
- Reviewing patches, etc.
- Apple merged their ARM64 back-end, fiddling bots
- Making the new TableGen docs official
- Jira farming
- Became code owner for the ARM Linux support
- LLVM Foundation announced
- Trying to run SPEC on AArch64
* Time
- CARD-124 6/10
- Others 4/10
== Plan ==
* Holiday for two and a half weeks
* Follow up the named register patch
== Progress ==
* glibc patch review (2/10)
* Helping out with aarch64 glibc setjmp/longjmp Systemtap probes testing (1/10)
* Investigated and submitted patch for gas ARM alignment issue (3/10)
* Committed library and script for malloc logging (1/10, TCWG-423)
* Rebased and tidied up malloc microbenchmark (2/10, TCWG-160)
* Various small binutils and glibc patches (1/10)
== Issues ==
* None
== Plan ==
* Submit patch for glibc malloc microbenchmark
--
Will Newton
Toolchain Working Group, Linaro
Hi all,
I've just filed a bug on glibc I'd love you to take a look at:
https://sourceware.org/bugzilla/show_bug.cgi?id=16796
Here's the description to save clicking:
Hi,
There is a test in glibc (tst-tls5) that tests that
((uintptr_t)pthread_self())%16 is zero. But watch this:
(t-mwhudson)mwhudson@am1:~$ cat btp.c
#include <stdint.h>
#include <stdio.h>
#include <pthread.h>
int
main(int argc, char** argv)
{
uintptr_t p = (uintptr_t)__builtin_thread_pointer();
uintptr_t q = (uintptr_t)pthread_self();
printf("p: %lx %ld\n", p, p%16);
printf("q: %lx %ld\n", q, q%16);
}
(t-mwhudson)mwhudson@am1:~$ gcc -o btp btp.c -lpthread
(t-mwhudson)mwhudson@am1:~$ ulimit -s unlimited
(t-mwhudson)mwhudson@am1:~$ ./btp
p: 2000028d88 8
q: 2000028698 8
(t-mwhudson)mwhudson@am1:~$ ulimit -S -s 8192
(t-mwhudson)mwhudson@am1:~$ ./btp
p: 7f7fd086f0 0
q: 7f7fd08000 0
So something is clearly wrong; maybe it's just that the test is too
strict, but somehow that seems a bit unlikely. FWIW, this doesn't
happen if you don't link with libpthread so maaaaybe it's a bug in
something that ends up in libpthread's .init section?
Cheers,
mwh
== Week of March 24th ==
- STREAM regression (TCWG-388, 5/10)
-- Finished prototype patch. The patch adds modeling of ARM L2 auto-prefetcher hardware to GCC scheduler (the model is very simple as auto-prefetcher is very lightly documented). Half of the patch cleans up and improves GCC scheduler, and the other half implements the auto-prefetcher model.
-- While looking into ARM scheduling support noticed that ARM doesn't use multipass lookahead scheduling, which surprised me. Enabled it (multipass scheduling) in my patches.
- Looked into lll_timed_wait Glibc/uClibc bug upstream (1/10)
-- https://sourceware.org/ml/libc-alpha/2014-03/msg00905.html
- Various discussions and reviews (4/10)
== Week of March 30th ==
- STREAM regression (TCWG-388)
-- Benchmark patches on SPEC2k and find/confirm best values for tuning parameters:
--- dfa_lookahead: should normally be issue_rate-1.
--- L2 auto-prefetcher queue depth: new tuning knob.
-- Investigate any performance regressions from the patches.
- lll_timed_wait Glibc/uClibc bug
-- Make sure it is fixed upstream. Possibly backport to Linaro branches.
--
Maxim Kuvyrkov
www.linaro.org
== Issues ==
* none
== Progress ==
* Launchpad bugs:
o TCWG-422 : ICE in assign_by_spills building linux btrfs module (1/10)
- created blueprint for :
https://bugs.launchpad.net/gcc-linaro/+bug/1296676
- Reported upstream as :
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60650
- Reduced testcase
- Fix committed by Vladimir as rev208876
- still ICE when configured for arm-none-linux-gnueabihf
o Backported "Internal compiler error in push_reload during
bootstrap stage 2" to GCC 4.7 (1/10)
- https://bugs.launchpad.net/gcc-linaro/+bug/1129013
- some testsuite regressions observed. will investigate.
* Backports review: (5/10)
o reviewed backport for pr60264 and rev202663
o cortex-a53 support backport:
- Analysed testsuite regression
- 22K Loc patch under review
* LRA on AArch32:
o TCWG-345 : Analyse performance of LRA for ARM. (1/10)
- looked at the perf tool results
* Misc:
o Various meetings (1/10).
o Various support to team members (1/10)
o Cbuildv1 baby-sitting (Calxedas nodes have to be restarted after
each upgrades !)
== Next ==
- continue cortex-a53 review
- continue on backports.
- continue on TCWG-345.
== Progress ==
* Short Week
-- Monday Day Off: Pakistan Day 23rd March public holiday roll over. [2/10]
-- Short leave on Thursday [1/10]
* Work on gdb testing utility [TCWG-96] [7/10]
-- Writing a new gdb testing utility script that automates gdb
testing in various configurations and compares testsuite results.
-- Support for all kind of native, native-gdbserver and
remote-gdbserver gdb configurations has been added.
-- Interactive and configuration file based user input mode has been added.
-- Testing configurations host alive, ssh possible, board file found
and ability to build sources using user defined configure flags has
been added.
== Plan ==
* Work on gdb testing utility [TCWG-96].
-- Add support to run native and native-gdbserver test via ssh on
remote machines like arm-linux.
-- Bug fix and test gdb testing utility by running it various configurations.
-- Update wiki page with testing utility and how to use it.
== This week ==
a53 support
- Fixed regression found in arm testing and resubmitted build and
merge requests
- arrch64 testing passed with no regressions. Testing with a53
support enabled still required
Merged 202663 (vectorizer bug) into 4.7 and 4.8 branches. Submitted
merge and build requests
== Next week ==
- Test aarch64 with a53 support enabled on qemu64
- Work on bug 60657 - [4.9 Regresssion] ICE: error: insn does not
satisfy its constraints
== Future ==
== Issues ==
* None
== Progress ==
* Create prebuilt sysroot based on Linaro eglibc 2014.04 release
(https://launchpad.net/linaro-toolchain-binaries/support/01/+download/linaro…)
(1/10).
* Enable shrink-wrap for apcs. Patch was out for community review. (1/10)
* Reinvestigate shrink-wrap enhancement (4/10, TCWG-133)
- There was improvement in ira to split_live_ranges_for_shrink_wrap
(http://gcc.gnu.org/bugzilla/show_bug.cgi?id=10474). But it still can
not handle the case in 453.povray.
- Investigate to do a simple copy-forward when prepare_shrink_wrap.
* Investigate lp:1296942 (pr60663). Patch is sent out for community
review. (4/10)
* Backporting the fix for pr60264 to Linaro 4..8.
== Plans ==
* Continue on shrink-wrap enhancement.
== Planned leaves ==
* April 7: Qingming holiday.
== Progress ==
- TCWG-413 Spec2006 (7/10)
- Investigated compiler error for 481.wrf with FSF 4.8.2. Issue is
due to aarch64_cm<cmp><mode> pattern (fcmle and fcmlt supports only #0
as third val). This is already fixed in trunk and Linaro 4.8.
- Ran profiling to analyse 4.9 regressions. Started looking into
P7Vitterbui which is one of the functions that performs badly.
- TCWG-291 CRC (3/10)
Came up with a patch for improving vrp for test-case. Some c++ test
cases are failing in regression testing with this patch. Looking into it.
- TCWG-394 / PR60034
Patch committed and card closed.
http://gcc.gnu.org/viewcvs?rev=208949&root=gcc&view=rev
== Plan ==
Continue with Spec2006 and crc
== Progress ==
* Android (no card, 10 minutes. ;)
- Implemented __builtin___clear_cache in Clang
* Kernel (TCWG-417) 6/10
- VLAIS in crypto (last place in kernel)
- __builtin__stack_pointer (new builtin)
- Discussion in GCC list, named registers might be a better option
- Discussion in LLVM list about implementing named registers
- Implementing named register variables...
- Planning on LAVA testing LLVM kernels with LLVMLinux
- __aeabi_memset/cpy/move (both Android and Kernel) will have to be fixed
* Libraries (TCWG-125) 2/10
- libc++abi's unwind routines assume (ARM == SjLj)
- libc++ doesn't work without them
- We'll need to teach it about EHABI (later)
* Background 2/10
- Installed ArchLinux on my laptop, took some time to setup
- Re-org of LLVM Jira Cards (TCWG-417)
- Reviewing some GSoC proposals
== Plan ==
* implement named register variables in LLVM, then Clang
* Continue helping LLVMLinux and Milosz to test the LLVM kernel
* Time allowing, check CBuild2 for an LLVM build
* Two long weeks of holidays...
== Progress ==
* Bugfix aarch64 setcontext patch (2/10, TCWG-410)
* malloc requirements wiki page (2/10, TCWG-414)
* Lots of creating and updating and updating JIRA cards (1/10)
* glibc patch review (1/10)
* Assorted small patches - ld relasz, gnulib obstack, glibc strtod
benchmark (2/10)
* Investigate a couple of issues raised by member services and on lists (2/10)
== Issues ==
* None
== Plan ==
* Resurrect glibc malloc benchtest
* More glibc benchmark infrastructure work
* Check status of glibc ARM port build warnings
--
Will Newton
Toolchain Working Group, Linaro
