Progress:
* VIRT-65 [QEMU upstream maintainership]
- More documentation cleanup (splitting the Arm boards section
up into one page per board)
- Various patch review
- Put together last large pull request before softfreeze hits next week
- Fixed the Windows installer generation, which I broke in the
process of moving the HTML docs around
- Fixed read buffer overrun in i82596 device model spotted by coverity
- Fixed a user-experience papercut that's been bothering me for years:
for arm you needed to specify '-M virt' to avoid an error even if all
you wanted was the '-cpu help' or '-device help' output.
* VIRT-241 [QEMU ISA Support for A-profile]
- Jira gardening: split out the optional parts of each architectural
tick sub-epic, and added the new 8.6 tasks
thanks
-- PMM
== Progress ==
* BFD Linker:
- GNU-629: non-contiguous memory support: patch accepted and committed
* GCC upstream validation:
- reported a couple of failures/regressions
- PR90378 working on reproducing a non-functional code problem with spec2006
on arm with LTO and -Os
* misc:
- infra fixes / troubleshooting / reviews
== Next ==
* spec2006 / LTO / Os / aarch32
* FDPIC GDB
Hi Sir,
I have some questions for tool chain:
1. Can the latest version “linaro-gcc/7.5” support ARMv9 new ISA?
2. If not, when will the new release version can support?
Thanks a lot.
Chun-Chia
VirtIO Related Work ([VIRT-366])
================================
- Followed up with ARM on the roll of Hafnium and secure partitioning
with VirtIO
- Continued working through various requirements for the work
- raised [VIRT-373] to describe some potentially common work on
handling userspace backends
- started discussion on approaches on virtio-dev list Message-Id:
<874kv15o4q.fsf(a)linaro.org>
- posted [RFC PATCH] tools/virtiofsd: add support for --socket-group
Message-Id: <20200304185025.19853-1-alex.bennee(a)linaro.org>
[VIRT-366] <https://projects.linaro.org/browse/VIRT-366>
[VIRT-373] <https://projects.linaro.org/browse/VIRT-373>
Upstream Work ([VIRT-109])
==========================
- posted [PATCH v1 00/10] testing/next updates (tweaks and
re-greening) Message-Id:
<20200302181907.32110-1-alex.bennee(a)linaro.org>
- posted [PULL 0/9] testing updates (tests/vm and acceptance tweaks)
Message-Id: <20200304100154.14822-1-alex.bennee(a)linaro.org>
[VIRT-109] <https://projects.linaro.org/browse/VIRT-109>
Completed Reviews [3/3]
=======================
[PATCH v3 00/33] Convert qemu-doc to rST
Message-Id: <20200228153619.9906-1-peter.maydell(a)linaro.org>
[PATCH v5 00/50] Initial support for multi-process qemu
Message-Id: <cover.1582576372.git.jag.raman(a)oracle.com>
- CLOSING NOTE [2020-03-02 Mon 18:20]
Initial pass, mostly checking wasn't CI broken, which it was.
Added: <2020-02-28 Fri>
[PATCH v6 00/18] Add Allwinner H3 SoC and Orange Pi PC Machine
Message-Id: <20200301215029.15196-1-nieklinnenbank(a)gmail.com>
Absences
========
- None
Current Review Queue
====================
* [PATCH v16 00/10] VIRTIO-IOMMU device
Message-Id: <20200214132745.23392-11-eric.auger(a)redhat.com>
Added: <2020-03-03 Tue>
* [RFC][PATCH 0/3] IVSHMEM version 2 device for QEMU
Message-Id: <cover.1573477032.git.jan.kiszka(a)siemens.com>
Added: <2020-02-14 Fri>
* {PATCH v2 0/2} tests/tcg/multiarch: Add tests for implemented real
Message-Id: <1581603905-21565-1-git-send-email-Filip.Bozuta(a)rt-rk.com>
Added: <2020-02-13 Thu>
* [RFC 0/9] Add an interVM memory sharing device
Message-Id: <1580815851-28887-1-git-send-email-i.kotrasinsk(a)partner.samsung.com>
Added: <2020-02-05 Wed>
--
Alex Bennée
Progress:
* VIRT-65 [QEMU upstream maintainership]
- found and fixed some bugs in our "hflags caching" for M-profile
which caused spurious assertions in some corner cases
- got the rST conversion patchset through review and into master
- sent some followup cleanup patches that remove some texinfo
related bits of code we no longer need
- patch review:
+ rth's final respin of the "honour more HCR_EL2 traps" series
+ patchset fixing some memory leaks of timer objects
+ patchset for cubieboard model to error out rather than ignoring
some bogus user command line options
* VIRT-241 [QEMU ISA Support for A-profile]
+ Wrote an implementation of v8.2-TTS2UXN; investigating how best
to test it
thanks
-- PMM
[VIRT-344 # ARMv8.5-MemTag, Memory Tagging Extension ]
Lots of work, including an arch update. The system-mode patch set is much
changed, but still not quite ready.
[VIRT-349 # QEMU SVE2 Supprt ]
[VIRT-327 # Richard's upstream QEMU work ]
TBI fixes, 2 rounds.
HCR fixes, 2 rounds.
TCG patch queue flushed.
Some patch review.
r~
Good afternoon,
I would like to announce the breakthrough in extending gdb with non
intrusive instructions and functions tracing on ARM processors using
Coresight ETM traces, as described in previous mails.
the source code is made public in the git repository
https://github.com/gzied/binutils-gdb/ in the branch gdb_arm_coresight.
this implementation was compiled and tested on an STM32MP1 (ARMv7
Architecture) board running "Linux arm 5.3.10-armv7-lpae-x15" distribution
where the device tree was modified to declare CoreSight components.
to build the software
>checkout the software from the branch gdb_arm_coresight
> cd ..
>mkdir build
>cd build
> ../binutils-gdb/configure --with-arm-cs
>make
after a successful build gdb will be available in the folder build/gdb
to run the software
build the software you would like to debug with debugging info (-g flag)
>gcc -g software.c -o software
start debugging your software
>gdb software
set a breakpoint at main
(gdb) b main
(gdb) run
set a breakpoint in a location after the code you would like to trace
(gdb) b my_function
set your etm sink, sinks can be found by listing the folder
/sys/bus/event_source/devices/cs_etm/sinks/. use a sink that is capable of
storing the traces on chip (etf, etb ...)
(gdb) set record btrace etm sink tmc_etf0
start recording etm traces
(gdb) record btrace etm
continue the execution of the program
(gdb) c
wait until the breakpoint is hit,
analyse and display the traces
- on assembly level
(gdb) record instruction-history
- on c level
(gdb) record function-call-history /ilc
you can increase the number of instructions displayed by using
(gdb) set record instruction-history-size size
(gdb) set record function-call-history-size size
the work is still in an early stage and needs to be improved, extended and
stabilized. your feedback and contributions are welcome
Kind Regards
Zied Guermazi
VirtIO Related Work ([VIRT-366])
================================
- had a couple of HOs and internal threads to flesh out understanding
for VirtIO work
- queried VIRTIO adoption in other hypervisors Message-Id:
<87mu93vwy2.fsf(a)linaro.org> to help understanding
- need a meeting with QC/NXP to discuss their requirements and why
they need certain devices in VirtIO
- a lot of the Android focus seems to be on isolating various secure
workloads
- avoiding needing secure but un-trusted code at elevated privileges
with access to main OS
- suspect the breakdown in the card needs re-arranging
[VIRT-366] <https://projects.linaro.org/browse/VIRT-366>
Upstream Work ([VIRT-109])
==========================
- posted [PATCH v2 00/12] testing/next (with build fixes!) Message-Id:
<20200130113223.31046-10-alex.bennee(a)linaro.org>
- posted [PULL 00/19] testing and plugin updates Message-Id:
<20200226073929.28237-1-alex.bennee(a)linaro.org>
- did some debugging/diagnosis for recent slowdown of ARM emulation in
master Message-Id:
<CAPan3Wq-MVwcJQELP8n+g33CR7tsiGXQ698gA177nd2my9hWCw(a)mail.gmail.com>
- posted [PATCH v1 0/4] Fix codegen translation cache size
Message-Id: <20200226181020.19592-1-alex.bennee(a)linaro.org>
[VIRT-109] <https://projects.linaro.org/browse/VIRT-109>
Completed Reviews [3/3]
=======================
[PATCH v16 00/10] VIRTIO-IOMMU device
Message-Id: <20200214132745.23392-1-eric.auger(a)redhat.com>
- CLOSING NOTE [2020-02-26 Wed 15:37]
It's in an in-flight PR now, will play with it once it lands.
Added: <2020-02-14 Fri>
[PATCH RISU] aarch64.risu: Add patterns for v8.3-RCPC and v8.4-RCPC insns
Message-Id: <20200225143923.22297-1-peter.maydell(a)linaro.org>
[PATCH v3 0/3] Fix number of priority bits for arm boards
Message-Id: <1582537164-764-1-git-send-email-sai.pavan.boddu(a)xilinx.com>
- CLOSING NOTE [2020-02-28 Fri 17:22]
Have been pulled into target-arm next but didn't fix the
kvm-unit-test failures with priority masking as I had hopped they
would.
Added: <2020-02-25 Tue>
Absences
========
- None
Current Review Queue
====================
* [RFC][PATCH 0/3] IVSHMEM version 2 device for QEMU
Message-Id: <cover.1573477032.git.jan.kiszka(a)siemens.com>
Added: <2020-02-14 Fri>
* {PATCH v2 0/2} tests/tcg/multiarch: Add tests for implemented real
Message-Id: <1581603905-21565-1-git-send-email-Filip.Bozuta(a)rt-rk.com>
Added: <2020-02-13 Thu>
* [RFC 0/9] Add an interVM memory sharing device
Message-Id: <1580815851-28887-1-git-send-email-i.kotrasinsk(a)partner.samsung.com>
Added: <2020-02-05 Wed>
* [PATCH v2 0/7] configure: Improve PIE and other linkage
Message-Id: <20191218223441.23852-1-richard.henderson(a)linaro.org>
Added: <2020-01-06 Mon>
--
Alex Bennée
