VirtIO Related Work ([VIRT-366])
================================
- virtio sync-up call see minutes Message-Id:
<87a72j64gt.fsf(a)linaro.org>
[VIRT-366] <https://projects.linaro.org/browse/VIRT-366>
VirtIO RPMB ([VIRT-371])
- continued work on my vhost-user-rpmb daemon
- vhost-user-rpmb plumbed in with QEMU and virtio-pci transport
- detected in lspci and comms established \\o/
- started experimenting with front-ends from ACRN linux port
- currently blows up on feature negotiation
- asked for clarification of divergence between ACRN and OASIS
spec Message-Id: <87sgga4daf.fsf(a)linaro.org>
[VIRT-371] <https://projects.linaro.org/browse/VIRT-371>
[vhost-user backend for rpmb]
<https://github.com/stsquad/qemu/tree/vhost-user-rpmb>
[VIRT-402] <https://projects.linaro.org/browse/VIRT-402>
VirtiIO blogpost ([LBO-2])
- still TODO new work and architectures
- bit of writers block on last couple of paragraphs
[LBO-2] <https://projects.linaro.org/browse/LBO-2>
Upstream Work ([VIRT-109])
==========================
- posted [PULL 00/14] testing and gdbstub updates Message-Id:
<20200506120529.18974-1-alex.bennee(a)linaro.org>
[VIRT-109] <https://projects.linaro.org/browse/VIRT-109>
Completed Reviews [1/1]
=======================
[PATCH 0/4] softfloat: fix floatx80 emulation bugs
Message-Id: <alpine.DEB.2.21.2005010034560.30535(a)digraph.polyomino.org.uk>
--
Alex Bennée
(Short week, 4 days.)
Progress:
* VIRT-65 [QEMU upstream maintainership]
- Added brief documentation of some of the QEMU models of Arm
devboards, now we have a better place for this info to live
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
- Fixed https://bugs.launchpad.net/bugs/1877136 (we were not using
the right gdb XML feature for M-profile CPUs, which meant that
stack backtraces across an exception stack frame didn't work and
we didn't report the XPSR to gdb correctly)
- Started working through code review responses from rth to the
first lot of neon-decodetree patches
thanks
-- PMM
Short week (4 days)
== Progress ==
* GCC upstream validation:
- Added gcc-10 branch
- maybe we should agree on a common way of running the testsuite
* GCC:
- PR94743 (IRQ handler and Neon registers): iterating. Refining patch
that emits a warning (testsuite refinements...), Need to update
additional patch that actually saves the FP regs so that it takes the
D16/D32 versions into account.
* misc:
- infra fixes / troubleshooting / reviews
- looking at cortex-m benchmarking harnesses, issues with openocd
== Next ==
* GCC validation matrix updates
* PR94743
* GCC/cortex-M testing
* cortex-m benchmarking
* FDPIC GDB
Hi, Chris, and Linaro Toolchain team,
Recently I found an issue of SVE intrinsics (svld1_f64, svld1_vnum_f64)
when using gcc -O0 (gcc 10.0.1 debian nightly build, optimization level 0).
Would you please help me to reach out to people who can fix it?
svld1_f64() is a function defined in Arm intrinsics for SVE (scalable
vector extensions) [2].
Changing -O0 to -O1 makes the issue disappear.
svld1_vnum_f64() has the same problem.
To show the issue, I wrote this simple test program, see test1.c in [1]. A
full issue report and gcc version string can be found in the attached pdf
file.
[1] My test program:
https://github.com/docularxu/sve-code-test/tree/working-svld1_f64
[2] Arm SVE intrinsics: https://developer.arm.com/docs/100987/latest
Feel free to contact me if you need more details.
Best regards,
-Guodong Xu
[VIRT-349 # QEMU SVE2 Support ]
More progress on insn implementation; just about done with all of the indexed
multiply. Perhaps 10 insns remaining.
Assad mentioned on irc that he has fixed the Armie bug that prevented RISU from
running properly, so I hope to start doing some testing soon.
[VIRT-327 # Richard's upstream QEMU work ]
Reviewed Peter's decodetree conversion. Posted some extracts from my sve2
branch that may be relevant and helpful.
r~
Progress:
* VIRT-65 [QEMU upstream maintainership]
- code review:
+ rth's v3 patchset for 'sve load/store improvements'
+ Paolo's improvements to my run-coverity-scan script
- tagged QEMU 5.0 and pushed it out of the door; put together and
sent out the first target-arm pullreq for the 5.1 cycle
* VIRT-364 [QEMU support for ARMv8.1-M extensions]
- Neon decodetree progressing nicely (though it is a bigger
job than I had anticipated when I started it...) Sent out a
first part patchset that covers the v8.0-and-later extensions,
the loads-and-stores, and the 3-reg-same part of the dp insns.
NB: UK bank holiday next Friday...
thanks
-- PMM
Hi,
You are receiving this email because you are listed as the owner for at least one LLVM build slave on http://lab.llvm.org:8011/buildslaves <http://lab.llvm.org:8011/buildslaves>.
This message is a heads up concerning the upcoming upgrade of CMake discussed here: http://lists.llvm.org/pipermail/llvm-dev/2020-March/140349.html <http://lists.llvm.org/pipermail/llvm-dev/2020-March/140349.html>. As discussed on that thread, LLVM will require CMake 3.13.4 in order to build after the release branch for LLVM 11.0.0 is created. Using an older CMake will be an error.
In order to keep things running smoothly, we would greatly appreciate if you could upgrade CMake on your builder(s) to at least CMake 3.13.4 before the next release branch is created. Please reply privately to this email when you've done so -- this will allow keeping track of who has and has not upgraded.
Thank you and have a wonderful day,
Louis
Short week (4 days)
== Progress ==
* GCC upstream validation:
- reported a couple of failures/regressions
- still looking at improving MVE tests to avoid failures in several
non-supported configurations. No satisfactory solution so far (there
are always combinations of GCC configure option and validation-time
options that are incompatible and produce failures instead of
unsupported)
- maybe we should agree on a common way of running the testsuite
* GCC:
- PR94743 (IRQ handler and Neon registers): sent a patch to emit a
warning. More ambitious patches would be too intrusive for stage 4.
* FDPIC/GDB:
- no progress this week
* misc:
- infra fixes / troubleshooting / reviews
- started looking at cortex-m benchmarking harnesses
== Next ==
* FDPIC GDB
* GCC/cortex-M
* cortex-m benchmarking
